VFPFMRX r1, FPEXC @ Is the VFP enabled?
DBGSTR1 "fpexc %08x", r1
- tst r1, #FPEXC_ENABLE
+ tst r1, #FPEXC_EN
bne look_for_VFP_exceptions @ VFP is already enabled
DBGSTR1 "enable %x", r10
ldr r3, last_VFP_context_address
- orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set
+ orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set
ldr r4, [r3, r11, lsl #2] @ last_VFP_context pointer
- bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled
+ bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled
cmp r4, r10
beq check_for_exception @ we are returning to the same
@ process, so the registers are
cmp r4, #0
beq no_old_VFP_process
VFPFMRX r5, FPSCR @ current status
+#ifndef CONFIG_VFPv3
VFPFMRX r6, FPINST @ FPINST (always there, rev0 onwards)
tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read?
VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading
@ nonexistant reg on rev0
+#endif
VFPFSTMIA r4 @ save the working registers
stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
@ and point r4 at the word at the
VFPFLDMIA r10 @ reload the working registers while
@ FPEXC is in a safe state
ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
+#ifndef CONFIG_VFPv3
tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write?
VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing
@ nonexistant reg on rev0
VFPFMXR FPINST, r6
+#endif
VFPFMXR FPSCR, r5 @ restore status
check_for_exception:
- tst r1, #FPEXC_EXCEPTION
+ tst r1, #FPEXC_EX
bne process_exception @ might as well handle the pending
@ exception before retrying branch
@ out before setting an FPEXC that
look_for_VFP_exceptions:
- tst r1, #FPEXC_EXCEPTION
+ tst r1, #FPEXC_EX
bne process_exception
VFPFMRX r5, FPSCR
- tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION !
+ tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EX !
bne process_exception
@ Fall into hand on to next handler - appropriate coproc instr
@ r1 - FPEXC
DBGSTR1 "save VFP state %p", r0
VFPFMRX r2, FPSCR @ current status
+#ifndef CONFIG_VFPv3
VFPFMRX r3, FPINST @ FPINST (always there, rev0 onwards)
tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read?
VFPFMRX r12, FPINST2, NE @ FPINST2 if needed - avoids reading
@ nonexistant reg on rev0
+#endif
VFPFSTMIA r0 @ save the working registers
stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
mov pc, lr
fmrrd r0, r1, d\dr
mov pc, lr
.endr
+#ifdef CONFIG_VFPv3
+ @ d16 - d31 registers
+ .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+ mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr
+ mov pc, lr
+ .endr
+#endif
- @ virtual register 16 for compare with zero
+ @ virtual register 16 (or 32 if VFPv3) for compare with zero
mov r0, #0
mov r1, #0
mov pc, lr
fmdrr d\dr, r0, r1
mov pc, lr
.endr
+#ifdef CONFIG_VFPv3
+ @ d16 - d31 registers
+ .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+ mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr
+ mov pc, lr
+ .endr
+#endif