ARM: OMAP: Move 32k-based sched_clock() to common code

[linux-2.6-omap-h63xx.git] / arch / arm / plat-omap / timer32k.c

diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c
index b0af014b0e2c1c05d3d26c77f29f04bb0573e79d..905e735cdfb1c798599e47e823943941d54442ca 100644 (file)
--- a/arch/arm/plat-omap/timer32k.c
+++ b/arch/arm/plat-omap/timer32k.c
@@ -70,8 +70,6 @@ struct sys_timer omap_timer;
 
 #if defined(CONFIG_ARCH_OMAP16XX)
 #define TIMER_32K_SYNCHRONIZED         0xfffbc410
-#elif defined(CONFIG_ARCH_OMAP24XX)
-#define TIMER_32K_SYNCHRONIZED         0x48004010
 #else
 #error OMAP 32KHz timer does not currently work on 15XX!
 #endif
@@ -93,8 +91,6 @@ struct sys_timer omap_timer;
 #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate)                    \
                                (((nr_jiffies) * (clock_rate)) / HZ)
 
-#if defined(CONFIG_ARCH_OMAP1)
-
 static inline void omap_32k_timer_write(int val, int reg)
 {
        omap_writew(val, OMAP1_32K_TIMER_BASE + reg);
@@ -120,41 +116,26 @@ static inline void omap_32k_timer_stop(void)
 
 #define omap_32k_timer_ack_irq()
 
-#elif defined(CONFIG_ARCH_OMAP2)
-
-static struct omap_dm_timer *gptimer;
-
-static inline void omap_32k_timer_start(unsigned long load_val)
+static int omap_32k_timer_set_next_event(unsigned long delta,
+                                        struct clock_event_device *dev)
 {
-       omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val);
-       omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
-       omap_dm_timer_start(gptimer);
-}
-
-static inline void omap_32k_timer_stop(void)
-{
-       omap_dm_timer_stop(gptimer);
-}
+       omap_32k_timer_start(delta);
 
-static inline void omap_32k_timer_ack_irq(void)
-{
-       u32 status = omap_dm_timer_read_status(gptimer);
-       omap_dm_timer_write_status(gptimer, status);
+       return 0;
 }
 
-#endif
-
 static void omap_32k_timer_set_mode(enum clock_event_mode mode,
                                    struct clock_event_device *evt)
 {
+       omap_32k_timer_stop();
+
        switch (mode) {
-       case CLOCK_EVT_MODE_ONESHOT:
        case CLOCK_EVT_MODE_PERIODIC:
+       case CLOCK_EVT_MODE_ONESHOT:
                omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
                break;
        case CLOCK_EVT_MODE_UNUSED:
        case CLOCK_EVT_MODE_SHUTDOWN:
-               omap_32k_timer_stop();
                break;
        case CLOCK_EVT_MODE_RESUME:
                break;
@@ -163,8 +144,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
 
 static struct clock_event_device clockevent_32k_timer = {
        .name           = "32k-timer",
-       .features       = CLOCK_EVT_FEAT_PERIODIC,
+       .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
+       .set_next_event = omap_32k_timer_set_next_event,
        .set_mode       = omap_32k_timer_set_mode,
 };
 
@@ -177,34 +159,6 @@ static inline unsigned long omap_32k_sync_timer_read(void)
        return omap_readl(TIMER_32K_SYNCHRONIZED);
 }
 
-/*
- * Rounds down to nearest usec. Note that this will overflow for larger values.
- */
-static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k)
-{
-       return (ticks_32k * 5*5*5*5*5*5) >> 9;
-}
-
-/*
- * Rounds down to nearest nsec.
- */
-static inline unsigned long long
-omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
-{
-       return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
-}
-
-static unsigned long omap_32k_last_tick = 0;
-
-/*
- * Returns current time from boot in nsecs. It's OK for this to wrap
- * around for now, as it's just a relative time stamp.
- */
-unsigned long long sched_clock(void)
-{
-       return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read());
-}
-
 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
 {
        struct clock_event_device *evt = &clockevent_32k_timer;
@@ -223,23 +177,7 @@ static struct irqaction omap_32k_timer_irq = {
 
 static __init void omap_init_32k_timer(void)
 {
-       if (cpu_class_is_omap1())
-               setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
-       omap_32k_last_tick = omap_32k_sync_timer_read();
-
-#ifdef CONFIG_ARCH_OMAP2
-       /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
-       if (cpu_is_omap24xx()) {
-               gptimer = omap_dm_timer_request_specific(1);
-               BUG_ON(gptimer == NULL);
-
-               omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
-               setup_irq(omap_dm_timer_get_irq(gptimer), &omap_32k_timer_irq);
-               omap_dm_timer_set_int_enable(gptimer,
-                       OMAP_TIMER_INT_CAPTURE | OMAP_TIMER_INT_OVERFLOW |
-                       OMAP_TIMER_INT_MATCH);
-       }
-#endif
+       setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
 
        clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
                                           NSEC_PER_SEC,