OMAP clock: add OMAP chip family-specific clk_register() option

[linux-2.6-omap-h63xx.git] / arch / arm / plat-omap / include / mach / clock.h

diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index f01f59db35cb8f678e15c4b59bc3571a30d35f9c..db57b71a67ba8974d8d8f9efb0a79b86006e3ada 100644 (file)
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -20,8 +20,8 @@ struct clockdomain;
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 
 struct clksel_rate {
-       u8                      div;
        u32                     val;
+       u8                      div;
        u8                      flags;
 };
 
@@ -31,30 +31,30 @@ struct clksel {
 };
 
 struct dpll_data {
-       u16                     mult_div1_reg;
        u32                     mult_mask;
        u32                     div1_mask;
-       u16                     last_rounded_m;
-       u8                      last_rounded_n;
        unsigned long           last_rounded_rate;
        unsigned int            rate_tolerance;
-       u16                     max_multiplier;
-       u8                      min_divider;
-       u8                      max_divider;
        u32                     max_tolerance;
        struct clk              *bypass_clk;
-       u16                     control_reg;
        u32                     enable_mask;
+       u16                     mult_div1_reg;
+       u16                     control_reg;
+       u16                     max_multiplier;
+       u16                     last_rounded_m;
+       u8                      last_rounded_n;
+       u8                      min_divider;
+       u8                      max_divider;
 #  if defined(CONFIG_ARCH_OMAP3)
-       u16                     idlest_reg;
-       u32                     idlest_mask;
-       u32                     freqsel_mask;
        u8                      modes;
        u8                      auto_recal_bit;
        u8                      recal_en_bit;
        u8                      recal_st_bit;
        u16                     autoidle_reg;
+       u16                     idlest_reg;
        u32                     autoidle_mask;
+       u32                     idlest_mask;
+       u32                     freqsel_mask;
 #  endif
 };
 
@@ -77,7 +77,6 @@ struct clk_child {
 
 struct clk {
        struct list_head        node;
-       struct module           *owner;
        const char              *name;
        int                     id;
        struct clk              *parent;
@@ -86,18 +85,17 @@ struct clk {
        struct list_head        children;
        __u32                   flags;
        u32                     enable_reg;
-       __u8                    enable_bit;
-       __s8                    usecount;
-       u8                      idlest_bit;
        void                    (*recalc)(struct clk *, unsigned long, u8);
        int                     (*set_rate)(struct clk *, unsigned long);
        long                    (*round_rate)(struct clk *, unsigned long);
        void                    (*init)(struct clk *);
        int                     (*enable)(struct clk *);
        void                    (*disable)(struct clk *);
+       __u8                    enable_bit;
+       __s8                    usecount;
+       u8                      idlest_bit;
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
        u8                      fixed_div;
-       u16                     clksel_reg;
        u32                     clksel_mask;
        const struct clksel     *clksel;
        struct dpll_data        *dpll_data;
@@ -105,6 +103,7 @@ struct clk {
                const char              *name;
                struct clockdomain      *ptr;
        } clkdm;
+       u16                     clksel_reg;
        s16                     prcm_mod;
 #else
        __u8                    rate_offset;
@@ -118,6 +117,7 @@ struct clk {
 struct cpufreq_frequency_table;
 
 struct clk_functions {
+       int             (*clk_register)(struct clk *clk);
        int             (*clk_enable)(struct clk *clk);
        void            (*clk_disable)(struct clk *clk);
        long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
@@ -143,7 +143,6 @@ extern void followparent_recalc(struct clk *clk, unsigned long parent_rate,
                                u8 rate_storage);
 extern void clk_allow_idle(struct clk *clk);
 extern void clk_deny_idle(struct clk *clk);
-extern int clk_get_usecount(struct clk *clk);
 extern void clk_enable_init_clocks(void);
 #ifdef CONFIG_CPU_FREQ
 extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
@@ -153,16 +152,14 @@ void omap_clk_del_child(struct clk *clk, struct clk *clk2);
 
 /* Clock flags */
 #define RATE_CKCTL             (1 << 0)        /* Main fixed ratio clocks */
-#define RATE_FIXED             (1 << 1)        /* Fixed clock rate */
-
-#define VIRTUAL_CLOCK          (1 << 3)        /* Composite clock from table */
+/* bits 1-3 are currently free */
 #define ALWAYS_ENABLED         (1 << 4)        /* Clock cannot be disabled */
 #define ENABLE_REG_32BIT       (1 << 5)        /* Use 32-bit access */
-
+/* bit 6 is currently free */
 #define CLOCK_IDLE_CONTROL     (1 << 7)
 #define CLOCK_NO_IDLE_PARENT   (1 << 8)
 #define DELAYED_APP            (1 << 9)        /* Delay application of clock */
-#define CONFIG_PARTICIPANT     (1 << 10)       /* Fundamental clock */
+/* bit 10 is currently free */
 #define ENABLE_ON_INIT         (1 << 11)       /* Enable upon framework init */
 #define INVERT_ENABLE          (1 << 12)       /* 0 enables, 1 disables */
 #define WAIT_READY             (1 << 13)       /* wait for dev to leave idle */