]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/plat-omap/dmtimer.c
OMAP: dmtimer: enable all timers to be wakeup events
[linux-2.6-omap-h63xx.git] / arch / arm / plat-omap / dmtimer.c
index 963c31cd15416b69aacd5ae253e393f641de0e8a..ed397f04b09d5812bcc91c3d9cc2be277a4b7637 100644 (file)
@@ -237,7 +237,7 @@ static struct omap_dm_timer omap3_dm_timers[] = {
        { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
        { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
        { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
-       { .phys_base = 0x48304000, .irq = INT_24XX_GPTIMER12 },
+       { .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ },
 };
 
 static const char *omap3_dm_source_names[] __initdata = {
@@ -320,11 +320,9 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
        l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
 
        /*
-        * Enable wake-up only for GPT1 on OMAP2 CPUs.
-        * FIXME: All timers should have wake-up enabled and clear
-        * PRCM status.
+        * Enable wake-up on OMAP2 CPUs.
         */
-       if (cpu_class_is_omap2() && (timer == &dm_timers[0]))
+       if (cpu_class_is_omap2())
                l |= 1 << 2;
        omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
 
@@ -539,10 +537,6 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 
-       /* REVISIT: hw feature, ttgr overtaking tldr? */
-       while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)))
-               cpu_relax();
-
        omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 }
 
@@ -553,14 +547,15 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
        u32 l;
 
        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-       if (autoreload)
+       if (autoreload) {
                l |= OMAP_TIMER_CTRL_AR;
-       else
+               omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
+       } else {
                l &= ~OMAP_TIMER_CTRL_AR;
+       }
        l |= OMAP_TIMER_CTRL_ST;
 
        omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
-       omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 }