Merge branches 'at91', 'dyntick', 'ep93xx', 'iop', 'ixp', 'misc', 'orion', 'omap...

[linux-2.6-omap-h63xx.git] / arch / arm / mm / Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 750d895cd28705774cc640671bb5eb79b425d2fc..a2c8b006d7105597e6a71504cb9602dfb9fe04c2 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -365,7 +365,7 @@ config CPU_XSC3
 # Feroceon
 config CPU_FEROCEON
        bool
-       depends on ARCH_ORION5X
+       depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0
        default y
        select CPU_32v5
        select CPU_ABRT_EV5T
@@ -373,7 +373,7 @@ config CPU_FEROCEON
        select CPU_CACHE_VIVT
        select CPU_CP15_MMU
        select CPU_COPY_FEROCEON if MMU
-       select CPU_TLB_V4WBI if MMU
+       select CPU_TLB_FEROCEON if MMU
 
 config CPU_FEROCEON_OLD_ID
        bool "Accept early Feroceon cores with an ARM926 ID"
@@ -551,6 +551,11 @@ config CPU_TLB_V4WBI
          ARM Architecture Version 4 TLB with writeback cache and invalidate
          instruction cache entry.
 
+config CPU_TLB_FEROCEON
+       bool
+       help
+         Feroceon TLB (v4wbi with non-outer-cachable page table walks).
+
 config CPU_TLB_V6
        bool
 
@@ -709,6 +714,14 @@ config OUTER_CACHE
        bool
        default n
 
+config CACHE_FEROCEON_L2
+       bool "Enable the Feroceon L2 cache controller"
+       depends on ARCH_KIRKWOOD || ARCH_MV78XX0
+       default y
+       select OUTER_CACHE
+       help
+         This option enables the Feroceon L2 cache controller.
+
 config CACHE_L2X0
        bool "Enable the L2x0 outer cache controller"
        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176