Merge branch 's3c-move' into devel

[linux-2.6-omap-h63xx.git] / arch / arm / mach-s3c2442 / clock.c

diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c
index 5b9e830ac4d30a337529ad5e3609e786932f5954..ea1aa1f5157a7959b5080a42743a9ed2e2abe99b 100644 (file)
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2442/clock.c
@@ -33,16 +33,16 @@
 #include <linux/ioport.h>
 #include <linux/mutex.h>
 #include <linux/clk.h>
+#include <linux/io.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/atomic.h>
 #include <asm/irq.h>
-#include <asm/io.h>
 
-#include <asm/arch/regs-clock.h>
+#include <mach/regs-clock.h>
 
-#include <asm/plat-s3c24xx/clock.h>
-#include <asm/plat-s3c24xx/cpu.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
 
 /* S3C2442 extended clock support */
 
@@ -115,14 +115,9 @@ static struct clk s3c2442_clk_cam_upll = {
 
 static int s3c2442_clk_add(struct sys_device *sysdev)
 {
-       unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
-       unsigned long clkdivn;
+       struct clk *clock_upll;
        struct clk *clock_h;
        struct clk *clock_p;
-       struct clk *clock_upll;
-
-       printk("S3C2442: Clock Support, DVS %s\n",
-              (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
 
        clock_p = clk_get(NULL, "pclk");
        clock_h = clk_get(NULL, "hclk");
@@ -133,21 +128,6 @@ static int s3c2442_clk_add(struct sys_device *sysdev)
                return -EINVAL;
        }
 
-       /* check rate of UPLL, and if it is near 96MHz, then change
-        * to using half the UPLL rate for the system */
-
-       if (clk_get_rate(clock_upll) > (94 * MHZ)) {
-               clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
-
-               mutex_lock(&clocks_mutex);
-
-               clkdivn = __raw_readl(S3C2410_CLKDIVN);
-               clkdivn |= S3C2440_CLKDIVN_UCLK;
-               __raw_writel(clkdivn, S3C2410_CLKDIVN);
-
-               mutex_unlock(&clocks_mutex);
-       }
-
        s3c2442_clk_cam.parent = clock_h;
        s3c2442_clk_cam_upll.parent = clock_upll;