#include <linux/clockchips.h>
#include <asm/mach/time.h>
-#include <asm/arch/dmtimer.h>
+#include <mach/dmtimer.h>
static struct omap_dm_timer *gptimer;
static struct clock_event_device clockevent_gpt;
{
u32 tick_rate;
- gptimer = omap_dm_timer_request_specific(1);
+ gptimer = omap_dm_timer_request_specific(CONFIG_OMAP_TICK_GPTIMER);
BUG_ON(gptimer == NULL);
#if defined(CONFIG_OMAP_32K_TIMER)
#endif
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
+ pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
+ CONFIG_OMAP_TICK_GPTIMER, tick_rate);
+
omap2_gp_timer_irq.dev_id = (void *)gptimer;
setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
clockevent_gpt.max_delta_ns =
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
clockevent_gpt.min_delta_ns =
- clockevent_delta2ns(1, &clockevent_gpt);
+ clockevent_delta2ns(3, &clockevent_gpt);
+ /* Timer internal resynch latency. */
clockevent_gpt.cpumask = cpumask_of_cpu(0);
clockevents_register_device(&clockevent_gpt);