u32 opp1_nvalue, opp2_nvalue, opp3_nvalue, opp4_nvalue;
u32 opp5_nvalue;
u32 senp_mod, senn_mod;
- u32 srbase_addr;
- u32 vpbase_addr;
+ void __iomem *srbase_addr;
+ void __iomem *vpbase_addr;
};
/* Custom clocks to enable SR specific enable/disable functions. */
struct omap_sr *sr;
};
-#define SR_REGADDR(offs) (__force void __iomem *)(sr->srbase_addr + offset)
+#define SR_REGADDR(offs) (sr->srbase_addr + offset)
-static inline void sr_write_reg(struct omap_sr *sr, int offset, u32 value)
+static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
{
__raw_writel(value, SR_REGADDR(offset));
}
-static inline void sr_modify_reg(struct omap_sr *sr, int offset, u32 mask,
- u32 value)
+static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
+ u32 value)
{
u32 reg_val;
__raw_writel(reg_val, SR_REGADDR(offset));
}
-static inline u32 sr_read_reg(struct omap_sr *sr, int offset)
+static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
{
return __raw_readl(SR_REGADDR(offset));
}
int ret = 0;
u8 RdReg;
- if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+ if (system_rev > OMAP3430_REV_ES1_0) {
current_vdd1_opp = PRCM_VDD1_OPP3;
current_vdd2_opp = PRCM_VDD2_OPP3;
} else {