* Texas Instruments, <www.ti.com>
* Richard Woodruff <r-woodruff2@ti.com>
*
+ * (C) Copyright 2006 Nokia Corporation
+ * Fixed idle loop sleep
+ * Igor Stoppa <igor.stoppa@nokia.com>
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
#include <mach/io.h>
#include <mach/pm.h>
+#include <mach/omap24xx.h>
+
#include "sdrc.h"
/* First address of reserved address space? apparently valid for OMAP2 & 3 */
/*
* Forces OMAP into idle state
*
- * omap24xx_idle_loop_suspend() - This bit of code just executes the WFI
+ * omap242x_idle_loop_suspend() - This bit of code just executes the WFI
* for normal idles.
*
* Note: This code get's copied to internal SRAM at boot. When the OMAP
* wakes up it continues execution at the point it went to sleep.
*/
-ENTRY(omap24xx_idle_loop_suspend)
+ENTRY(omap242x_idle_loop_suspend)
stmfd sp!, {r0, lr} @ save registers on stack
- mov r0, #0 @ clear for mcr setup
+ mov r0, #0x0 @ clear for mrc call
mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
ldmfd sp!, {r0, pc} @ restore regs and return
-ENTRY(omap24xx_idle_loop_suspend_sz)
- .word . - omap24xx_idle_loop_suspend
+ENTRY(omap242x_idle_loop_suspend_sz)
+ .word . - omap242x_idle_loop_suspend
/*
* omap242x_cpu_suspend() - Forces OMAP into deep sleep state by completing
*
* Input:
* R0 : DLL ctrl value pre-Sleep
- * R1 : Processor+Revision
- * 2420: 0x21 = 242xES1, 0x26 = 242xES2.2
- * 2430: 0x31 = 2430ES1, 0x32 = 2430ES2
*
* The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on
* when we get called, but the DLL probably isn't. We will wait a bit more in
* The DLL load value is not kept in RETENTION or OFF. It needs to be restored
* at wake
*/
-ENTRY(omap24xx_cpu_suspend)
+ENTRY(omap242x_cpu_suspend)
stmfd sp!, {r0 - r12, lr} @ save registers on stack
mov r3, #0x0 @ clear for mrc call
mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished
nop
nop
- ldr r3, A_SDRC_POWER @ addr of sdrc power
+ ldr r3, omap2_ocs_sdrc_power @ addr of sdrc power
ldr r4, [r3] @ value of sdrc power
orr r4, r4, #0x40 @ enable self refresh on idle req
mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
ldr r4, [r4]
nop @ start auto refresh only after clk ok
movs r0, r0 @ see if DDR or SDR
- ldrne r1, A_SDRC_DLLA_CTRL_S @ get addr of DLL ctrl
+ ldrne r1, omap2_ocs_sdrc_dlla_ctrl @ get addr of DLL ctrl
strne r0, [r1] @ rewrite DLLA to force DLL reload
addne r1, r1, #0x8 @ move to DLLB
strne r0, [r1] @ rewrite DLLB to force DLL reload
/* resume*/
ldmfd sp!, {r0 - r12, pc} @ restore regs and return
-A_SDRC_POWER:
+omap2_ocs_sdrc_power:
.word OMAP242X_SDRC_REGADDR(SDRC_POWER)
A_SDRC0:
.word A_SDRC0_V
-A_SDRC_DLLA_CTRL_S:
+omap2_ocs_sdrc_dlla_ctrl:
.word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL)
-ENTRY(omap24xx_cpu_suspend_sz)
- .word . - omap24xx_cpu_suspend
+ENTRY(omap242x_cpu_suspend_sz)
+ .word . - omap242x_cpu_suspend