OMAP3: update ES level flags to discriminate between post-ES2 revisions

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / powerdomains34xx.h

diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h
index f573f71083983c28f22b88737c3b3ab6770a9760..6b9d1268a0d080f5e5b582fef965d1c423042376 100644 (file)
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -200,12 +200,31 @@ static struct powerdomain mpu_34xx_pwrdm = {
 };
 
 /* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_pwrdm = {
+static struct powerdomain core_34xx_es1_pwrdm = {
        .name             = "core_pwrdm",
        .prcm_offs        = CORE_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
+       .pwrsts           = PWRSTS_OFF_RET_ON,
+       .dep_bit          = OMAP3430_EN_CORE_SHIFT,
+       .banks            = 2,
+       .pwrsts_mem_ret   = {
+               [0] = PWRSTS_OFF_RET,    /* MEM1RETSTATE */
+               [1] = PWRSTS_OFF_RET,    /* MEM2RETSTATE */
+       },
+       .pwrsts_mem_on    = {
+               [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
+               [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
+       },
+};
+
+/* No wkdeps or sleepdeps for 34xx core apparently */
+static struct powerdomain core_34xx_es2_pwrdm = {
+       .name             = "core_pwrdm",
+       .prcm_offs        = CORE_MOD,
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .dep_bit          = OMAP3430_EN_CORE_SHIFT,
+       .flags            = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
        .banks            = 2,
        .pwrsts_mem_ret   = {
                [0] = PWRSTS_OFF_RET,    /* MEM1RETSTATE */
@@ -236,14 +255,19 @@ static struct powerdomain dss_pwrdm = {
        },
 };
 
+/*
+ * Although the 34XX TRM Rev K Table 4-371 notes that retention is a
+ * possible SGX powerstate, the SGX device itself does not support
+ * retention.
+ */
 static struct powerdomain sgx_pwrdm = {
        .name             = "sgx_pwrdm",
        .prcm_offs        = OMAP3430ES2_SGX_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
        .wkdep_srcs       = gfx_sgx_wkdeps,
        .sleepdep_srcs    = cam_gfx_sleepdeps,
        /* XXX This is accurate for 3430 SGX, but what about GFX? */
-       .pwrsts           = PWRSTS_OFF_RET_ON,
+       .pwrsts           = PWRSTS_OFF_ON,
        .pwrsts_logic_ret = PWRDM_POWER_RET,
        .banks            = 1,
        .pwrsts_mem_ret   = {
@@ -307,11 +331,12 @@ static struct powerdomain neon_pwrdm = {
 static struct powerdomain usbhost_pwrdm = {
        .name             = "usbhost_pwrdm",
        .prcm_offs        = OMAP3430ES2_USBHOST_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
        .wkdep_srcs       = per_usbhost_wkdeps,
        .sleepdep_srcs    = dss_per_usbhost_sleepdeps,
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .pwrsts_logic_ret = PWRDM_POWER_RET,
+       .flags            = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */
        .banks            = 1,
        .pwrsts_mem_ret   = {
                [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
@@ -321,6 +346,37 @@ static struct powerdomain usbhost_pwrdm = {
        },
 };
 
+static struct powerdomain dpll1_pwrdm = {
+       .name           = "dpll1_pwrdm",
+       .prcm_offs      = MPU_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll2_pwrdm = {
+       .name           = "dpll2_pwrdm",
+       .prcm_offs      = OMAP3430_IVA2_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll3_pwrdm = {
+       .name           = "dpll3_pwrdm",
+       .prcm_offs      = PLL_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll4_pwrdm = {
+       .name           = "dpll4_pwrdm",
+       .prcm_offs      = PLL_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll5_pwrdm = {
+       .name           = "dpll5_pwrdm",
+       .prcm_offs      = PLL_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
+};
+
+
 #endif    /* CONFIG_ARCH_OMAP34XX */