]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-omap2/powerdomains34xx.h
OMAP3 powerdomains: make USBTLL SAR only available on ES3.1 and beyond
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / powerdomains34xx.h
index 446a1edcb0824aed9849f3b0613179d7666021d8..4dcf94b800ab732c2aade542ad699c9d63eef180 100644 (file)
@@ -200,10 +200,12 @@ static struct powerdomain mpu_34xx_pwrdm = {
 };
 
 /* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_es1_pwrdm = {
+static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
        .name             = "core_pwrdm",
        .prcm_offs        = CORE_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
+                                          CHIP_IS_OMAP3430ES2 |
+                                          CHIP_IS_OMAP3430ES3_0),
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .dep_bit          = OMAP3430_EN_CORE_SHIFT,
        .banks            = 2,
@@ -218,10 +220,10 @@ static struct powerdomain core_34xx_es1_pwrdm = {
 };
 
 /* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_es2_pwrdm = {
+static struct powerdomain core_34xx_es3_1_pwrdm = {
        .name             = "core_pwrdm",
        .prcm_offs        = CORE_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .dep_bit          = OMAP3430_EN_CORE_SHIFT,
        .flags            = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
@@ -255,14 +257,19 @@ static struct powerdomain dss_pwrdm = {
        },
 };
 
+/*
+ * Although the 34XX TRM Rev K Table 4-371 notes that retention is a
+ * possible SGX powerstate, the SGX device itself does not support
+ * retention.
+ */
 static struct powerdomain sgx_pwrdm = {
        .name             = "sgx_pwrdm",
        .prcm_offs        = OMAP3430ES2_SGX_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
        .wkdep_srcs       = gfx_sgx_wkdeps,
        .sleepdep_srcs    = cam_gfx_sleepdeps,
        /* XXX This is accurate for 3430 SGX, but what about GFX? */
-       .pwrsts           = PWRSTS_OFF_RET_ON,
+       .pwrsts           = PWRSTS_OFF_ON,
        .pwrsts_logic_ret = PWRDM_POWER_RET,
        .banks            = 1,
        .pwrsts_mem_ret   = {
@@ -326,7 +333,7 @@ static struct powerdomain neon_pwrdm = {
 static struct powerdomain usbhost_pwrdm = {
        .name             = "usbhost_pwrdm",
        .prcm_offs        = OMAP3430ES2_USBHOST_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
        .wkdep_srcs       = per_usbhost_wkdeps,
        .sleepdep_srcs    = dss_per_usbhost_sleepdeps,
        .pwrsts           = PWRSTS_OFF_RET_ON,
@@ -368,7 +375,7 @@ static struct powerdomain dpll4_pwrdm = {
 static struct powerdomain dpll5_pwrdm = {
        .name           = "dpll5_pwrdm",
        .prcm_offs      = PLL_MOD,
-       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
 };