cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN);
}
- if (system_rev > OMAP3430_REV_ES1_0) {
+ if (omap_rev() > OMAP3430_REV_ES1_0) {
/* USBHOST */
wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST);
if (wkst) {
fck_core1 = cm_read_mod_reg(CORE_MOD,
CM_FCLKEN1);
- if (system_rev > OMAP3430_REV_ES1_0) {
+ if (omap_rev() > OMAP3430_REV_ES1_0) {
fck_core3 = cm_read_mod_reg(CORE_MOD,
OMAP3430ES2_CM_FCLKEN3);
fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
if (pwrdm == NULL || IS_ERR(pwrdm))
return -EINVAL;
- cur_state = pwrdm_read_next_pwrst(pwrdm);
+ while (!(pwrdm->pwrsts & (1 << state))) {
+ if (state == PWRDM_POWER_OFF)
+ return ret;
+ state--;
+ }
+ cur_state = pwrdm_read_next_pwrst(pwrdm);
if (cur_state == state)
return ret;
list_for_each_entry(pwrst, &pwrst_list, node) {
set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
- if (state != pwrst->next_state) {
+ if (state > pwrst->next_state) {
printk(KERN_INFO "Powerdomain (%s) didn't enter "
"target state %d\n",
pwrst->pwrdm->name, pwrst->next_state);
prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
- if (system_rev > OMAP3430_REV_ES1_0) {
+ if (omap_rev() > OMAP3430_REV_ES1_0) {
prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
} else
OMAP3430_AUTO_DES1,
CORE_MOD, CM_AUTOIDLE2);
- if (system_rev > OMAP3430_REV_ES1_0) {
+ if (omap_rev() > OMAP3430_REV_ES1_0) {
cm_write_mod_reg(
OMAP3430ES2_AUTO_USBTLL,
CORE_MOD, CM_AUTOIDLE3);
OMAP3430_PER_MOD,
CM_AUTOIDLE);
- if (system_rev > OMAP3430_REV_ES1_0) {
+ if (omap_rev() > OMAP3430_REV_ES1_0) {
cm_write_mod_reg(
OMAP3430ES2_AUTO_USBHOST,
OMAP3430ES2_USBHOST_MOD,
* Set all plls to autoidle. This is needed until autoidle is
* enabled by clockfw
*/
- cm_write_mod_reg(1 << OMAP3430_CLKTRCTRL_IVA2_SHIFT,
- OMAP3430_IVA2_MOD,
- CM_AUTOIDLE2);
+ cm_write_mod_reg(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT,
+ OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
cm_write_mod_reg(1 << OMAP3430_AUTO_MPU_DPLL_SHIFT,
MPU_MOD,
CM_AUTOIDLE2);
OMAP3_PRM_CLKSRC_CTRL_OFFSET);
/* setup wakup source */
- prm_write_mod_reg(OMAP3430_EN_IO | OMAP3430_EN_GPIO1 | OMAP3430_EN_GPT1,
+ prm_write_mod_reg(OMAP3430_EN_IO | OMAP3430_EN_GPIO1 |
+ OMAP3430_EN_GPT1 | OMAP3430_EN_GPT12,
WKUP_MOD, PM_WKEN);
/* No need to write EN_IO, that is always enabled */
- prm_write_mod_reg(OMAP3430_EN_GPIO1 | OMAP3430_EN_GPT1,
+ prm_write_mod_reg(OMAP3430_EN_GPIO1 | OMAP3430_EN_GPT1 |
+ OMAP3430_EN_GPT12,
WKUP_MOD, OMAP3430_PM_MPUGRPSEL);
/* For some reason IO doesn't generate wakeup event even if
* it is selected to mpu wakeup goup */
int __init omap3_pm_init(void)
{
- struct power_state *pwrst;
+ struct power_state *pwrst, *tmp;
int ret;
printk(KERN_ERR "Power Management for TI OMAP3.\n");
return ret;
err2:
free_irq(INT_34XX_PRCM_MPU_IRQ, NULL);
- list_for_each_entry(pwrst, &pwrst_list, node) {
+ list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) {
list_del(&pwrst->node);
kfree(pwrst);
}
OMAP3_PRM_VC_I2C_CFG_OFFSET);
/* Setup voltctrl and other setup times */
-
-#ifdef CONFIG_OMAP_SYSOFFMODE
- prm_write_mod_reg(OMAP3430_AUTO_OFF | OMAP3430_AUTO_RET |
- OMAP3430_SEL_OFF, OMAP3430_GR_MOD,
+ prm_write_mod_reg(OMAP3430_AUTO_RET, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTOFFSET_OFFSET);
prm_write_mod_reg(OMAP3430_VOLTSETUP2_DURATION, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTSETUP2_OFFSET);
-#else
- prm_set_mod_reg_bits(OMAP3430_AUTO_RET, OMAP3430_GR_MOD,
- OMAP3_PRM_VOLTCTRL_OFFSET);
-#endif
-
}
static int __init omap3_pm_early_init(void)