cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN);
}
- if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+ if (system_rev > OMAP3430_REV_ES1_0) {
/* USBHOST */
wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST);
if (wkst) {
printk(KERN_ERR "Invalid mpu state in sram_idle\n");
return;
}
+ /* Disable smartreflex before entering WFI */
+ disable_smartreflex(SR1);
+ disable_smartreflex(SR2);
omap2_gpio_prepare_for_retention();
_omap_sram_idle(NULL, save_state);
omap2_gpio_resume_after_retention();
+
+ /* Enable smartreflex after WFI */
+ enable_smartreflex(SR1);
+ enable_smartreflex(SR2);
}
/*
fck_core1 = cm_read_mod_reg(CORE_MOD,
CM_FCLKEN1);
- if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+ if (system_rev > OMAP3430_REV_ES1_0) {
fck_core3 = cm_read_mod_reg(CORE_MOD,
OMAP3430ES2_CM_FCLKEN3);
fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
return 1;
}
-/* _clkdm_deny_idle - private callback function used by set_pwrdm_state() */
-static int _clkdm_deny_idle(struct powerdomain *pwrdm,
- struct clockdomain *clkdm)
-{
- omap2_clkdm_deny_idle(clkdm);
- return 0;
-}
-
-/* _clkdm_allow_idle - private callback function used by set_pwrdm_state() */
-static int _clkdm_allow_idle(struct powerdomain *pwrdm,
- struct clockdomain *clkdm)
-{
- omap2_clkdm_allow_idle(clkdm);
- return 0;
-}
-
/* This sets pwrdm state (other than mpu & core. Currently only ON &
* RET are supported. Function is assuming that clkdm doesn't have
* hw_sup mode enabled. */
static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
{
u32 cur_state;
+ int sleep_switch = 0;
int ret = 0;
if (pwrdm == NULL || IS_ERR(pwrdm))
if (cur_state == state)
return ret;
- pwrdm_for_each_clkdm(pwrdm, _clkdm_deny_idle);
+ if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) {
+ omap2_clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
+ sleep_switch = 1;
+ pwrdm_wait_transition(pwrdm);
+ }
ret = pwrdm_set_next_pwrst(pwrdm, state);
if (ret) {
goto err;
}
- pwrdm_for_each_clkdm(pwrdm, _clkdm_allow_idle);
+ if (sleep_switch) {
+ omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
+ pwrdm_wait_transition(pwrdm);
+ }
err:
return ret;
struct power_state *pwrst;
int state, ret = 0;
- /* XXX Disable smartreflex before entering suspend */
- disable_smartreflex(SR1);
- disable_smartreflex(SR2);
-
/* Read current next_pwrsts */
list_for_each_entry(pwrst, &pwrst_list, node)
pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
printk(KERN_INFO "Successfully put all powerdomains "
"to target state\n");
- /* XXX Enable smartreflex after suspend */
- enable_smartreflex(SR1);
- enable_smartreflex(SR2);
-
return ret;
}
prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
- if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+ if (system_rev > OMAP3430_REV_ES1_0) {
prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
} else
OMAP3430_AUTO_DES1,
CORE_MOD, CM_AUTOIDLE2);
- if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+ if (system_rev > OMAP3430_REV_ES1_0) {
cm_write_mod_reg(
OMAP3430ES2_AUTO_USBTLL,
CORE_MOD, CM_AUTOIDLE3);
OMAP3430_PER_MOD,
CM_AUTOIDLE);
- if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
+ if (system_rev > OMAP3430_REV_ES1_0) {
cm_write_mod_reg(
OMAP3430ES2_AUTO_USBHOST,
OMAP3430ES2_USBHOST_MOD,
return set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
}
+static int __init clkdms_setup(struct clockdomain *clkdm)
+{
+ omap2_clkdm_allow_idle(clkdm);
+ return 0;
+}
+
int __init omap3_pm_init(void)
{
struct power_state *pwrst;
goto err2;
}
+ (void) clkdm_for_each(clkdms_setup);
+
mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
if (mpu_pwrdm == NULL) {
printk(KERN_ERR "Failed to get mpu_pwrdm\n");
OMAP3_PRM_VC_I2C_CFG_OFFSET);
/* Setup voltctrl and other setup times */
-
-#ifdef CONFIG_OMAP_SYSOFFMODE
- prm_write_mod_reg(OMAP3430_AUTO_OFF | OMAP3430_AUTO_RET |
- OMAP3430_SEL_OFF, OMAP3430_GR_MOD,
+ prm_write_mod_reg(OMAP3430_AUTO_RET, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTOFFSET_OFFSET);
prm_write_mod_reg(OMAP3430_VOLTSETUP2_DURATION, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTSETUP2_OFFSET);
-#else
- prm_set_mod_reg_bits(OMAP3430_AUTO_RET, OMAP3430_GR_MOD,
- OMAP3_PRM_VOLTCTRL_OFFSET);
-#endif
-
}
static int __init omap3_pm_early_init(void)