/*
- * Mailbox reservation modules for OMAP2
+ * Mailbox reservation modules for OMAP2/3
*
- * Copyright (C) 2006 Nokia Corporation
+ * Copyright (C) 2006-2008 Nokia Corporation
* Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- * and Paul Mundt <paul.mundt@nokia.com>
+ * and Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/platform_device.h>
-#include <asm/arch/mailbox.h>
-#include <asm/arch/irqs.h>
+#include <mach/mailbox.h>
+#include <mach/irqs.h>
#include <asm/io.h>
-#define MAILBOX_REVISION 0x00
-#define MAILBOX_SYSCONFIG 0x10
-#define MAILBOX_SYSSTATUS 0x14
-#define MAILBOX_MESSAGE_0 0x40
-#define MAILBOX_MESSAGE_1 0x44
-#define MAILBOX_MESSAGE_2 0x48
-#define MAILBOX_MESSAGE_3 0x4c
-#define MAILBOX_MESSAGE_4 0x50
-#define MAILBOX_MESSAGE_5 0x54
-#define MAILBOX_FIFOSTATUS_0 0x80
-#define MAILBOX_FIFOSTATUS_1 0x84
-#define MAILBOX_FIFOSTATUS_2 0x88
-#define MAILBOX_FIFOSTATUS_3 0x8c
-#define MAILBOX_FIFOSTATUS_4 0x90
-#define MAILBOX_FIFOSTATUS_5 0x94
-#define MAILBOX_MSGSTATUS_0 0xc0
-#define MAILBOX_MSGSTATUS_1 0xc4
-#define MAILBOX_MSGSTATUS_2 0xc8
-#define MAILBOX_MSGSTATUS_3 0xcc
-#define MAILBOX_MSGSTATUS_4 0xd0
-#define MAILBOX_MSGSTATUS_5 0xd4
-#define MAILBOX_IRQSTATUS_0 0x100
-#define MAILBOX_IRQENABLE_0 0x104
-#define MAILBOX_IRQSTATUS_1 0x108
-#define MAILBOX_IRQENABLE_1 0x10c
-#define MAILBOX_IRQSTATUS_2 0x110
-#define MAILBOX_IRQENABLE_2 0x114
-#define MAILBOX_IRQSTATUS_3 0x118
-#define MAILBOX_IRQENABLE_3 0x11c
-
-static unsigned long mbox_base;
-
-#define MAILBOX_IRQ_NOTFULL(n) (1 << (2 * (n) + 1))
-#define MAILBOX_IRQ_NEWMSG(n) (1 << (2 * (n)))
+#define DRV_NAME "omap2-mailbox"
+
+#define MAILBOX_REVISION 0x000
+#define MAILBOX_SYSCONFIG 0x010
+#define MAILBOX_SYSSTATUS 0x014
+#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
+#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
+#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
+#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
+#define MAILBOX_IRQENABLE(u) (0x108 + 8 * (u))
+
+#define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
+#define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
+
+static void __iomem *mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
static struct clk *mbox_ick_handle;
-static inline unsigned int mbox_read_reg(unsigned int reg)
+static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
+ omap_mbox_type_t irq);
+
+static inline unsigned int mbox_read_reg(size_t ofs)
{
- return __raw_readl(mbox_base + reg);
+ return __raw_readl(mbox_base + ofs);
}
-static inline void mbox_write_reg(unsigned int val, unsigned int reg)
+static inline void mbox_write_reg(u32 val, size_t ofs)
{
- __raw_writel(val, mbox_base + reg);
+ __raw_writel(val, mbox_base + ofs);
}
/* Mailbox H/W preparations */
-static inline int omap2_mbox_startup(struct omap_mbox *mbox)
+static int omap2_mbox_startup(struct omap_mbox *mbox)
{
unsigned int l;
}
clk_enable(mbox_ick_handle);
+ l = mbox_read_reg(MAILBOX_REVISION);
+ pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
+
/* set smart-idle & autoidle */
l = mbox_read_reg(MAILBOX_SYSCONFIG);
l |= 0x00000011;
mbox_write_reg(l, MAILBOX_SYSCONFIG);
+ omap2_mbox_enable_irq(mbox, IRQ_RX);
+
return 0;
}
-static inline void omap2_mbox_shutdown(struct omap_mbox *mbox)
+static void omap2_mbox_shutdown(struct omap_mbox *mbox)
{
clk_disable(mbox_ick_handle);
clk_put(mbox_ick_handle);
}
/* Mailbox FIFO handle functions */
-static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
+static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
{
struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
return (mbox_msg_t) mbox_read_reg(fifo->msg);
}
-static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
+static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
{
struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
mbox_write_reg(msg, fifo->msg);
}
-static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
+static int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
{
struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
return (mbox_read_reg(fifo->msg_stat) == 0);
}
-static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox)
+static int omap2_mbox_fifo_full(struct omap_mbox *mbox)
{
struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
}
/* Mailbox IRQ handle functions */
-static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox,
+static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq)
{
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
mbox_write_reg(l, p->irqenable);
}
-static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox,
+static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq)
{
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
mbox_write_reg(l, p->irqenable);
}
-static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox,
+static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq)
{
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
mbox_write_reg(bit, p->irqstatus);
}
-static inline int omap2_mbox_is_irq(struct omap_mbox *mbox,
+static int omap2_mbox_is_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq)
{
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
/* DSP */
static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
.tx_fifo = {
- .msg = MAILBOX_MESSAGE_0,
- .fifo_stat = MAILBOX_FIFOSTATUS_0,
+ .msg = MAILBOX_MESSAGE(0),
+ .fifo_stat = MAILBOX_FIFOSTATUS(0),
},
.rx_fifo = {
- .msg = MAILBOX_MESSAGE_1,
- .msg_stat = MAILBOX_MSGSTATUS_1,
+ .msg = MAILBOX_MESSAGE(1),
+ .msg_stat = MAILBOX_MSGSTATUS(1),
},
- .irqenable = MAILBOX_IRQENABLE_0,
- .irqstatus = MAILBOX_IRQSTATUS_0,
+ .irqenable = MAILBOX_IRQENABLE(0),
+ .irqstatus = MAILBOX_IRQSTATUS(0),
.notfull_bit = MAILBOX_IRQ_NOTFULL(0),
.newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
};
};
EXPORT_SYMBOL(mbox_dsp_info);
-/* IVA */
+#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
static struct omap_mbox2_priv omap2_mbox_iva_priv = {
.tx_fifo = {
- .msg = MAILBOX_MESSAGE_2,
- .fifo_stat = MAILBOX_FIFOSTATUS_2,
+ .msg = MAILBOX_MESSAGE(2),
+ .fifo_stat = MAILBOX_FIFOSTATUS(2),
},
.rx_fifo = {
- .msg = MAILBOX_MESSAGE_3,
- .msg_stat = MAILBOX_MSGSTATUS_3,
+ .msg = MAILBOX_MESSAGE(3),
+ .msg_stat = MAILBOX_MSGSTATUS(3),
},
- .irqenable = MAILBOX_IRQENABLE_3,
- .irqstatus = MAILBOX_IRQSTATUS_3,
+ .irqenable = MAILBOX_IRQENABLE(3),
+ .irqstatus = MAILBOX_IRQSTATUS(3),
.notfull_bit = MAILBOX_IRQ_NOTFULL(2),
.newmsg_bit = MAILBOX_IRQ_NEWMSG(3),
};
.ops = &omap2_mbox_ops,
.priv = &omap2_mbox_iva_priv,
};
+#endif
-static int __init omap2_mbox_probe(struct platform_device *pdev)
+static int __devinit omap2_mbox_probe(struct platform_device *pdev)
{
struct resource *res;
- int ret = 0;
-
- if (pdev->num_resources != 3) {
- dev_err(&pdev->dev, "invalid number of resources: %d\n",
- pdev->num_resources);
- return -ENODEV;
- }
+ int ret;
/* MBOX base */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
dev_err(&pdev->dev, "invalid mem resource\n");
return -ENODEV;
}
- mbox_base = res->start;
+ mbox_base = ioremap(res->start, res->end - res->start);
+ if (!mbox_base)
+ return -ENOMEM;
- /* DSP IRQ */
+ /* DSP or IVA2 IRQ */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(!res)) {
dev_err(&pdev->dev, "invalid irq resource\n");
- return -ENODEV;
+ ret = -ENODEV;
+ goto err_dsp;
}
mbox_dsp_info.irq = res->start;
- ret = omap_mbox_register(&mbox_dsp_info);
-
- /* IVA IRQ */
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
- if (unlikely(!res)) {
- dev_err(&pdev->dev, "invalid irq resource\n");
- return -ENODEV;
+ ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info);
+ if (ret)
+ goto err_dsp;
+
+#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
+ if (cpu_is_omap2420()) {
+ /* IVA IRQ */
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
+ if (unlikely(!res)) {
+ dev_err(&pdev->dev, "invalid irq resource\n");
+ ret = -ENODEV;
+ goto err_iva1;
+ }
+ mbox_iva_info.irq = res->start;
+ ret = omap_mbox_register(&pdev->dev, &mbox_iva_info);
+ if (ret)
+ goto err_iva1;
}
- mbox_iva_info.irq = res->start;
-
- ret = omap_mbox_register(&mbox_iva_info);
+#endif
+ return 0;
+err_iva1:
+ omap_mbox_unregister(&mbox_dsp_info);
+err_dsp:
+ iounmap(mbox_base);
return ret;
}
-static int omap2_mbox_remove(struct platform_device *pdev)
+static int __devexit omap2_mbox_remove(struct platform_device *pdev)
{
+#if defined(CONFIG_ARCH_OMAP2420)
+ omap_mbox_unregister(&mbox_iva_info);
+#endif
omap_mbox_unregister(&mbox_dsp_info);
+ iounmap(mbox_base);
return 0;
}
static struct platform_driver omap2_mbox_driver = {
.probe = omap2_mbox_probe,
- .remove = omap2_mbox_remove,
+ .remove = __devexit_p(omap2_mbox_remove),
.driver = {
- .name = "mailbox",
+ .name = DRV_NAME,
},
};
module_init(omap2_mbox_init);
module_exit(omap2_mbox_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("omap mailbox: omap2/3 architecture specific functions");
+MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt");
+MODULE_ALIAS("platform:"DRV_NAME);
projects / linux-2.6-omap-h63xx.git / blobdiff