Adding csi2_fck declaration to clock34xx.h

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / cm-regbits-34xx.h

diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 6ec66f49f044eff6471d333ee3fcbaf51451b904..1b5d1230b80009b4a22814fe7a8a8fbd5704785e 100644 (file)
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -190,11 +190,12 @@
 #define OMAP3430_ST_MSPRO                              (1 << 23)
 #define OMAP3430_ST_HDQ                                        (1 << 22)
 #define OMAP3430ES1_ST_FAC                             (1 << 8)
+#define OMAP3430ES2_ST_SSI_IDLE                                (1 << 8)
 #define OMAP3430ES1_ST_MAILBOXES                       (1 << 7)
 #define OMAP3430_ST_OMAPCTRL                           (1 << 6)
 #define OMAP3430_ST_SDMA                               (1 << 2)
 #define OMAP3430_ST_SDRC                               (1 << 1)
-#define OMAP3430_ST_SSI                                        (1 << 0)
+#define OMAP3430_ST_SSI_STDBY                          (1 << 0)
 
 /* CM_IDLEST2_CORE */
 #define OMAP3430_ST_PKA                                        (1 << 4)
@@ -456,8 +457,12 @@
 #define OMAP3430_CORE_DPLL_MULT_MASK                   (0x7ff << 16)
 #define OMAP3430_CORE_DPLL_DIV_SHIFT                   8
 #define OMAP3430_CORE_DPLL_DIV_MASK                    (0x7f << 8)
-#define OMAP3430_SOURCE_54M                            (1 << 5)
-#define OMAP3430_SOURCE_48M                            (1 << 3)
+#define OMAP3430_SOURCE_96M_SHIFT                      6
+#define OMAP3430_SOURCE_96M_MASK                       (1 << 6)
+#define OMAP3430_SOURCE_54M_SHIFT                      5
+#define OMAP3430_SOURCE_54M_MASK                       (1 << 5)
+#define OMAP3430_SOURCE_48M_SHIFT                      3
+#define OMAP3430_SOURCE_48M_MASK                       (1 << 3)
 
 /* CM_CLKSEL2_PLL */
 #define OMAP3430_PERIPH_DPLL_MULT_SHIFT                        8
@@ -500,7 +505,9 @@
 #define OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT            0
 
 /* CM_IDLEST_DSS */
-#define OMAP3430_ST_DSS                                        (1 << 0)
+#define OMAP3430ES2_ST_DSS_IDLE                                (1 << 1)
+#define OMAP3430ES2_ST_DSS_STDBY                       (1 << 0)
+#define OMAP3430ES1_ST_DSS                             (1 << 0)
 
 /* CM_AUTOIDLE_DSS */
 #define OMAP3430_AUTO_DSS                              (1 << 0)
@@ -523,6 +530,8 @@
 #define OMAP3430_CLKACTIVITY_DSS_MASK                  (1 << 0)
 
 /* CM_FCLKEN_CAM specific bits */
+#define OMAP3430_EN_CSI2                               (1 << 1)
+#define OMAP3430_EN_CSI2_SHIFT                         1
 
 /* CM_ICLKEN_CAM specific bits */
 
@@ -683,6 +692,8 @@
 #define OMAP3430ES2_EN_USBHOST_MASK                    (1 << 0)
 
 /* CM_IDLEST_USBHOST */
+#define OMAP3430ES2_ST_USBHOST_IDLE                    (1 << 1)
+#define OMAP3430ES2_ST_USBHOST_STDBY                   (1 << 0)
 
 /* CM_AUTOIDLE_USBHOST */
 #define OMAP3430ES2_AUTO_USBHOST_SHIFT                 0