]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-omap2/clock34xx.h
OMAP3: GPIO: Enable debounce clock only when debounce is enabled v3.
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock34xx.h
index 8ce7097544f52063ed61fb54bf222b80ad8ea52f..4adf78e2201ad70b55b61536f18b8cf78430207f 100644 (file)
@@ -2519,8 +2519,8 @@ static struct clk wkup_32k_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio1_fck = {
-       .name           = "gpio1_fck",
+static struct clk gpio1_dbck = {
+       .name           = "gpio1_dbck",
        .parent         = &wkup_32k_fck,
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_FCLKEN,
@@ -2797,8 +2797,8 @@ static struct clk per_32k_alwon_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio6_fck = {
-       .name           = "gpio6_fck",
+static struct clk gpio6_dbck = {
+       .name           = "gpio6_dbck",
        .parent         = &per_32k_alwon_fck,
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
@@ -2809,8 +2809,8 @@ static struct clk gpio6_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio5_fck = {
-       .name           = "gpio5_fck",
+static struct clk gpio5_dbck = {
+       .name           = "gpio5_dbck",
        .parent         = &per_32k_alwon_fck,
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
@@ -2821,8 +2821,8 @@ static struct clk gpio5_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio4_fck = {
-       .name           = "gpio4_fck",
+static struct clk gpio4_dbck = {
+       .name           = "gpio4_dbck",
        .parent         = &per_32k_alwon_fck,
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
@@ -2833,8 +2833,8 @@ static struct clk gpio4_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio3_fck = {
-       .name           = "gpio3_fck",
+static struct clk gpio3_dbck = {
+       .name           = "gpio3_dbck",
        .parent         = &per_32k_alwon_fck,
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
@@ -2845,8 +2845,8 @@ static struct clk gpio3_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk gpio2_fck = {
-       .name           = "gpio2_fck",
+static struct clk gpio2_dbck = {
+       .name           = "gpio2_dbck",
        .parent         = &per_32k_alwon_fck,
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
@@ -3545,7 +3545,7 @@ static struct clk *onchip_34xx_clks[] __initdata = {
        &usim_fck,
        &gpt1_fck,
        &wkup_32k_fck,
-       &gpio1_fck,
+       &gpio1_dbck,
        &wdt2_fck,
        &wkup_l4_ick,
        &usim_ick,
@@ -3567,11 +3567,11 @@ static struct clk *onchip_34xx_clks[] __initdata = {
        &gpt8_fck,
        &gpt9_fck,
        &per_32k_alwon_fck,
-       &gpio6_fck,
-       &gpio5_fck,
-       &gpio4_fck,
-       &gpio3_fck,
-       &gpio2_fck,
+       &gpio6_dbck,
+       &gpio5_dbck,
+       &gpio4_dbck,
+       &gpio3_dbck,
+       &gpio2_dbck,
        &wdt3_fck,
        &per_l4_ick,
        &gpio6_ick,