OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock34xx.h

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 4adf78e2201ad70b55b61536f18b8cf78430207f..0b95fcbb51f1987d7087f739efc51f1158310c0e 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -292,6 +292,7 @@ static struct dpll_data dpll1_dd = {
        .idlest_mask    = OMAP3430_ST_MPU_CLK_MASK,
        .bypass_clk     = &dpll1_fck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -367,6 +368,7 @@ static struct dpll_data dpll2_dd = {
        .idlest_mask    = OMAP3430_ST_IVA2_CLK_MASK,
        .bypass_clk     = &dpll2_fck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -429,6 +431,7 @@ static struct dpll_data dpll3_dd = {
        .idlest_mask    = OMAP3430_ST_CORE_CLK_MASK,
        .bypass_clk     = &sys_ck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -594,6 +597,7 @@ static struct dpll_data dpll4_dd = {
        .idlest_mask    = OMAP3430_ST_PERIPH_CLK_MASK,
        .bypass_clk     = &sys_ck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -920,6 +924,7 @@ static struct dpll_data dpll5_dd = {
        .idlest_mask    = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
        .bypass_clk     = &sys_ck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -2304,7 +2309,7 @@ static struct clk dss1_alwon_fck_3430es1 = {
        .prcm_mod       = OMAP3430_DSS_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_DSS1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP3430ES1,
        .clkdm          = { .name = "dss_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2317,7 +2322,7 @@ static struct clk dss1_alwon_fck_3430es2 = {
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_DSS1_SHIFT,
        .idlest_bit     = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "dss_clkdm" },
        .recalc         = &followparent_recalc,
 };