OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock34xx.h

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 41f91f8cd5da2b4bd97379471216a3b9c49da74b..044a3ff56d13fda683284f9abd5f4511b5c2a66b 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -310,7 +310,7 @@ static struct dpll_data dpll1_dd = {
        .autoidle_reg   = _OMAP34XX_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL),
        .autoidle_mask  = OMAP3430_AUTO_MPU_DPLL_MASK,
        .idlest_reg     = _OMAP34XX_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
-       .idlest_bit     = OMAP3430_ST_MPU_CLK_SHIFT,
+       .idlest_mask    = OMAP3430_ST_MPU_CLK_MASK,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -382,7 +382,7 @@ static struct dpll_data dpll2_dd = {
        .autoidle_reg   = _OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL),
        .autoidle_mask  = OMAP3430_AUTO_IVA2_DPLL_MASK,
        .idlest_reg     = _OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL),
-       .idlest_bit     = OMAP3430_ST_IVA2_CLK_SHIFT,
+       .idlest_mask    = OMAP3430_ST_IVA2_CLK_MASK,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -628,7 +628,7 @@ static struct dpll_data dpll4_dd = {
        .autoidle_reg   = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
        .autoidle_mask  = OMAP3430_AUTO_PERIPH_DPLL_MASK,
        .idlest_reg     = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST),
-       .idlest_bit     = OMAP3430_ST_PERIPH_CLK_SHIFT,
+       .idlest_mask    = OMAP3430_ST_PERIPH_CLK_MASK,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -968,7 +968,7 @@ static struct dpll_data dpll5_dd = {
        .autoidle_reg   = _OMAP34XX_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL),
        .autoidle_mask  = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK,
        .idlest_reg     = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST2),
-       .idlest_bit     = OMAP3430ES2_ST_PERIPH2_CLK_SHIFT,
+       .idlest_mask    = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE