OMAP clock: move rate recalc, propagation code up to plat-omap/clock.c

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock34xx.c

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index b8b44947b05eee83fc12db87698db0d4a89544a3..22cbccedad8657cc099d4a31913d7cc1222c7bbc 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -54,8 +54,6 @@
 static void omap3_dpll_recalc(struct clk *clk)
 {
        clk->rate = omap2_get_dpll_rate(clk);
-
-       propagate_rate(clk);
 }
 
 /* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
@@ -429,8 +427,6 @@ static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
 
        }
 
-       omap3_dpll_recalc(clk);
-
        return 0;
 }
 
@@ -493,8 +489,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
                                  sp->actim_ctrlb, new_div);
        local_irq_enable();
 
-       omap2_clksel_recalc(clk);
-
        return 0;
 }
 
@@ -604,16 +598,14 @@ static void omap3_clkoutx2_recalc(struct clk *clk)
 
        dd = pclk->dpll_data;
 
-       WARN_ON(!dd->idlest_reg || !dd->idlest_mask);
+       WARN_ON(!dd->enable_mask);
 
-       v = cm_read_mod_reg(pclk->prcm_mod, dd->idlest_reg) & dd->idlest_mask;
-       if (!v)
+       v = cm_read_mod_reg(pclk->prcm_mod, dd->control_reg) & dd->enable_mask;
+       v >>= __ffs(dd->enable_mask);
+       if (v != OMAP3XXX_EN_DPLL_LOCKED)
                clk->rate = clk->parent->rate;
        else
                clk->rate = clk->parent->rate * 2;
-
-       if (clk->flags & RATE_PROPAGATES)
-               propagate_rate(clk);
 }
 
 /* Common clock code */
@@ -630,6 +622,7 @@ static struct clk_functions omap2_clk_functions = {
        .clk_round_rate         = omap2_clk_round_rate,
        .clk_set_rate           = omap2_clk_set_rate,
        .clk_set_parent         = omap2_clk_set_parent,
+       .clk_get_parent         = omap2_clk_get_parent,
        .clk_disable_unused     = omap2_clk_disable_unused,
 };
 
@@ -663,7 +656,7 @@ static int __init omap2_clk_arch_init(void)
 
        /* REVISIT: not yet ready for 343x */
 #if 0
-       if (omap2_select_table_rate(&virt_prcm_set, mpurate))
+       if (clk_set_rate(&virt_prcm_set, mpurate))
                printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif