OMAP2/3 clock: use clk->prcm_mod for all struct clk register addressing

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock24xx.h
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h

index 39b654f275be1a3515d8c07139bf541dc508d111..41f9e2cedbe2bb0e1ef8fbf94b548282a01d2fa5 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -600,13 +600,6 @@ static struct prcm_config rate_table[] = {
         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
  };
  
-/*
- * Since 2420 and 2430 have different cm_base, we use offsets only here.
- * Clock code will rewrite the register address as needed.
- */
-#define _CM_REG_OFFSET(module, reg)    ((void __iomem *)(module) + (reg))
-#define _GR_MOD_OFFSET(reg)    ((void __iomem*)(OMAP24XX_GR_MOD + (reg)))
-
  /*-------------------------------------------------------------------------
   * 24xx clock tree.
   *
@@ -633,7 +626,7 @@ static struct clk func_32k_ck = {
         .rate           = 32000,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "prm_clkdm" },
         .recalc         = &propagate_rate,
  };
  
@@ -642,7 +635,7 @@ static struct clk osc_ck = {                /* (*12, *13, 19.2, *26, 38.4)MHz */
         .name           = "osc_ck",
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_PROPAGATES,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "prm_clkdm" },
         .enable         = &omap2_enable_osc_ck,
         .disable        = &omap2_disable_osc_ck,
         .recalc         = &omap2_osc_clk_recalc,
@@ -654,7 +647,7 @@ static struct clk sys_ck = {                /* (*12, *13, 19.2, 26, 38.4)MHz */
         .parent         = &osc_ck,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "prm_clkdm" },
         .recalc         = &omap2_sys_clk_recalc,
  };
  
@@ -663,7 +656,7 @@ static struct clk alt_ck = {                /* Typical 54M or 48M, may not exist */
         .rate           = 54000000,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "prm_clkdm" },
         .recalc         = &propagate_rate,
  };
  
@@ -677,9 +670,11 @@ static struct clk alt_ck = {               /* Typical 54M or 48M, may not exist */
   */
  
  static struct dpll_data dpll_dd = {
-       .mult_div1_reg          = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
+       .mult_div1_reg          = CM_CLKSEL1,
         .mult_mask              = OMAP24XX_DPLL_MULT_MASK,
         .div1_mask              = OMAP24XX_DPLL_DIV_MASK,
+       .idlest_reg             = CM_IDLEST,
+       .idlest_mask            = OMAP24XX_ST_CORE_CLK_MASK,
         .max_multiplier         = 1024,
         .max_divider            = 16,
         .rate_tolerance         = DEFAULT_DPLL_RATE_TOLERANCE
@@ -692,10 +687,11 @@ static struct dpll_data dpll_dd = {
  static struct clk dpll_ck = {
         .name           = "dpll_ck",
         .parent         = &sys_ck,              /* Can be func_32k also */
+       .prcm_mod       = PLL_MOD,
         .dpll_data      = &dpll_dd,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_PROPAGATES | ALWAYS_ENABLED,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "prm_clkdm" },
         .recalc         = &omap2_dpllcore_recalc,
         .set_rate       = &omap2_reprogram_dpllcore,
  };
@@ -703,11 +699,12 @@ static struct clk dpll_ck = {
  static struct clk apll96_ck = {
         .name           = "apll96_ck",
         .parent         = &sys_ck,
+       .prcm_mod       = PLL_MOD,
         .rate           = 96000000,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = CM_CLKEN,
         .enable_bit     = OMAP24XX_EN_96M_PLL_SHIFT,
         .enable         = &omap2_clk_fixed_enable,
         .disable        = &omap2_clk_fixed_disable,
@@ -717,11 +714,12 @@ static struct clk apll96_ck = {
  static struct clk apll54_ck = {
         .name           = "apll54_ck",
         .parent         = &sys_ck,
+       .prcm_mod       = PLL_MOD,
         .rate           = 54000000,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = CM_CLKEN,
         .enable_bit     = OMAP24XX_EN_54M_PLL_SHIFT,
         .enable         = &omap2_clk_fixed_enable,
         .disable        = &omap2_clk_fixed_disable,
@@ -753,11 +751,12 @@ static const struct clksel func_54m_clksel[] = {
  static struct clk func_54m_ck = {
         .name           = "func_54m_ck",
         .parent         = &apll54_ck,   /* can also be alt_clk */
+       .prcm_mod       = PLL_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "cm_clkdm" },
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_54M_SOURCE,
         .clksel         = func_54m_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -768,7 +767,7 @@ static struct clk core_ck = {
         .parent         = &dpll_ck,             /* can also be 32k */
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ALWAYS_ENABLED | RATE_PROPAGATES,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "cm_clkdm" },
         .recalc         = &followparent_recalc,
  };
  
@@ -793,11 +792,12 @@ static const struct clksel func_96m_clksel[] = {
  static struct clk func_96m_ck = {
         .name           = "func_96m_ck",
         .parent         = &apll96_ck,
+       .prcm_mod       = PLL_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "cm_clkdm" },
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP2430_96M_SOURCE,
         .clksel         = func_96m_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -826,11 +826,12 @@ static const struct clksel func_48m_clksel[] = {
  static struct clk func_48m_ck = {
         .name           = "func_48m_ck",
         .parent         = &apll96_ck,    /* 96M or Alt */
+       .prcm_mod       = PLL_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "cm_clkdm" },
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_48M_SOURCE,
         .clksel         = func_48m_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -844,15 +845,16 @@ static struct clk func_12m_ck = {
         .fixed_div      = 4,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
-       .clkdm_name     = "wkup_clkdm",
+       .clkdm          = { .name = "cm_clkdm" },
         .recalc         = &omap2_fixed_divisor_recalc,
  };
  
  /* Secure timer, only available in secure mode */
  static struct clk wdt1_osc_ck = {
-       .name           = "ck_wdt1_osc",
+       .name           = "wdt1_osc_ck",
         .parent         = &osc_ck,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .clkdm          = { .name = "prm_clkdm" },
         .recalc         = &followparent_recalc,
  };
  
@@ -895,13 +897,14 @@ static const struct clksel common_clkout_src_clksel[] = {
  static struct clk sys_clkout_src = {
         .name           = "sys_clkout_src",
         .parent         = &func_54m_ck,
+       .prcm_mod       = OMAP24XX_GR_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES | OFFSET_GR_MOD,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
+                               RATE_PROPAGATES,
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
         .enable_bit     = OMAP24XX_CLKOUT_EN_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
+       .clksel_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
         .clksel_mask    = OMAP24XX_CLKOUT_SOURCE_MASK,
         .clksel         = common_clkout_src_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -926,10 +929,11 @@ static const struct clksel sys_clkout_clksel[] = {
  static struct clk sys_clkout = {
         .name           = "sys_clkout",
         .parent         = &sys_clkout_src,
+       .prcm_mod       = OMAP24XX_GR_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               PARENT_CONTROLS_CLOCK | OFFSET_GR_MOD,
-       .clkdm_name     = "wkup_clkdm",
-       .clksel_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
+                               PARENT_CONTROLS_CLOCK,
+       .clkdm          = { .name = "prm_clkdm" },
+       .clksel_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
         .clksel_mask    = OMAP24XX_CLKOUT_DIV_MASK,
         .clksel         = sys_clkout_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -941,12 +945,13 @@ static struct clk sys_clkout = {
  static struct clk sys_clkout2_src = {
         .name           = "sys_clkout2_src",
         .parent         = &func_54m_ck,
-       .flags          = CLOCK_IN_OMAP242X | RATE_PROPAGATES | OFFSET_GR_MOD,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
+       .prcm_mod       = OMAP24XX_GR_MOD,
+       .flags          = CLOCK_IN_OMAP242X | RATE_PROPAGATES,
+       .clkdm          = { .name = "cm_clkdm" },
+       .enable_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
         .enable_bit     = OMAP2420_CLKOUT2_EN_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
+       .clksel_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
         .clksel_mask    = OMAP2420_CLKOUT2_SOURCE_MASK,
         .clksel         = common_clkout_src_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -963,10 +968,10 @@ static const struct clksel sys_clkout2_clksel[] = {
  static struct clk sys_clkout2 = {
         .name           = "sys_clkout2",
         .parent         = &sys_clkout2_src,
-       .flags          = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK |
-                               OFFSET_GR_MOD,
-       .clkdm_name     = "wkup_clkdm",
-       .clksel_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET),
+       .prcm_mod       = OMAP24XX_GR_MOD,
+       .flags          = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK,
+       .clkdm          = { .name = "cm_clkdm" },
+       .clksel_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
         .clksel_mask    = OMAP2420_CLKOUT2_DIV_MASK,
         .clksel         = sys_clkout2_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -977,9 +982,10 @@ static struct clk sys_clkout2 = {
  static struct clk emul_ck = {
         .name           = "emul_ck",
         .parent         = &func_54m_ck,
-       .flags          = CLOCK_IN_OMAP242X | OFFSET_GR_MOD,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _GR_MOD_OFFSET(OMAP24XX_PRCM_CLKEMUL_CTRL_OFFSET),
+       .prcm_mod       = OMAP24XX_GR_MOD,
+       .flags          = CLOCK_IN_OMAP242X,
+       .clkdm          = { .name = "cm_clkdm" },
+       .enable_reg     = OMAP24XX_PRCM_CLKEMUL_CTRL_OFFSET,
         .enable_bit     = OMAP24XX_EMULATION_EN_SHIFT,
         .recalc         = &followparent_recalc,
  
@@ -1012,12 +1018,13 @@ static const struct clksel mpu_clksel[] = {
  static struct clk mpu_ck = {   /* Control cpu */
         .name           = "mpu_ck",
         .parent         = &core_ck,
+       .prcm_mod       = MPU_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ALWAYS_ENABLED | DELAYED_APP |
                                 CONFIG_PARTICIPANT | RATE_PROPAGATES,
-       .clkdm_name     = "mpu_clkdm",
+       .clkdm          = { .name = "mpu_clkdm" },
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(MPU_MOD, CM_CLKSEL),
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP24XX_CLKSEL_MPU_MASK,
         .clksel         = mpu_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1055,12 +1062,13 @@ static const struct clksel dsp_fck_clksel[] = {
  static struct clk dsp_fck = {
         .name           = "dsp_fck",
         .parent         = &core_ck,
+       .prcm_mod       = OMAP24XX_DSP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
                                 CONFIG_PARTICIPANT | RATE_PROPAGATES,
-       .clkdm_name     = "dsp_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "dsp_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP24XX_CLKSEL_DSP_MASK,
         .clksel         = dsp_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1085,22 +1093,26 @@ static const struct clksel dsp_irate_ick_clksel[] = {
  static struct clk dsp_irate_ick = {
         .name           = "dsp_irate_ick",
         .parent         = &dsp_fck,
+       .prcm_mod       = OMAP24XX_DSP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
                                 CONFIG_PARTICIPANT | PARENT_CONTROLS_CLOCK,
-       .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
+       .clkdm          = { .name = "dsp_clkdm" },
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP24XX_CLKSEL_DSP_IF_MASK,
         .clksel         = dsp_irate_ick_clksel,
         .recalc         = &omap2_clksel_recalc,
         .round_rate     = &omap2_clksel_round_rate,
-       .set_rate             = &omap2_clksel_set_rate
+       .set_rate       = &omap2_clksel_set_rate
  };
  
  /* 2420 only */
  static struct clk dsp_ick = {
         .name           = "dsp_ick",     /* apparently ipi and isp */
         .parent         = &dsp_irate_ick,
+       .prcm_mod       = OMAP24XX_DSP_MOD,
         .flags          = CLOCK_IN_OMAP242X | DELAYED_APP | CONFIG_PARTICIPANT,
-       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "dsp_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP2420_EN_DSP_IPI_SHIFT,          /* for ipi */
  };
  
@@ -1108,8 +1120,10 @@ static struct clk dsp_ick = {
  static struct clk iva2_1_ick = {
         .name           = "iva2_1_ick",
         .parent         = &dsp_irate_ick,
+       .prcm_mod       = OMAP24XX_DSP_MOD,
         .flags          = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
-       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "dsp_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
  };
  
@@ -1121,12 +1135,13 @@ static struct clk iva2_1_ick = {
  static struct clk iva1_ifck = {
         .name           = "iva1_ifck",
         .parent         = &core_ck,
+       .prcm_mod       = OMAP24XX_DSP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT |
                                 RATE_PROPAGATES | DELAYED_APP,
-       .clkdm_name     = "iva1_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "iva1_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP2420_EN_IVA_COP_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP2420_CLKSEL_IVA_MASK,
         .clksel         = dsp_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1138,9 +1153,10 @@ static struct clk iva1_ifck = {
  static struct clk iva1_mpu_int_ifck = {
         .name           = "iva1_mpu_int_ifck",
         .parent         = &iva1_ifck,
+       .prcm_mod       = OMAP24XX_DSP_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "iva1_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "iva1_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP2420_EN_IVA_MPU_SHIFT,
         .fixed_div      = 2,
         .recalc         = &omap2_fixed_divisor_recalc,
@@ -1184,11 +1200,12 @@ static const struct clksel core_l3_clksel[] = {
  static struct clk core_l3_ck = {       /* Used for ick and fck, interconnect */
         .name           = "core_l3_ck",
         .parent         = &core_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ALWAYS_ENABLED | DELAYED_APP |
                                 CONFIG_PARTICIPANT | RATE_PROPAGATES,
-       .clkdm_name     = "core_l3_clkdm",
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_L3_MASK,
         .clksel         = core_l3_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1213,12 +1230,13 @@ static const struct clksel usb_l4_ick_clksel[] = {
  static struct clk usb_l4_ick = {       /* FS-USB interface clock */
         .name           = "usb_l4_ick",
         .parent         = &core_l3_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 DELAYED_APP | CONFIG_PARTICIPANT,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP24XX_EN_USB_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_USB_MASK,
         .clksel         = usb_l4_ick_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1247,10 +1265,11 @@ static const struct clksel l4_clksel[] = {
  static struct clk l4_ck = {            /* used both as an ick and fck */
         .name           = "l4_ck",
         .parent         = &core_l3_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES,
-       .clkdm_name     = "core_l4_clkdm",
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_L4_MASK,
         .clksel         = l4_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1285,12 +1304,13 @@ static const struct clksel ssi_ssr_sst_fck_clksel[] = {
  static struct clk ssi_ssr_sst_fck = {
         .name           = "ssi_fck",
         .parent         = &core_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 DELAYED_APP,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP24XX_EN_SSI_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_SSI_MASK,
         .clksel         = ssi_ssr_sst_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1305,9 +1325,10 @@ static struct clk ssi_ssr_sst_fck = {
  static struct clk ssi_l4_ick = {
         .name           = "ssi_l4_ick",
         .parent         = &l4_ck,
-       .clkdm_name     = "core_l4_clkdm",
+       .prcm_mod       = CORE_MOD,
+       .clkdm          = { .name = "core_l4_clkdm" },
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP24XX_EN_SSI_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1335,11 +1356,12 @@ static const struct clksel gfx_fck_clksel[] = {
  static struct clk gfx_3d_fck = {
         .name           = "gfx_3d_fck",
         .parent         = &core_l3_ck,
+       .prcm_mod       = GFX_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "gfx_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(GFX_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "gfx_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_EN_3D_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(GFX_MOD, CM_CLKSEL),
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP_CLKSEL_GFX_MASK,
         .clksel         = gfx_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1350,11 +1372,12 @@ static struct clk gfx_3d_fck = {
  static struct clk gfx_2d_fck = {
         .name           = "gfx_2d_fck",
         .parent         = &core_l3_ck,
+       .prcm_mod       = GFX_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "gfx_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(GFX_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "gfx_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_EN_2D_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(GFX_MOD, CM_CLKSEL),
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP_CLKSEL_GFX_MASK,
         .clksel         = gfx_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1365,9 +1388,10 @@ static struct clk gfx_2d_fck = {
  static struct clk gfx_ick = {
         .name           = "gfx_ick",            /* From l3 */
         .parent         = &core_l3_ck,
+       .prcm_mod       = GFX_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "gfx_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(GFX_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "gfx_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP_EN_GFX_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1395,11 +1419,12 @@ static const struct clksel mdm_ick_clksel[] = {
  static struct clk mdm_ick = {          /* used both as a ick and fck */
         .name           = "mdm_ick",
         .parent         = &core_ck,
+       .prcm_mod       = OMAP2430_MDM_MOD,
         .flags          = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
-       .clkdm_name     = "mdm_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(OMAP2430_MDM_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "mdm_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT,
-       .clksel_reg     = _CM_REG_OFFSET(OMAP2430_MDM_MOD, CM_CLKSEL),
+       .clksel_reg     = CM_CLKSEL,
         .clksel_mask    = OMAP2430_CLKSEL_MDM_MASK,
         .clksel         = mdm_ick_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1410,9 +1435,10 @@ static struct clk mdm_ick = {            /* used both as a ick and fck */
  static struct clk mdm_osc_ck = {
         .name           = "mdm_osc_ck",
         .parent         = &osc_ck,
+       .prcm_mod       = OMAP2430_MDM_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "mdm_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(OMAP2430_MDM_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "mdm_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP2430_EN_OSC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1455,9 +1481,10 @@ static const struct clksel dss1_fck_clksel[] = {
  static struct clk dss_ick = {          /* Enables both L3,L4 ICLK's */
         .name           = "dss_ick",
         .parent         = &l4_ck,       /* really both l3 and l4 */
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "dss_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "dss_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_DSS1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1465,13 +1492,14 @@ static struct clk dss_ick = {           /* Enables both L3,L4 ICLK's */
  static struct clk dss1_fck = {
         .name           = "dss1_fck",
         .parent         = &core_ck,             /* Core or sys */
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 DELAYED_APP,
-       .clkdm_name     = "dss_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "dss_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_DSS1_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_DSS1_MASK,
         .clksel         = dss1_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1498,13 +1526,14 @@ static const struct clksel dss2_fck_clksel[] = {
  static struct clk dss2_fck = {         /* Alt clk used in power management */
         .name           = "dss2_fck",
         .parent         = &sys_ck,              /* fixed at sys_ck or 48MHz */
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 DELAYED_APP,
-       .clkdm_name     = "dss_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "dss_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_DSS2_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_DSS2_MASK,
         .clksel         = dss2_fck_clksel,
         .recalc         = &followparent_recalc,
@@ -1513,9 +1542,10 @@ static struct clk dss2_fck = {           /* Alt clk used in power management */
  static struct clk dss_54m_fck = {      /* Alt clk used in power management */
         .name           = "dss_54m_fck",        /* 54m tv clk */
         .parent         = &func_54m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "dss_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "dss_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_TV_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1541,9 +1571,10 @@ static const struct clksel omap24xx_gpt_clksel[] = {
  static struct clk gpt1_ick = {
         .name           = "gpt1_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP24XX_EN_GPT1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1551,12 +1582,13 @@ static struct clk gpt1_ick = {
  static struct clk gpt1_fck = {
         .name           = "gpt1_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_EN_GPT1_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT1_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1567,9 +1599,10 @@ static struct clk gpt1_fck = {
  static struct clk gpt2_ick = {
         .name           = "gpt2_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1577,12 +1610,13 @@ static struct clk gpt2_ick = {
  static struct clk gpt2_fck = {
         .name           = "gpt2_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT2_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT2_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1591,9 +1625,10 @@ static struct clk gpt2_fck = {
  static struct clk gpt3_ick = {
         .name           = "gpt3_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1601,12 +1636,13 @@ static struct clk gpt3_ick = {
  static struct clk gpt3_fck = {
         .name           = "gpt3_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT3_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT3_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1615,9 +1651,10 @@ static struct clk gpt3_fck = {
  static struct clk gpt4_ick = {
         .name           = "gpt4_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT4_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1625,12 +1662,13 @@ static struct clk gpt4_ick = {
  static struct clk gpt4_fck = {
         .name           = "gpt4_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT4_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT4_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1639,9 +1677,10 @@ static struct clk gpt4_fck = {
  static struct clk gpt5_ick = {
         .name           = "gpt5_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT5_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1649,12 +1688,13 @@ static struct clk gpt5_ick = {
  static struct clk gpt5_fck = {
         .name           = "gpt5_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT5_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT5_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1663,9 +1703,10 @@ static struct clk gpt5_fck = {
  static struct clk gpt6_ick = {
         .name           = "gpt6_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT6_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1673,12 +1714,13 @@ static struct clk gpt6_ick = {
  static struct clk gpt6_fck = {
         .name           = "gpt6_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT6_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT6_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1687,8 +1729,10 @@ static struct clk gpt6_fck = {
  static struct clk gpt7_ick = {
         .name           = "gpt7_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT7_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1696,12 +1740,13 @@ static struct clk gpt7_ick = {
  static struct clk gpt7_fck = {
         .name           = "gpt7_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT7_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT7_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1710,9 +1755,10 @@ static struct clk gpt7_fck = {
  static struct clk gpt8_ick = {
         .name           = "gpt8_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT8_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1720,12 +1766,13 @@ static struct clk gpt8_ick = {
  static struct clk gpt8_fck = {
         .name           = "gpt8_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT8_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT8_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1734,9 +1781,10 @@ static struct clk gpt8_fck = {
  static struct clk gpt9_ick = {
         .name           = "gpt9_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT9_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1744,12 +1792,13 @@ static struct clk gpt9_ick = {
  static struct clk gpt9_fck = {
         .name           = "gpt9_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT9_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT9_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1758,9 +1807,10 @@ static struct clk gpt9_fck = {
  static struct clk gpt10_ick = {
         .name           = "gpt10_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT10_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1768,12 +1818,13 @@ static struct clk gpt10_ick = {
  static struct clk gpt10_fck = {
         .name           = "gpt10_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT10_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT10_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1782,9 +1833,10 @@ static struct clk gpt10_fck = {
  static struct clk gpt11_ick = {
         .name           = "gpt11_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT11_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1792,12 +1844,13 @@ static struct clk gpt11_ick = {
  static struct clk gpt11_fck = {
         .name           = "gpt11_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT11_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT11_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -1806,9 +1859,10 @@ static struct clk gpt11_fck = {
  static struct clk gpt12_ick = {
         .name           = "gpt12_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT12_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1816,113 +1870,134 @@ static struct clk gpt12_ick = {
  static struct clk gpt12_fck = {
         .name           = "gpt12_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_GPT12_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = CM_CLKSEL2,
         .clksel_mask    = OMAP24XX_CLKSEL_GPT12_MASK,
         .clksel         = omap24xx_gpt_clksel,
         .recalc         = &omap2_clksel_recalc,
  };
  
  static struct clk mcbsp1_ick = {
-       .name           = "mcbsp1_ick",
+       .name           = "mcbsp_ick",
+       .id             = 1,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_MCBSP1_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp1_fck = {
-       .name           = "mcbsp1_fck",
+       .name           = "mcbsp_fck",
+       .id             = 1,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_MCBSP1_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp2_ick = {
-       .name           = "mcbsp2_ick",
+       .name           = "mcbsp_ick",
+       .id             = 2,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_MCBSP2_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp2_fck = {
-       .name           = "mcbsp2_fck",
+       .name           = "mcbsp_fck",
+       .id             = 2,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_MCBSP2_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp3_ick = {
-       .name           = "mcbsp3_ick",
+       .name           = "mcbsp_ick",
+       .id             = 3,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MCBSP3_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp3_fck = {
-       .name           = "mcbsp3_fck",
+       .name           = "mcbsp_fck",
+       .id             = 3,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MCBSP3_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp4_ick = {
-       .name           = "mcbsp4_ick",
+       .name           = "mcbsp_ick",
+       .id             = 4,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MCBSP4_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp4_fck = {
-       .name           = "mcbsp4_fck",
+       .name           = "mcbsp_fck",
+       .id             = 4,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MCBSP4_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp5_ick = {
-       .name           = "mcbsp5_ick",
+       .name           = "mcbsp_ick",
+       .id             = 5,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MCBSP5_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
  static struct clk mcbsp5_fck = {
-       .name           = "mcbsp5_fck",
+       .name           = "mcbsp_fck",
+       .id             = 5,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MCBSP5_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1931,9 +2006,10 @@ static struct clk mcspi1_ick = {
         .name           = "mcspi_ick",
         .id             = 1,
         .parent         = &l4_ck,
-       .clkdm_name     = "core_l4_clkdm",
+       .prcm_mod       = CORE_MOD,
+       .clkdm          = { .name = "core_l4_clkdm" },
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_MCSPI1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1942,9 +2018,10 @@ static struct clk mcspi1_fck = {
         .name           = "mcspi_fck",
         .id             = 1,
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_MCSPI1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1953,9 +2030,10 @@ static struct clk mcspi2_ick = {
         .name           = "mcspi_ick",
         .id             = 2,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_MCSPI2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1964,9 +2042,10 @@ static struct clk mcspi2_fck = {
         .name           = "mcspi_fck",
         .id             = 2,
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_MCSPI2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1975,9 +2054,10 @@ static struct clk mcspi3_ick = {
         .name           = "mcspi_ick",
         .id             = 3,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MCSPI3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1986,9 +2066,10 @@ static struct clk mcspi3_fck = {
         .name           = "mcspi_fck",
         .id             = 3,
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MCSPI3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -1996,9 +2077,10 @@ static struct clk mcspi3_fck = {
  static struct clk uart1_ick = {
         .name           = "uart1_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_UART1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2006,9 +2088,10 @@ static struct clk uart1_ick = {
  static struct clk uart1_fck = {
         .name           = "uart1_fck",
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_UART1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2016,9 +2099,10 @@ static struct clk uart1_fck = {
  static struct clk uart2_ick = {
         .name           = "uart2_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_UART2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2026,9 +2110,10 @@ static struct clk uart2_ick = {
  static struct clk uart2_fck = {
         .name           = "uart2_fck",
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_UART2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2036,9 +2121,10 @@ static struct clk uart2_fck = {
  static struct clk uart3_ick = {
         .name           = "uart3_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP24XX_EN_UART3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2046,9 +2132,10 @@ static struct clk uart3_ick = {
  static struct clk uart3_fck = {
         .name           = "uart3_fck",
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP24XX_EN_UART3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2056,9 +2143,10 @@ static struct clk uart3_fck = {
  static struct clk gpios_ick = {
         .name           = "gpios_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2066,29 +2154,34 @@ static struct clk gpios_ick = {
  static struct clk gpios_fck = {
         .name           = "gpios_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
+/* aka WDT2 - REVISIT: we should split wu_l4_iclk from l4_ck */
  static struct clk mpu_wdt_ick = {
         .name           = "mpu_wdt_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
+/* aka WDT2 */
  static struct clk mpu_wdt_fck = {
         .name           = "mpu_wdt_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = CM_FCLKEN,
         .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2096,20 +2189,23 @@ static struct clk mpu_wdt_fck = {
  static struct clk sync_32k_ick = {
         .name           = "sync_32k_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ENABLE_ON_INIT,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP24XX_EN_32KSYNC_SHIFT,
         .recalc         = &followparent_recalc,
  };
  
+/* REVISIT: parent is really wu_l4_iclk */
  static struct clk wdt1_ick = {
         .name           = "wdt1_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "prm_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP24XX_EN_WDT1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2117,10 +2213,11 @@ static struct clk wdt1_ick = {
  static struct clk omapctrl_ick = {
         .name           = "omapctrl_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ENABLE_ON_INIT,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP24XX_EN_OMAPCTRL_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2128,9 +2225,10 @@ static struct clk omapctrl_ick = {
  static struct clk icr_ick = {
         .name           = "icr_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = WKUP_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN,
         .enable_bit     = OMAP2430_EN_ICR_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2138,9 +2236,10 @@ static struct clk icr_ick = {
  static struct clk cam_ick = {
         .name           = "cam_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_CAM_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2153,9 +2252,10 @@ static struct clk cam_ick = {
  static struct clk cam_fck = {
         .name           = "cam_fck",
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_CAM_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2163,9 +2263,10 @@ static struct clk cam_fck = {
  static struct clk mailboxes_ick = {
         .name           = "mailboxes_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_MAILBOXES_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2173,9 +2274,10 @@ static struct clk mailboxes_ick = {
  static struct clk wdt4_ick = {
         .name           = "wdt4_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_WDT4_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2183,9 +2285,10 @@ static struct clk wdt4_ick = {
  static struct clk wdt4_fck = {
         .name           = "wdt4_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_WDT4_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2193,9 +2296,10 @@ static struct clk wdt4_fck = {
  static struct clk wdt3_ick = {
         .name           = "wdt3_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP2420_EN_WDT3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2203,9 +2307,10 @@ static struct clk wdt3_ick = {
  static struct clk wdt3_fck = {
         .name           = "wdt3_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP2420_EN_WDT3_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2213,9 +2318,10 @@ static struct clk wdt3_fck = {
  static struct clk mspro_ick = {
         .name           = "mspro_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_MSPRO_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2223,9 +2329,10 @@ static struct clk mspro_ick = {
  static struct clk mspro_fck = {
         .name           = "mspro_fck",
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_MSPRO_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2233,9 +2340,10 @@ static struct clk mspro_fck = {
  static struct clk mmc_ick = {
         .name           = "mmc_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP2420_EN_MMC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2243,9 +2351,10 @@ static struct clk mmc_ick = {
  static struct clk mmc_fck = {
         .name           = "mmc_fck",
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP2420_EN_MMC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2253,9 +2362,10 @@ static struct clk mmc_fck = {
  static struct clk fac_ick = {
         .name           = "fac_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_FAC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2263,9 +2373,10 @@ static struct clk fac_ick = {
  static struct clk fac_fck = {
         .name           = "fac_fck",
         .parent         = &func_12m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_FAC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2273,9 +2384,10 @@ static struct clk fac_fck = {
  static struct clk eac_ick = {
         .name           = "eac_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP2420_EN_EAC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2283,9 +2395,10 @@ static struct clk eac_ick = {
  static struct clk eac_fck = {
         .name           = "eac_fck",
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP2420_EN_EAC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2293,9 +2406,10 @@ static struct clk eac_fck = {
  static struct clk hdq_ick = {
         .name           = "hdq_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP24XX_EN_HDQ_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2303,9 +2417,10 @@ static struct clk hdq_ick = {
  static struct clk hdq_fck = {
         .name           = "hdq_fck",
         .parent         = &func_12m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP24XX_EN_HDQ_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2314,9 +2429,10 @@ static struct clk i2c2_ick = {
         .name           = "i2c_ick",
         .id             = 2,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP2420_EN_I2C2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2325,9 +2441,10 @@ static struct clk i2c2_fck = {
         .name           = "i2c_fck",
         .id             = 2,
         .parent         = &func_12m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP2420_EN_I2C2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2336,9 +2453,10 @@ static struct clk i2chs2_fck = {
         .name           = "i2chs_fck",
         .id             = 2,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_I2CHS2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2347,9 +2465,10 @@ static struct clk i2c1_ick = {
         .name           = "i2c_ick",
         .id             = 1,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP2420_EN_I2C1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2358,9 +2477,10 @@ static struct clk i2c1_fck = {
         .name           = "i2c_fck",
         .id             = 1,
         .parent         = &func_12m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP2420_EN_I2C1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2369,9 +2489,10 @@ static struct clk i2chs1_fck = {
         .name           = "i2chs_fck",
         .id             = 1,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_I2CHS1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2381,7 +2502,7 @@ static struct clk gpmc_fck = {
         .parent         = &core_l3_ck,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 ENABLE_ON_INIT,
-       .clkdm_name     = "core_l3_clkdm",
+       .clkdm          = { .name = "core_l3_clkdm" },
         .recalc         = &followparent_recalc,
  };
  
@@ -2389,7 +2510,7 @@ static struct clk sdma_fck = {
         .name           = "sdma_fck",
         .parent         = &core_l3_ck,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l3_clkdm",
+       .clkdm          = { .name = "core_l3_clkdm" },
         .recalc         = &followparent_recalc,
  };
  
@@ -2397,16 +2518,17 @@ static struct clk sdma_ick = {
         .name           = "sdma_ick",
         .parent         = &l4_ck,
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l3_clkdm",
+       .clkdm          = { .name = "core_l3_clkdm" },
         .recalc         = &followparent_recalc,
  };
  
  static struct clk vlynq_ick = {
         .name           = "vlynq_ick",
         .parent         = &core_l3_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = CM_ICLKEN1,
         .enable_bit     = OMAP2420_EN_VLYNQ_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2439,12 +2561,13 @@ static const struct clksel vlynq_fck_clksel[] = {
  static struct clk vlynq_fck = {
         .name           = "vlynq_fck",
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP242X | DELAYED_APP,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = CM_FCLKEN1,
         .enable_bit     = OMAP2420_EN_VLYNQ_SHIFT,
         .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = CM_CLKSEL1,
         .clksel_mask    = OMAP2420_CLKSEL_VLYNQ_MASK,
         .clksel         = vlynq_fck_clksel,
         .recalc         = &omap2_clksel_recalc,
@@ -2455,9 +2578,10 @@ static struct clk vlynq_fck = {
  static struct clk sdrc_ick = {
         .name           = "sdrc_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN3),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN3,
         .enable_bit     = OMAP2430_EN_SDRC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2465,9 +2589,10 @@ static struct clk sdrc_ick = {
  static struct clk des_ick = {
         .name           = "des_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_ICLKEN4,
         .enable_bit     = OMAP24XX_EN_DES_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2475,9 +2600,10 @@ static struct clk des_ick = {
  static struct clk sha_ick = {
         .name           = "sha_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_ICLKEN4,
         .enable_bit     = OMAP24XX_EN_SHA_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2485,9 +2611,10 @@ static struct clk sha_ick = {
  static struct clk rng_ick = {
         .name           = "rng_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_ICLKEN4,
         .enable_bit     = OMAP24XX_EN_RNG_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2495,9 +2622,10 @@ static struct clk rng_ick = {
  static struct clk aes_ick = {
         .name           = "aes_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_ICLKEN4,
         .enable_bit     = OMAP24XX_EN_AES_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2505,9 +2633,10 @@ static struct clk aes_ick = {
  static struct clk pka_ick = {
         .name           = "pka_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_ICLKEN4,
         .enable_bit     = OMAP24XX_EN_PKA_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2515,9 +2644,10 @@ static struct clk pka_ick = {
  static struct clk usb_fck = {
         .name           = "usb_fck",
         .parent         = &func_48m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP24XX_EN_USB_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2525,9 +2655,10 @@ static struct clk usb_fck = {
  static struct clk usbhs_ick = {
         .name           = "usbhs_ick",
         .parent         = &core_l3_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_USBHS_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2536,9 +2667,10 @@ static struct clk mmchs1_ick = {
         .name           = "mmchs_ick",
         .id             = 1,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MMCHS1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2547,9 +2679,10 @@ static struct clk mmchs1_fck = {
         .name           = "mmchs_fck",
         .id             = 1,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MMCHS1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2558,9 +2691,10 @@ static struct clk mmchs2_ick = {
         .name           = "mmchs_ick",
         .id             = 2,
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MMCHS2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2569,8 +2703,10 @@ static struct clk mmchs2_fck = {
         .name           = "mmchs_fck",
         .id             = 2,
         .parent         = &func_96m_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MMCHS2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2578,9 +2714,10 @@ static struct clk mmchs2_fck = {
  static struct clk gpio5_ick = {
         .name           = "gpio5_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_GPIO5_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2588,9 +2725,10 @@ static struct clk gpio5_ick = {
  static struct clk gpio5_fck = {
         .name           = "gpio5_fck",
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_GPIO5_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2598,9 +2736,10 @@ static struct clk gpio5_fck = {
  static struct clk mdm_intc_ick = {
         .name           = "mdm_intc_ick",
         .parent         = &l4_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = CM_ICLKEN2,
         .enable_bit     = OMAP2430_EN_MDM_INTC_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2609,9 +2748,10 @@ static struct clk mmchsdb1_fck = {
         .name           = "mmchsdb_fck",
         .id             = 1,
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MMCHSDB1_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2620,9 +2760,10 @@ static struct clk mmchsdb2_fck = {
         .name           = "mmchsdb_fck",
         .id             = 2,
         .parent         = &func_32k_ck,
+       .prcm_mod       = CORE_MOD,
         .flags          = CLOCK_IN_OMAP243X,
-       .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .enable_reg     = OMAP24XX_CM_FCLKEN2,
         .enable_bit     = OMAP2430_EN_MMCHSDB2_SHIFT,
         .recalc         = &followparent_recalc,
  };
@@ -2645,6 +2786,7 @@ static struct clk virt_prcm_set = {
         .name           = "virt_prcm_set",
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                 VIRTUAL_CLOCK | ALWAYS_ENABLED | DELAYED_APP,
+       .clkdm          = { .name = "virt_opp_clkdm" },
         .parent         = &mpu_ck,      /* Indexed by mpu speed, no parent */
         .recalc         = &omap2_table_mpu_recalc,      /* sets are keyed on mpu rate */
         .set_rate       = &omap2_select_table_rate,