]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-omap2/clock24xx.c
[ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock24xx.c
index aca4ca42bf48cbcbe6b709c8110ed3f87a7ce8b8..91ad2070264d6339a06d6ce6c9d3d0b5c4072a49 100644 (file)
@@ -139,22 +139,22 @@ static struct omap_clk omap24xx_clks[] = {
        CLK(NULL,       "gpt11_fck",    &gpt11_fck,     CK_243X | CK_242X),
        CLK(NULL,       "gpt12_ick",    &gpt12_ick,     CK_243X | CK_242X),
        CLK(NULL,       "gpt12_fck",    &gpt12_fck,     CK_243X | CK_242X),
-       CLK("omap-mcbsp.1", "mcbsp_ick", &mcbsp1_ick,   CK_243X | CK_242X),
-       CLK("omap-mcbsp.1", "mcbsp_fck", &mcbsp1_fck,   CK_243X | CK_242X),
-       CLK("omap-mcbsp.2", "mcbsp_ick", &mcbsp2_ick,   CK_243X | CK_242X),
-       CLK("omap-mcbsp.2", "mcbsp_fck", &mcbsp2_fck,   CK_243X | CK_242X),
-       CLK("omap-mcbsp.3", "mcbsp_ick", &mcbsp3_ick,   CK_243X),
-       CLK("omap-mcbsp.3", "mcbsp_fck", &mcbsp3_fck,   CK_243X),
-       CLK("omap-mcbsp.4", "mcbsp_ick", &mcbsp4_ick,   CK_243X),
-       CLK("omap-mcbsp.4", "mcbsp_fck", &mcbsp4_fck,   CK_243X),
-       CLK("omap-mcbsp.5", "mcbsp_ick", &mcbsp5_ick,   CK_243X),
-       CLK("omap-mcbsp.5", "mcbsp_fck", &mcbsp5_fck,   CK_243X),
-       CLK("omap2_mcspi.1", "mcspi_ick", &mcspi1_ick,  CK_243X | CK_242X),
-       CLK("omap2_mcspi.1", "mcspi_fck", &mcspi1_fck,  CK_243X | CK_242X),
-       CLK("omap2_mcspi.2", "mcspi_ick", &mcspi2_ick,  CK_243X | CK_242X),
-       CLK("omap2_mcspi.2", "mcspi_fck", &mcspi2_fck,  CK_243X | CK_242X),
-       CLK("omap2_mcspi.3", "mcspi_ick", &mcspi3_ick,  CK_243X),
-       CLK("omap2_mcspi.3", "mcspi_fck", &mcspi3_fck,  CK_243X),
+       CLK("omap-mcbsp.1", "ick",      &mcbsp1_ick,    CK_243X | CK_242X),
+       CLK("omap-mcbsp.1", "fck",      &mcbsp1_fck,    CK_243X | CK_242X),
+       CLK("omap-mcbsp.2", "ick",      &mcbsp2_ick,    CK_243X | CK_242X),
+       CLK("omap-mcbsp.2", "fck",      &mcbsp2_fck,    CK_243X | CK_242X),
+       CLK("omap-mcbsp.3", "ick",      &mcbsp3_ick,    CK_243X),
+       CLK("omap-mcbsp.3", "fck",      &mcbsp3_fck,    CK_243X),
+       CLK("omap-mcbsp.4", "ick",      &mcbsp4_ick,    CK_243X),
+       CLK("omap-mcbsp.4", "fck",      &mcbsp4_fck,    CK_243X),
+       CLK("omap-mcbsp.5", "ick",      &mcbsp5_ick,    CK_243X),
+       CLK("omap-mcbsp.5", "fck",      &mcbsp5_fck,    CK_243X),
+       CLK("omap2_mcspi.1", "ick",     &mcspi1_ick,    CK_243X | CK_242X),
+       CLK("omap2_mcspi.1", "fck",     &mcspi1_fck,    CK_243X | CK_242X),
+       CLK("omap2_mcspi.2", "ick",     &mcspi2_ick,    CK_243X | CK_242X),
+       CLK("omap2_mcspi.2", "fck",     &mcspi2_fck,    CK_243X | CK_242X),
+       CLK("omap2_mcspi.3", "ick",     &mcspi3_ick,    CK_243X),
+       CLK("omap2_mcspi.3", "fck",     &mcspi3_fck,    CK_243X),
        CLK(NULL,       "uart1_ick",    &uart1_ick,     CK_243X | CK_242X),
        CLK(NULL,       "uart1_fck",    &uart1_fck,     CK_243X | CK_242X),
        CLK(NULL,       "uart2_ick",    &uart2_ick,     CK_243X | CK_242X),
@@ -169,8 +169,8 @@ static struct omap_clk omap24xx_clks[] = {
        CLK(NULL,       "wdt1_ick",     &wdt1_ick,      CK_243X | CK_242X),
        CLK(NULL,       "omapctrl_ick", &omapctrl_ick,  CK_243X | CK_242X),
        CLK(NULL,       "icr_ick",      &icr_ick,       CK_243X),
-       CLK(NULL,       "cam_fck",      &cam_fck,       CK_243X | CK_242X),
-       CLK(NULL,       "cam_ick",      &cam_ick,       CK_243X | CK_242X),
+       CLK("omap24xxcam", "fck",       &cam_fck,       CK_243X | CK_242X),
+       CLK("omap24xxcam", "ick",       &cam_ick,       CK_243X | CK_242X),
        CLK(NULL,       "mailboxes_ick", &mailboxes_ick,        CK_243X | CK_242X),
        CLK(NULL,       "wdt4_ick",     &wdt4_ick,      CK_243X | CK_242X),
        CLK(NULL,       "wdt4_fck",     &wdt4_fck,      CK_243X | CK_242X),
@@ -184,14 +184,14 @@ static struct omap_clk omap24xx_clks[] = {
        CLK(NULL,       "fac_fck",      &fac_fck,       CK_243X | CK_242X),
        CLK(NULL,       "eac_ick",      &eac_ick,       CK_242X),
        CLK(NULL,       "eac_fck",      &eac_fck,       CK_242X),
-       CLK(NULL,       "hdq_ick",      &hdq_ick,       CK_243X | CK_242X),
-       CLK(NULL,       "hdq_fck",      &hdq_fck,       CK_243X | CK_242X),
-       CLK("i2c_omap.1", "i2c_ick",    &i2c1_ick,      CK_243X | CK_242X),
-       CLK("i2c_omap.1", "i2c_fck",    &i2c1_fck,      CK_242X),
-       CLK("i2c_omap.1", "i2c_fck",    &i2chs1_fck,    CK_243X),
-       CLK("i2c_omap.2", "i2c_ick",    &i2c2_ick,      CK_243X | CK_242X),
-       CLK("i2c_omap.2", "i2c_fck",    &i2c2_fck,      CK_242X),
-       CLK("i2c_omap.2", "i2c_fck",    &i2chs2_fck,    CK_243X),
+       CLK("omap_hdq.0", "ick",        &hdq_ick,       CK_243X | CK_242X),
+       CLK("omap_hdq.1", "fck",        &hdq_fck,       CK_243X | CK_242X),
+       CLK("i2c_omap.1", "ick",        &i2c1_ick,      CK_243X | CK_242X),
+       CLK("i2c_omap.1", "fck",        &i2c1_fck,      CK_242X),
+       CLK("i2c_omap.1", "fck",        &i2chs1_fck,    CK_243X),
+       CLK("i2c_omap.2", "ick",        &i2c2_ick,      CK_243X | CK_242X),
+       CLK("i2c_omap.2", "fck",        &i2c2_fck,      CK_242X),
+       CLK("i2c_omap.2", "fck",        &i2chs2_fck,    CK_243X),
        CLK(NULL,       "gpmc_fck",     &gpmc_fck,      CK_243X | CK_242X),
        CLK(NULL,       "sdma_fck",     &sdma_fck,      CK_243X | CK_242X),
        CLK(NULL,       "sdma_ick",     &sdma_ick,      CK_243X | CK_242X),
@@ -200,15 +200,15 @@ static struct omap_clk omap24xx_clks[] = {
        CLK(NULL,       "sdrc_ick",     &sdrc_ick,      CK_243X),
        CLK(NULL,       "des_ick",      &des_ick,       CK_243X | CK_242X),
        CLK(NULL,       "sha_ick",      &sha_ick,       CK_243X | CK_242X),
-       CLK(NULL,       "rng_ick",      &rng_ick,       CK_243X | CK_242X),
+       CLK("omap_rng", "ick",          &rng_ick,       CK_243X | CK_242X),
        CLK(NULL,       "aes_ick",      &aes_ick,       CK_243X | CK_242X),
        CLK(NULL,       "pka_ick",      &pka_ick,       CK_243X | CK_242X),
        CLK(NULL,       "usb_fck",      &usb_fck,       CK_243X | CK_242X),
        CLK(NULL,       "usbhs_ick",    &usbhs_ick,     CK_243X),
-       CLK("mmci-omap-hs.0", "mmchs_ick",      &mmchs1_ick,    CK_243X),
-       CLK("mmci-omap-hs.0", "mmchs_fck",      &mmchs1_fck,    CK_243X),
-       CLK("mmci-omap-hs.1", "mmchs_ick",      &mmchs2_ick,    CK_243X),
-       CLK("mmci-omap-hs.1", "mmchs_fck",      &mmchs2_fck,    CK_243X),
+       CLK("mmci-omap-hs.0", "ick",    &mmchs1_ick,    CK_243X),
+       CLK("mmci-omap-hs.0", "fck",    &mmchs1_fck,    CK_243X),
+       CLK("mmci-omap-hs.1", "ick",    &mmchs2_ick,    CK_243X),
+       CLK("mmci-omap-hs.1", "fck",    &mmchs2_fck,    CK_243X),
        CLK(NULL,       "gpio5_ick",    &gpio5_ick,     CK_243X),
        CLK(NULL,       "gpio5_fck",    &gpio5_fck,     CK_243X),
        CLK(NULL,       "mdm_intc_ick", &mdm_intc_ick,  CK_243X),
@@ -339,7 +339,7 @@ static const struct clkops clkops_fixed = {
  * Uses the current prcm set to tell if a rate is valid.
  * You can go slower, but not faster within a given rate set.
  */
-long omap2_dpllcore_round_rate(unsigned long target_rate)
+static long omap2_dpllcore_round_rate(unsigned long target_rate)
 {
        u32 high, low, core_clk_src;
 
@@ -550,7 +550,9 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
 
                /* Major subsystem dividers */
                tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK;
-               cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD, CM_CLKSEL1);
+               cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
+                                CM_CLKSEL1);
+
                if (cpu_is_omap2430())
                        cm_write_mod_reg(prcm->cm_clksel_mdm,
                                         OMAP2430_MDM_MOD, CM_CLKSEL);
@@ -582,20 +584,20 @@ static struct clk_functions omap2_clk_functions = {
 
 static u32 omap2_get_apll_clkin(void)
 {
-       u32 aplls, sclk = 0;
+       u32 aplls, srate = 0;
 
        aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
        aplls &= OMAP24XX_APLLS_CLKIN_MASK;
        aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
 
        if (aplls == APLLS_CLKIN_19_2MHZ)
-               sclk = 19200000;
+               srate = 19200000;
        else if (aplls == APLLS_CLKIN_13MHZ)
-               sclk = 13000000;
+               srate = 13000000;
        else if (aplls == APLLS_CLKIN_12MHZ)
-               sclk = 12000000;
+               srate = 12000000;
 
-       return sclk;
+       return srate;
 }
 
 static u32 omap2_get_sysclkdiv(void)