#include <asm/arch/clock.h>
#include <asm/arch/sram.h>
+#include <asm/div64.h>
#include "prcm-regs.h"
#include "memory.h"
{
u32 cval, i=0;
- if (clk->enable_bit == 0xff) /* Parent will do it */
+ if (clk->enable_bit == PARENT_CONTROLS_CLOCK) /* Parent will do it */
return;
cval = CM_CLKEN_PLL;
{
u32 cval;
- if(clk->enable_bit == 0xff) /* let parent off do it */
- return;
+ if (clk->enable_bit == PARENT_CONTROLS_CLOCK)
+ return; /* let parent off do it */
cval = CM_CLKEN_PLL;
cval &= ~(0x3 << clk->enable_bit);
/*
* Check the DLL lock state, and return tue if running in unlock mode.
- * This is needed to compenste for the shifted DLL value in unlock mode.
+ * This is needed to compensate for the shifted DLL value in unlock mode.
*/
static u32 omap2_dll_force_needed(void)
{
break;
case CM_SYSCLKOUT_SEL1:
div_addr = (u32)&PRCM_CLKOUT_CTRL;
- if ((div_off == 3) || (div_off = 11))
+ if ((div_off == 3) || (div_off == 11))
mask= 0x3;
break;
case CM_CORE_SEL1: