]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-omap2/clock.c
Merge omap-drivers
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock.c
index 03065074f8084373852a8e1faff97b2b363656ee..e05534df9432d99b2fa73db5d74c6f288ea638d4 100644 (file)
@@ -97,7 +97,7 @@ static void omap2_clk_fixed_enable(struct clk *clk)
 {
        u32 cval, i=0;
 
-       if (clk->enable_bit == 0xff)                    /* Parent will do it */
+       if (clk->enable_bit == PARENT_CONTROLS_CLOCK)   /* Parent will do it */
                return;
 
        cval = CM_CLKEN_PLL;
@@ -205,8 +205,8 @@ static void omap2_clk_fixed_disable(struct clk *clk)
 {
        u32 cval;
 
-       if(clk->enable_bit == 0xff)             /* let parent off do it */
-               return;
+       if (clk->enable_bit == PARENT_CONTROLS_CLOCK)
+               return;         /* let parent off do it */
 
        cval = CM_CLKEN_PLL;
        cval &= ~(0x3 << clk->enable_bit);
@@ -443,7 +443,7 @@ static long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
 
 /*
  * Check the DLL lock state, and return tue if running in unlock mode.
- * This is needed to compenste for the shifted DLL value in unlock mode.
+ * This is needed to compensate for the shifted DLL value in unlock mode.
  */
 static u32 omap2_dll_force_needed(void)
 {
@@ -651,7 +651,7 @@ static u32 omap2_get_clksel(u32 *div_sel, u32 *field_mask,
                break;
        case CM_SYSCLKOUT_SEL1:
                div_addr = (u32)&PRCM_CLKOUT_CTRL;
-               if ((div_off == 3) || (div_off = 11))
+               if ((div_off == 3) || (div_off == 11))
                        mask= 0x3;
                break;
        case CM_CORE_SEL1: