]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-omap2/clock.c
OMAP2/3 clock: every clock must have a clkdm
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock.c
index 78e14bf05e013e5036a3e4e513649f3c3b9e8c2b..1979d5fc9ccef60494bb8cc4a0a3b7190ae80ea0 100644 (file)
@@ -200,11 +200,6 @@ void omap2_init_clk_clkdm(struct clk *clk)
 {
        struct clockdomain *clkdm;
 
-       if (!clk->clkdm.name) {
-               pr_err("clock: %s: missing clockdomain", clk->name);
-               return;
-       }
-
        clkdm = clkdm_lookup(clk->clkdm.name);
        if (clkdm) {
                pr_debug("clock: associated clk %s to clkdm %s\n",
@@ -446,7 +441,7 @@ static int _omap2_clk_enable(struct clk *clk)
        else
                v |= (1 << clk->enable_bit);
        _omap2_clk_write_reg(v, clk->enable_reg, clk);
-       wmb();
+       v = _omap2_clk_read_reg(clk->enable_reg, clk); /* OCP barrier */
 
        omap2_clk_wait_ready(clk);
 
@@ -481,8 +476,7 @@ void omap2_clk_disable(struct clk *clk)
                _omap2_clk_disable(clk);
                if (clk->parent)
                        omap2_clk_disable(clk->parent);
-               if (clk->clkdm.ptr)
-                       omap2_clkdm_clk_disable(clk->clkdm.ptr, clk);
+               omap2_clkdm_clk_disable(clk->clkdm.ptr, clk);
 
        }
 }
@@ -500,14 +494,12 @@ int omap2_clk_enable(struct clk *clk)
                        return ret;
                }
 
-               if (clk->clkdm.ptr)
-                       omap2_clkdm_clk_enable(clk->clkdm.ptr, clk);
+               omap2_clkdm_clk_enable(clk->clkdm.ptr, clk);
 
                ret = _omap2_clk_enable(clk);
 
                if (ret != 0) {
-                       if (clk->clkdm.ptr)
-                               omap2_clkdm_clk_disable(clk->clkdm.ptr, clk);
+                       omap2_clkdm_clk_disable(clk->clkdm.ptr, clk);
 
                        if (clk->parent) {
                                omap2_clk_disable(clk->parent);
@@ -774,8 +766,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
        v &= ~clk->clksel_mask;
        v |= field_val << __ffs(clk->clksel_mask);
        _omap2_clk_write_reg(v, clk->clksel_reg, clk);
-
-       wmb();
+       v = _omap2_clk_read_reg(clk->clksel_reg, clk); /* OCP barrier */
 
        clk->rate = clk->parent->rate / new_div;
 
@@ -851,7 +842,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
        v &= ~clk->clksel_mask;
        v |= field_val << __ffs(clk->clksel_mask);
        _omap2_clk_write_reg(v, clk->clksel_reg, clk);
-       wmb();
+       v = _omap2_clk_read_reg(clk->clksel_reg, clk);    /* OCP barrier */
 
        _omap2xxx_clk_commit(clk);
 
@@ -1086,3 +1077,15 @@ void omap2_clk_disable_unused(struct clk *clk)
        _omap2_clk_disable(clk);
 }
 #endif
+
+int omap2_clk_register(struct clk *clk)
+{
+       if (!clk->clkdm.name) {
+               pr_debug("clock: %s: missing clockdomain", clk->name);
+               WARN_ON(1);
+               return -EINVAL;
+       }
+
+       omap2_init_clk_clkdm(clk);
+       return 0;
+}