#include <mach/board.h>
#include <mach/usb-musb.h>
#include <mach/usb-ehci.h>
-#include <mach/hsmmc.h>
+#include <mach/mmc.h>
#include <mach/common.h>
#include <mach/keypad.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
-#include <linux/i2c/twl4030-rtc.h>
#include <asm/io.h>
#include <asm/delay.h>
#include <mach/control.h>
#include "sdram-qimonda-hyb18m512160af-6.h"
+#include "mmc-twl4030.h"
+
+#define CONFIG_DISABLE_HFCLK 1
#define SDP3430_SMC91X_CS 3
#ifdef CONFIG_RTC_DRV_TWL4030
/* 3430ES2.0 doesn't have msecure/gpio-22 line connected to T2 */
if (omap_type() == OMAP2_DEVICE_TYPE_GP &&
- system_rev < OMAP3430_REV_ES2_0) {
- u32 msecure_pad_config_reg = omap_ctrl_base_get() + 0xA3C;
+ omap_rev() < OMAP3430_REV_ES2_0) {
+ void __iomem *msecure_pad_config_reg = omap_ctrl_base_get() +
+ 0xA3C;
int mux_mask = 0x04;
u16 tmp;
* is low. Make msecure line high in order to change the
* TWL4030 RTC time and calender registers.
*/
- tmp = omap_readw(msecure_pad_config_reg);
+ tmp = __raw_readw(msecure_pad_config_reg);
tmp &= 0xF8; /* To enable mux mode 03/04 = GPIO_RTC */
tmp |= mux_mask;/* To enable mux mode 03/04 = GPIO_RTC */
- omap_writew(tmp, msecure_pad_config_reg);
+ __raw_writew(tmp, msecure_pad_config_reg);
gpio_direction_output(TWL4030_MSECURE_GPIO, 1);
}
static int ads7846_get_pendown_state(void)
{
- return !omap_get_gpio_datain(ts_gpio);
+ return !gpio_get_value(ts_gpio);
}
/*
sdp3430_smc91x_resources[0].end = cs_mem_base + 0xf;
udelay(100);
- if (system_rev > OMAP3430_REV_ES1_0)
+ if (omap_rev() > OMAP3430_REV_ES1_0)
eth_gpio = OMAP34XX_ETHR_GPIO_IRQ_SDPV2;
else
eth_gpio = OMAP34XX_ETHR_GPIO_IRQ_SDPV1;
{ OMAP_TAG_LCD, &sdp3430_lcd_config },
};
+static int sdp3430_batt_table[] = {
+/* 0 C*/
+30800, 29500, 28300, 27100,
+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
+11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
+8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
+5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
+4040, 3910, 3790, 3670, 3550
+};
+
+static struct twl4030_bci_platform_data sdp3430_bci_data = {
+ .battery_tmp_tbl = sdp3430_batt_table,
+ .tblsize = ARRAY_SIZE(sdp3430_batt_table),
+};
+
static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.usb_mode = T2_USB_MODE_ULPI,
};
+static struct twl4030_madc_platform_data sdp3430_madc_data = {
+ .irq_line = 1,
+};
+
+
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+#ifndef CONFIG_DISABLE_HFCLK
+/*
+ * Wakeup VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
+#else
+/*
+ * Reenable the OMAP3 PLLs.
+ * Wakeup VDD1 and VDD2.
+ * Reenable sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+#endif /* #ifndef CONFIG_DISABLE_HFCLK */
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_ins wrst_seq[] __initdata = {
+/*
+ * Reset twl4030.
+ * Reset VDD1 regulator.
+ * Reset VDD2 regulator.
+ * Reset VPLL1 regulator.
+ * Enable sysclk output.
+ * Reenable twl4030.
+ */
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
+};
+static struct twl4030_script wrst_script __initdata = {
+ .script = wrst_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WRST_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ &sleep_on_script,
+ &wakeup_script,
+ &wrst_script,
+};
+
+static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
+ .scripts = twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */
+ .bci = &sdp3430_bci_data,
.gpio = &sdp3430_gpio_data,
+ .madc = &sdp3430_madc_data,
.keypad = &sdp3430_kp_data,
+ .power = &sdp3430_t2scripts_data,
.usb = &sdp3430_usb_data,
};
return 0;
}
+static struct twl4030_hsmmc_info mmc[] __initdata = {
+ {
+ .mmc = 1,
+ .wires = 8,
+ .gpio_cd = -EINVAL,
+ .gpio_wp = -EINVAL,
+ },
+ {
+ .mmc = 2,
+ .wires = 8,
+ .gpio_cd = -EINVAL,
+ .gpio_wp = -EINVAL,
+ },
+ {} /* Terminator */
+};
+
extern void __init sdp3430_flash_init(void);
static void __init omap_3430sdp_init(void)
platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
- if (system_rev > OMAP3430_REV_ES1_0)
+ if (omap_rev() > OMAP3430_REV_ES1_0)
ts_gpio = OMAP34XX_TS_GPIO_IRQ_SDPV2;
else
ts_gpio = OMAP34XX_TS_GPIO_IRQ_SDPV1;
ads7846_dev_init();
sdp3430_flash_init();
msecure_init();
- twl4030_bci_battery_init();
omap_serial_init();
usb_musb_init();
usb_ehci_init();
- hsmmc_init();
+ hsmmc_init(mmc);
}
static void __init omap_3430sdp_map_io(void)