/*
- * linux/arch/arm/mach-omap2/mmu.c
+ * linux/arch/arm/mach-omap1/mmu.c
*
* Support for non-MPU OMAP1 MMUs.
*
* and Paul Mundt <paul.mundt@nokia.com>
*
* This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/mm.h>
+#include <linux/interrupt.h>
#include <linux/err.h>
#include "mmu.h"
#include <asm/tlbflush.h>
+#include <mach/dsp_common.h>
static void *dspvect_page;
#define DSP_INIT_PAGE 0xfff000
+#define MMUFAULT_MASK (OMAP_MMU_FAULT_ST_PERM |\
+ OMAP_MMU_FAULT_ST_TLB_MISS |\
+ OMAP_MMU_FAULT_ST_TRANS)
+
static unsigned int get_cam_l_va_mask(u16 pgsz)
{
switch (pgsz) {
}
EXPORT_SYMBOL_GPL(dsp_mem_usecount_clear);
+void omap_mmu_itack(struct omap_mmu *mmu)
+{
+ omap_mmu_write_reg(mmu, OMAP_MMU_IT_ACK_IT_ACK, OMAP_MMU_IT_ACK);
+}
+EXPORT_SYMBOL(omap_mmu_itack);
+
static int omap1_mmu_mem_enable(struct omap_mmu *mmu, void *addr)
{
int ret = 0;
if (omap_mmu_internal_memory(mmu, addr)) {
if (intmem_usecount++ == 0)
ret = omap_dsp_request_mem();
- } else
- ret = -EIO;
+ }
return ret;
}
{
dspvect_page = (void *)__get_dma_pages(GFP_KERNEL, 0);
if (dspvect_page == NULL) {
- printk(KERN_ERR "MMU: failed to allocate memory "
- "for dsp vector table\n");
+ dev_err(mmu->dev, "MMU %s: failed to allocate memory "
+ "for vector table\n", mmu->name);
return -ENOMEM;
}
}
static struct cam_ram_regset *
-omap1_mmu_cam_ram_alloc(struct omap_mmu_tlb_entry *entry)
+omap1_mmu_cam_ram_alloc(struct omap_mmu *mmu, struct omap_mmu_tlb_entry *entry)
{
struct cam_ram_regset *cr;
if (entry->va & ~(get_cam_va_mask(entry->pgsz))) {
- printk(KERN_ERR "MMU: mapping vadr (0x%06lx) is not on an "
- "aligned boundary\n", entry->va);
+ dev_err(mmu->dev, "MMU %s: mapping vadr (0x%06lx) is not on"
+ " an aligned boundary\n", mmu->name, entry->va);
return ERR_PTR(-EINVAL);
}
return cr->cam_l & OMAP_MMU_CAM_V;
}
+static void omap1_mmu_interrupt(struct omap_mmu *mmu)
+{
+ unsigned long status;
+ unsigned long adh, adl;
+ unsigned long dp;
+ unsigned long va;
+
+ status = omap_mmu_read_reg(mmu, OMAP_MMU_FAULT_ST);
+ adh = omap_mmu_read_reg(mmu, OMAP_MMU_FAULT_AD_H);
+ adl = omap_mmu_read_reg(mmu, OMAP_MMU_FAULT_AD_L);
+ dp = adh & OMAP_MMU_FAULT_AD_H_DP;
+ va = (((adh & OMAP_MMU_FAULT_AD_H_ADR_MASK) << 16) | adl);
+
+ /* if the fault is masked, nothing to do */
+ if ((status & MMUFAULT_MASK) == 0) {
+ pr_debug("MMU interrupt, but ignoring.\n");
+ /*
+ * note: in OMAP1710,
+ * when CACHE + DMA domain gets out of idle in DSP,
+ * MMU interrupt occurs but MMU_FAULT_ST is not set.
+ * in this case, we just ignore the interrupt.
+ */
+ if (status) {
+ pr_debug("%s%s%s%s\n",
+ (status & OMAP_MMU_FAULT_ST_PREF)?
+ " (prefetch err)" : "",
+ (status & OMAP_MMU_FAULT_ST_PERM)?
+ " (permission fault)" : "",
+ (status & OMAP_MMU_FAULT_ST_TLB_MISS)?
+ " (TLB miss)" : "",
+ (status & OMAP_MMU_FAULT_ST_TRANS) ?
+ " (translation fault)": "");
+ pr_debug("fault address = %#08lx\n", va);
+ }
+ enable_irq(mmu->irq);
+ return;
+ }
+
+ pr_info("%s%s%s%s\n",
+ (status & OMAP_MMU_FAULT_ST_PREF)?
+ (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_PREF)?
+ " prefetch err":
+ " (prefetch err)":
+ "",
+ (status & OMAP_MMU_FAULT_ST_PERM)?
+ (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_PERM)?
+ " permission fault":
+ " (permission fault)":
+ "",
+ (status & OMAP_MMU_FAULT_ST_TLB_MISS)?
+ (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_TLB_MISS)?
+ " TLB miss":
+ " (TLB miss)":
+ "",
+ (status & OMAP_MMU_FAULT_ST_TRANS)?
+ (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_TRANS)?
+ " translation fault":
+ " (translation fault)":
+ "");
+ pr_info("fault address = %#08lx\n", va);
+
+ mmu->fault_address = va;
+ schedule_work(&mmu->irq_work);
+}
+
+static pgprot_t omap1_mmu_pte_get_attr(struct omap_mmu_tlb_entry *entry)
+{
+ /* 4KB AP position as default */
+ u32 attr = entry->ap >> 4;
+ attr <<= ((entry->pgsz == OMAP_MMU_CAM_PAGESIZE_1MB) ? 6:0);
+ return attr;
+}
+
struct omap_mmu_ops omap1_mmu_ops = {
.startup = omap1_mmu_startup,
.shutdown = omap1_mmu_shutdown,
.cam_va = omap1_mmu_cam_va,
.cam_ram_alloc = omap1_mmu_cam_ram_alloc,
.cam_ram_valid = omap1_mmu_cam_ram_valid,
+ .interrupt = omap1_mmu_interrupt,
+ .pte_get_attr = omap1_mmu_pte_get_attr,
};
EXPORT_SYMBOL_GPL(omap1_mmu_ops);
projects / linux-2.6-omap-h63xx.git / blobdiff