Merge current mainline tree into linux-omap tree

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap1 / clock.c

diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 5fba207317100f4ed3cacb9361e134a4e75ee926..4d0c44497ee13635660f4d4a5ddc1ab2013c46b4 100644 (file)
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -41,7 +41,7 @@ static void omap1_watchdog_recalc(struct clk * clk)
 
 static void omap1_uart_recalc(struct clk * clk)
 {
-       unsigned int val = omap_readl(clk->enable_reg);
+       unsigned int val = __raw_readl(clk->enable_reg);
        if (val & clk->enable_bit)
                clk->rate = 48000000;
        else
@@ -372,14 +372,14 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
 {
        unsigned int val;
 
-       val = omap_readl(clk->enable_reg);
+       val = __raw_readl(clk->enable_reg);
        if (rate == 12000000)
                val &= ~(1 << clk->enable_bit);
        else if (rate == 48000000)
                val |= (1 << clk->enable_bit);
        else
                return -EINVAL;
-       omap_writel(val, clk->enable_reg);
+       __raw_writel(val, clk->enable_reg);
        clk->rate = rate;
 
        return 0;
@@ -398,8 +398,8 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
        else
                ratio_bits = (dsor - 2) << 2;
 
-       ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd;
-       omap_writew(ratio_bits, clk->enable_reg);
+       ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
+       __raw_writew(ratio_bits, clk->enable_reg);
 
        return 0;
 }
@@ -440,8 +440,8 @@ static void omap1_init_ext_clk(struct clk * clk)
        __u16 ratio_bits;
 
        /* Determine current rate and ensure clock is based on 96MHz APLL */
-       ratio_bits = omap_readw(clk->enable_reg) & ~1;
-       omap_writew(ratio_bits, clk->enable_reg);
+       ratio_bits = __raw_readw(clk->enable_reg) & ~1;
+       __raw_writew(ratio_bits, clk->enable_reg);
 
        ratio_bits = (ratio_bits & 0xfc) >> 2;
        if (ratio_bits > 6)
@@ -506,25 +506,13 @@ static int omap1_clk_enable_generic(struct clk *clk)
        }
 
        if (clk->flags & ENABLE_REG_32BIT) {
-               if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                       regval32 = __raw_readl(clk->enable_reg);
-                       regval32 |= (1 << clk->enable_bit);
-                       __raw_writel(regval32, clk->enable_reg);
-               } else {
-                       regval32 = omap_readl(clk->enable_reg);
-                       regval32 |= (1 << clk->enable_bit);
-                       omap_writel(regval32, clk->enable_reg);
-               }
+               regval32 = __raw_readl(clk->enable_reg);
+               regval32 |= (1 << clk->enable_bit);
+               __raw_writel(regval32, clk->enable_reg);
        } else {
-               if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                       regval16 = __raw_readw(clk->enable_reg);
-                       regval16 |= (1 << clk->enable_bit);
-                       __raw_writew(regval16, clk->enable_reg);
-               } else {
-                       regval16 = omap_readw(clk->enable_reg);
-                       regval16 |= (1 << clk->enable_bit);
-                       omap_writew(regval16, clk->enable_reg);
-               }
+               regval16 = __raw_readw(clk->enable_reg);
+               regval16 |= (1 << clk->enable_bit);
+               __raw_writew(regval16, clk->enable_reg);
        }
 
        return 0;
@@ -539,25 +527,13 @@ static void omap1_clk_disable_generic(struct clk *clk)
                return;
 
        if (clk->flags & ENABLE_REG_32BIT) {
-               if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                       regval32 = __raw_readl(clk->enable_reg);
-                       regval32 &= ~(1 << clk->enable_bit);
-                       __raw_writel(regval32, clk->enable_reg);
-               } else {
-                       regval32 = omap_readl(clk->enable_reg);
-                       regval32 &= ~(1 << clk->enable_bit);
-                       omap_writel(regval32, clk->enable_reg);
-               }
+               regval32 = __raw_readl(clk->enable_reg);
+               regval32 &= ~(1 << clk->enable_bit);
+               __raw_writel(regval32, clk->enable_reg);
        } else {
-               if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                       regval16 = __raw_readw(clk->enable_reg);
-                       regval16 &= ~(1 << clk->enable_bit);
-                       __raw_writew(regval16, clk->enable_reg);
-               } else {
-                       regval16 = omap_readw(clk->enable_reg);
-                       regval16 &= ~(1 << clk->enable_bit);
-                       omap_writew(regval16, clk->enable_reg);
-               }
+               regval16 = __raw_readw(clk->enable_reg);
+               regval16 &= ~(1 << clk->enable_bit);
+               __raw_writew(regval16, clk->enable_reg);
        }
 }
 
@@ -632,17 +608,10 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
        }
 
        /* Is the clock already disabled? */
-       if (clk->flags & ENABLE_REG_32BIT) {
-               if (clk->flags & VIRTUAL_IO_ADDRESS)
-                       regval32 = __raw_readl(clk->enable_reg);
-                       else
-                               regval32 = omap_readl(clk->enable_reg);
-       } else {
-               if (clk->flags & VIRTUAL_IO_ADDRESS)
-                       regval32 = __raw_readw(clk->enable_reg);
-               else
-                       regval32 = omap_readw(clk->enable_reg);
-       }
+       if (clk->flags & ENABLE_REG_32BIT)
+               regval32 = __raw_readl(clk->enable_reg);
+       else
+               regval32 = __raw_readw(clk->enable_reg);
 
        if ((regval32 & (1 << clk->enable_bit)) == 0)
                return;