[ARM] pxa: add base support for Marvell PXA910

[linux-2.6-omap-h63xx.git] / arch / arm / mach-mmp / include / mach / irqs.h

diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 91ecb3fbca060b221c0e23521a4485741b787479..e83e45ebf7a45a3e2b292272130f9212442af315 100644 (file)
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -49,6 +49,67 @@
 #define IRQ_PXA168_PMU                 60
 #define IRQ_PXA168_SM_INT              63
 
+/*
+ * Interrupt numbers for PXA910
+ */
+#define IRQ_PXA910_AIRQ                        0
+#define IRQ_PXA910_SSP3                        1
+#define IRQ_PXA910_SSP2                        2
+#define IRQ_PXA910_SSP1                        3
+#define IRQ_PXA910_PMIC_INT            4
+#define IRQ_PXA910_RTC_INT             5
+#define IRQ_PXA910_RTC_ALARM           6
+#define IRQ_PXA910_TWSI0               7
+#define IRQ_PXA910_GPU                 8
+#define IRQ_PXA910_KEYPAD              9
+#define IRQ_PXA910_ROTARY              10
+#define IRQ_PXA910_TRACKBALL           11
+#define IRQ_PXA910_ONEWIRE             12
+#define IRQ_PXA910_AP1_TIMER1          13
+#define IRQ_PXA910_AP1_TIMER2          14
+#define IRQ_PXA910_AP1_TIMER3          15
+#define IRQ_PXA910_IPC_AP0             16
+#define IRQ_PXA910_IPC_AP1             17
+#define IRQ_PXA910_IPC_AP2             18
+#define IRQ_PXA910_IPC_AP3             19
+#define IRQ_PXA910_IPC_AP4             20
+#define IRQ_PXA910_IPC_CP0             21
+#define IRQ_PXA910_IPC_CP1             22
+#define IRQ_PXA910_IPC_CP2             23
+#define IRQ_PXA910_IPC_CP3             24
+#define IRQ_PXA910_IPC_CP4             25
+#define IRQ_PXA910_L2_DDR              26
+#define IRQ_PXA910_UART2               27
+#define IRQ_PXA910_UART3               28
+#define IRQ_PXA910_AP2_TIMER1          29
+#define IRQ_PXA910_AP2_TIMER2          30
+#define IRQ_PXA910_CP2_TIMER1          31
+#define IRQ_PXA910_CP2_TIMER2          32
+#define IRQ_PXA910_CP2_TIMER3          33
+#define IRQ_PXA910_GSSP                        34
+#define IRQ_PXA910_CP2_WDT             35
+#define IRQ_PXA910_MAIN_PMU            36
+#define IRQ_PXA910_CP_FREQ_CHG         37
+#define IRQ_PXA910_AP_FREQ_CHG         38
+#define IRQ_PXA910_MMC                 39
+#define IRQ_PXA910_AEU                 40
+#define IRQ_PXA910_LCD                 41
+#define IRQ_PXA910_CCIC                        42
+#define IRQ_PXA910_IRE                 43
+#define IRQ_PXA910_USB1                        44
+#define IRQ_PXA910_NAND                        45
+#define IRQ_PXA910_HIFI_DMA            46
+#define IRQ_PXA910_DMA_INT0            47
+#define IRQ_PXA910_DMA_INT1            48
+#define IRQ_PXA910_AP_GPIO             49
+#define IRQ_PXA910_AP2_TIMER3          50
+#define IRQ_PXA910_USB2                        51
+#define IRQ_PXA910_TWSI1               54
+#define IRQ_PXA910_CP_GPIO             55
+#define IRQ_PXA910_UART1               59      /* Slow UART */
+#define IRQ_PXA910_AP_PMU              60
+#define IRQ_PXA910_SM_INT              63      /* from PinMux */
+
 #define IRQ_GPIO_START                 64
 #define IRQ_GPIO_NUM                   128
 #define IRQ_GPIO(x)                    (IRQ_GPIO_START + (x))