]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-at91/at91sam9rl_devices.c
[ARM] 4754/1: [AT91] SSC library support
[linux-2.6-omap-h63xx.git] / arch / arm / mach-at91 / at91sam9rl_devices.c
index bec8066f9ba188b6b20be286eedb3c19a47f4d19..e886cdfe919d6eb89e8cb14bd8bd3e031375b2de 100644 (file)
@@ -471,6 +471,135 @@ void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  SSC -- Synchronous Serial Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc0_resources[] = {
+       [0] = {
+               .start  = AT91SAM9RL_BASE_SSC0,
+               .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9RL_ID_SSC0,
+               .end    = AT91SAM9RL_ID_SSC0,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9rl_ssc0_device = {
+       .name   = "ssc",
+       .id     = 0,
+       .dev    = {
+               .dma_mask               = &ssc0_dmamask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+       .resource       = ssc0_resources,
+       .num_resources  = ARRAY_SIZE(ssc0_resources),
+};
+
+static inline void configure_ssc0_pins(unsigned pins)
+{
+       if (pins & ATMEL_SSC_TF)
+               at91_set_A_periph(AT91_PIN_PC0, 1);
+       if (pins & ATMEL_SSC_TK)
+               at91_set_A_periph(AT91_PIN_PC1, 1);
+       if (pins & ATMEL_SSC_TD)
+               at91_set_A_periph(AT91_PIN_PA15, 1);
+       if (pins & ATMEL_SSC_RD)
+               at91_set_A_periph(AT91_PIN_PA16, 1);
+       if (pins & ATMEL_SSC_RK)
+               at91_set_B_periph(AT91_PIN_PA10, 1);
+       if (pins & ATMEL_SSC_RF)
+               at91_set_B_periph(AT91_PIN_PA22, 1);
+}
+
+static u64 ssc1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc1_resources[] = {
+       [0] = {
+               .start  = AT91SAM9RL_BASE_SSC1,
+               .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9RL_ID_SSC1,
+               .end    = AT91SAM9RL_ID_SSC1,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9rl_ssc1_device = {
+       .name   = "ssc",
+       .id     = 1,
+       .dev    = {
+               .dma_mask               = &ssc1_dmamask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+       .resource       = ssc1_resources,
+       .num_resources  = ARRAY_SIZE(ssc1_resources),
+};
+
+static inline void configure_ssc1_pins(unsigned pins)
+{
+       if (pins & ATMEL_SSC_TF)
+               at91_set_B_periph(AT91_PIN_PA29, 1);
+       if (pins & ATMEL_SSC_TK)
+               at91_set_B_periph(AT91_PIN_PA30, 1);
+       if (pins & ATMEL_SSC_TD)
+               at91_set_B_periph(AT91_PIN_PA13, 1);
+       if (pins & ATMEL_SSC_RD)
+               at91_set_B_periph(AT91_PIN_PA14, 1);
+       if (pins & ATMEL_SSC_RK)
+               at91_set_B_periph(AT91_PIN_PA9, 1);
+       if (pins & ATMEL_SSC_RF)
+               at91_set_B_periph(AT91_PIN_PA8, 1);
+}
+
+/*
+ * Return the device node so that board init code can use it as the
+ * parent for the device node reflecting how it's used on this board.
+ *
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
+{
+       struct platform_device *pdev;
+
+       /*
+        * NOTE: caller is responsible for passing information matching
+        * "pins" to whatever will be using each particular controller.
+        */
+       switch (id) {
+       case AT91SAM9RL_ID_SSC0:
+               pdev = &at91sam9rl_ssc0_device;
+               configure_ssc0_pins(pins);
+               at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
+               break;
+       case AT91SAM9RL_ID_SSC1:
+               pdev = &at91sam9rl_ssc1_device;
+               configure_ssc1_pins(pins);
+               at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
+               break;
+       default:
+               return;
+       }
+
+       platform_device_register(pdev);
+}
+
+#else
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
+#endif
+
+
 /* --------------------------------------------------------------------
  *  UART
  * -------------------------------------------------------------------- */