Merge branch 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel...

[linux-2.6-omap-h63xx.git] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 0ca2eb7573cd21a2d7298371345d2c32bbc0b0b4..249d1e0824b523e0a1e51a613a86a497649cc089 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -19,6 +19,8 @@ config X86_64
 config X86
        def_bool y
        select HAVE_AOUT if X86_32
 config X86
        def_bool y
        select HAVE_AOUT if X86_32

+       select HAVE_READQ
+       select HAVE_WRITEQ

        select HAVE_UNSTABLE_SCHED_CLOCK
        select HAVE_IDE
        select HAVE_OPROFILE
        select HAVE_UNSTABLE_SCHED_CLOCK
        select HAVE_IDE
        select HAVE_OPROFILE


@@ -90,6 +92,10 @@ config GENERIC_IOMAP
 config GENERIC_BUG
        def_bool y
        depends on BUG
 config GENERIC_BUG
        def_bool y
        depends on BUG

+       select GENERIC_BUG_RELATIVE_POINTERS if X86_64
+
+config GENERIC_BUG_RELATIVE_POINTERS
+       bool

 
 config GENERIC_HWEIGHT
        def_bool y
 
 config GENERIC_HWEIGHT
        def_bool y


@@ -244,16 +250,19 @@ config X86_HAS_BOOT_CPU_ID
 config SPARSE_IRQ
        bool "Support sparse irq numbering"
        depends on PCI_MSI || HT_IRQ
 config SPARSE_IRQ
        bool "Support sparse irq numbering"
        depends on PCI_MSI || HT_IRQ

-       default y

        help
        help

-         This enables support for sparse irq, esp for msi/msi-x. You may need
-         if you have lots of cards supports msi-x installed.
+         This enables support for sparse irqs. This is useful for distro
+         kernels that want to define a high CONFIG_NR_CPUS value but still
+         want to have low kernel memory footprint on smaller machines.

 
 

-         If you don't know what to do here, say Y.
+         ( Sparse IRQs can also be beneficial on NUMA boxes, as they spread
+           out the irq_desc[] array in a more NUMA-friendly way. )
+
+         If you don't know what to do here, say N.

 
 config NUMA_MIGRATE_IRQ_DESC
        bool "Move irq desc when changing irq smp_affinity"
 
 config NUMA_MIGRATE_IRQ_DESC
        bool "Move irq desc when changing irq smp_affinity"

-       depends on SPARSE_IRQ && SMP
+       depends on SPARSE_IRQ && NUMA

        default n
        help
          This enables moving irq_desc to cpu/node that irq will use handled.
        default n
        help
          This enables moving irq_desc to cpu/node that irq will use handled.


@@ -264,21 +273,13 @@ config X86_FIND_SMP_CONFIG
        def_bool y
        depends on X86_MPPARSE || X86_VOYAGER
 
        def_bool y
        depends on X86_MPPARSE || X86_VOYAGER
 

-if ACPI

 config X86_MPPARSE
 config X86_MPPARSE

-       def_bool y
-       bool "Enable MPS table"
+       bool "Enable MPS table" if ACPI
+       default y

        depends on X86_LOCAL_APIC
        help
          For old smp systems that do not have proper acpi support. Newer systems
          (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
        depends on X86_LOCAL_APIC
        help
          For old smp systems that do not have proper acpi support. Newer systems
          (esp with 64bit cpus) with acpi support, MADT and DSDT will override it

-endif
-
-if !ACPI
-config X86_MPPARSE
-       def_bool y
-       depends on X86_LOCAL_APIC
-endif

 
 choice
        prompt "Subarchitecture Type"
 
 choice
        prompt "Subarchitecture Type"


@@ -500,7 +501,7 @@ config HPET_TIMER
          The HPET provides a stable time base on SMP
          systems, unlike the TSC, but it is more expensive to access,
          as it is off-chip.  You can find the HPET spec at
          The HPET provides a stable time base on SMP
          systems, unlike the TSC, but it is more expensive to access,
          as it is off-chip.  You can find the HPET spec at

-         <http://www.intel.com/hardwaredesign/hpetspec.htm>.
+         <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.

 
          You can safely choose Y here.  However, HPET will only be
          activated if the platform and the BIOS support this feature.
 
          You can safely choose Y here.  However, HPET will only be
          activated if the platform and the BIOS support this feature.


@@ -587,7 +588,7 @@ config AMD_IOMMU
 
 # need this always selected by IOMMU for the VIA workaround
 config SWIOTLB
 
 # need this always selected by IOMMU for the VIA workaround
 config SWIOTLB

-       bool
+       def_bool y if X86_64

        help
          Support for software bounce buffers used on x86-64 systems
          which don't have a hardware IOMMU (e.g. the current generation
        help
          Support for software bounce buffers used on x86-64 systems
          which don't have a hardware IOMMU (e.g. the current generation


@@ -679,6 +680,30 @@ config X86_VISWS_APIC
        def_bool y
        depends on X86_32 && X86_VISWS
 
        def_bool y
        depends on X86_32 && X86_VISWS
 

+config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
+       bool "Reroute for broken boot IRQs"
+       default n
+       depends on X86_IO_APIC
+       help
+         This option enables a workaround that fixes a source of
+         spurious interrupts. This is recommended when threaded
+         interrupt handling is used on systems where the generation of
+         superfluous "boot interrupts" cannot be disabled.
+
+         Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
+         entry in the chipset's IO-APIC is masked (as, e.g. the RT
+         kernel does during interrupt handling). On chipsets where this
+         boot IRQ generation cannot be disabled, this workaround keeps
+         the original IRQ line masked so that only the equivalent "boot
+         IRQ" is delivered to the CPUs. The workaround also tells the
+         kernel to set up the IRQ handler on the boot IRQ line. In this
+         way only one interrupt is delivered to the kernel. Otherwise
+         the spurious second interrupt may cause the kernel to bring
+         down (vital) interrupt lines.
+
+         Only affects "broken" chipsets. Interrupt sharing may be
+         increased on these systems.
+

 config X86_MCE
        bool "Machine Check Exception"
        depends on !X86_VOYAGER
 config X86_MCE
        bool "Machine Check Exception"
        depends on !X86_VOYAGER


@@ -975,24 +1000,37 @@ config X86_PAE
 config ARCH_PHYS_ADDR_T_64BIT
        def_bool X86_64 || X86_PAE
 
 config ARCH_PHYS_ADDR_T_64BIT
        def_bool X86_64 || X86_PAE
 

+config DIRECT_GBPAGES
+       bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
+       default y
+       depends on X86_64
+       help
+         Allow the kernel linear mapping to use 1GB pages on CPUs that
+         support it. This can improve the kernel's performance a tiny bit by
+         reducing TLB pressure. If in doubt, say "Y".
+

 # Common NUMA Features
 config NUMA
 # Common NUMA Features
 config NUMA

-       bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)"
+       bool "Numa Memory Allocation and Scheduler Support"

        depends on SMP
        depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
        default n if X86_PC
        default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
        help
          Enable NUMA (Non Uniform Memory Access) support.
        depends on SMP
        depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
        default n if X86_PC
        default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
        help
          Enable NUMA (Non Uniform Memory Access) support.

+

          The kernel will try to allocate memory used by a CPU on the
          local memory controller of the CPU and add some more
          NUMA awareness to the kernel.
 
          The kernel will try to allocate memory used by a CPU on the
          local memory controller of the CPU and add some more
          NUMA awareness to the kernel.
 

-         For 32-bit this is currently highly experimental and should be only
-         used for kernel development. It might also cause boot failures.
-         For 64-bit this is recommended on all multiprocessor Opteron systems.
-         If the system is EM64T, you should say N unless your system is
-         EM64T NUMA.
+         For 64-bit this is recommended if the system is Intel Core i7
+         (or later), AMD Opteron, or EM64T NUMA.
+
+         For 32-bit this is only needed on (rare) 32-bit-only platforms
+         that support NUMA topologies, such as NUMAQ / Summit, or if you
+         boot a 32-bit kernel on a 64-bit NUMA platform.
+
+         Otherwise, you should say N.

 
 comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
        depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
 
 comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
        depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)


@@ -1512,6 +1550,10 @@ config ARCH_ENABLE_MEMORY_HOTPLUG
        def_bool y
        depends on X86_64 || (X86_32 && HIGHMEM)
 
        def_bool y
        depends on X86_64 || (X86_32 && HIGHMEM)
 

+config ARCH_ENABLE_MEMORY_HOTREMOVE
+       def_bool y
+       depends on MEMORY_HOTPLUG
+

 config HAVE_ARCH_EARLY_PFN_TO_NID
        def_bool X86_64
        depends on NUMA
 config HAVE_ARCH_EARLY_PFN_TO_NID
        def_bool X86_64
        depends on NUMA