sound/pci/oxygen/oxygen_pcm.c

   1 /*
   2  * C-Media CMI8788 driver - PCM code
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/pci.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include "oxygen.h"
  26
  27 static struct snd_pcm_hardware oxygen_hardware[PCM_COUNT] = {
  28         [PCM_A] = {
  29                 .info = SNDRV_PCM_INFO_MMAP |
  30                         SNDRV_PCM_INFO_MMAP_VALID |
  31                         SNDRV_PCM_INFO_INTERLEAVED |
  32                         SNDRV_PCM_INFO_PAUSE |
  33                         SNDRV_PCM_INFO_SYNC_START,
  34                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  35                            SNDRV_PCM_FMTBIT_S32_LE,
  36                 .rates = SNDRV_PCM_RATE_32000 |
  37                          SNDRV_PCM_RATE_44100 |
  38                          SNDRV_PCM_RATE_48000 |
  39                          SNDRV_PCM_RATE_64000 |
  40                          SNDRV_PCM_RATE_88200 |
  41                          SNDRV_PCM_RATE_96000 |
  42                          SNDRV_PCM_RATE_176400 |
  43                          SNDRV_PCM_RATE_192000,
  44                 .rate_min = 32000,
  45                 .rate_max = 192000,
  46                 .channels_min = 2,
  47                 .channels_max = 2,
  48                 .buffer_bytes_max = 256 * 1024,
  49                 .period_bytes_min = 128,
  50                 .period_bytes_max = 128 * 1024,
  51                 .periods_min = 2,
  52                 .periods_max = 2048,
  53         },
  54         [PCM_B] = {
  55                 .info = SNDRV_PCM_INFO_MMAP |
  56                         SNDRV_PCM_INFO_MMAP_VALID |
  57                         SNDRV_PCM_INFO_INTERLEAVED |
  58                         SNDRV_PCM_INFO_PAUSE |
  59                         SNDRV_PCM_INFO_SYNC_START,
  60                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  61                            SNDRV_PCM_FMTBIT_S32_LE,
  62                 .rates = SNDRV_PCM_RATE_32000 |
  63                          SNDRV_PCM_RATE_44100 |
  64                          SNDRV_PCM_RATE_48000 |
  65                          SNDRV_PCM_RATE_64000 |
  66                          SNDRV_PCM_RATE_88200 |
  67                          SNDRV_PCM_RATE_96000 |
  68                          SNDRV_PCM_RATE_176400 |
  69                          SNDRV_PCM_RATE_192000,
  70                 .rate_min = 32000,
  71                 .rate_max = 192000,
  72                 .channels_min = 2,
  73                 .channels_max = 2,
  74                 .buffer_bytes_max = 256 * 1024,
  75                 .period_bytes_min = 128,
  76                 .period_bytes_max = 128 * 1024,
  77                 .periods_min = 2,
  78                 .periods_max = 2048,
  79         },
  80         [PCM_C] = {
  81                 .info = SNDRV_PCM_INFO_MMAP |
  82                         SNDRV_PCM_INFO_MMAP_VALID |
  83                         SNDRV_PCM_INFO_INTERLEAVED |
  84                         SNDRV_PCM_INFO_PAUSE |
  85                         SNDRV_PCM_INFO_SYNC_START,
  86                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  87                            SNDRV_PCM_FMTBIT_S32_LE,
  88                 .rates = SNDRV_PCM_RATE_44100 |
  89                          SNDRV_PCM_RATE_48000 |
  90                          SNDRV_PCM_RATE_88200 |
  91                          SNDRV_PCM_RATE_96000,
  92                 .rate_min = 44100,
  93                 .rate_max = 96000,
  94                 .channels_min = 2,
  95                 .channels_max = 2,
  96                 .buffer_bytes_max = 256 * 1024,
  97                 .period_bytes_min = 128,
  98                 .period_bytes_max = 128 * 1024,
  99                 .periods_min = 2,
 100                 .periods_max = 2048,
 101         },
 102         [PCM_SPDIF] = {
 103                 .info = SNDRV_PCM_INFO_MMAP |
 104                         SNDRV_PCM_INFO_MMAP_VALID |
 105                         SNDRV_PCM_INFO_INTERLEAVED |
 106                         SNDRV_PCM_INFO_PAUSE |
 107                         SNDRV_PCM_INFO_SYNC_START,
 108                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 109                            SNDRV_PCM_FMTBIT_S32_LE,
 110                 .rates = SNDRV_PCM_RATE_32000 |
 111                          SNDRV_PCM_RATE_44100 |
 112                          SNDRV_PCM_RATE_48000 |
 113                          SNDRV_PCM_RATE_64000 |
 114                          SNDRV_PCM_RATE_88200 |
 115                          SNDRV_PCM_RATE_96000 |
 116                          SNDRV_PCM_RATE_176400 |
 117                          SNDRV_PCM_RATE_192000,
 118                 .rate_min = 32000,
 119                 .rate_max = 192000,
 120                 .channels_min = 2,
 121                 .channels_max = 2,
 122                 .buffer_bytes_max = 256 * 1024,
 123                 .period_bytes_min = 128,
 124                 .period_bytes_max = 128 * 1024,
 125                 .periods_min = 2,
 126                 .periods_max = 2048,
 127         },
 128         [PCM_MULTICH] = {
 129                 .info = SNDRV_PCM_INFO_MMAP |
 130                         SNDRV_PCM_INFO_MMAP_VALID |
 131                         SNDRV_PCM_INFO_INTERLEAVED |
 132                         SNDRV_PCM_INFO_PAUSE |
 133                         SNDRV_PCM_INFO_SYNC_START,
 134                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 135                            SNDRV_PCM_FMTBIT_S32_LE,
 136                 .rates = SNDRV_PCM_RATE_32000 |
 137                          SNDRV_PCM_RATE_44100 |
 138                          SNDRV_PCM_RATE_48000 |
 139                          SNDRV_PCM_RATE_64000 |
 140                          SNDRV_PCM_RATE_88200 |
 141                          SNDRV_PCM_RATE_96000 |
 142                          SNDRV_PCM_RATE_176400 |
 143                          SNDRV_PCM_RATE_192000,
 144                 .rate_min = 32000,
 145                 .rate_max = 192000,
 146                 .channels_min = 2,
 147                 .channels_max = 8,
 148                 .buffer_bytes_max = 2048 * 1024,
 149                 .period_bytes_min = 128,
 150                 .period_bytes_max = 256 * 1024,
 151                 .periods_min = 2,
 152                 .periods_max = 16384,
 153         },
 154         [PCM_AC97] = {
 155                 .info = SNDRV_PCM_INFO_MMAP |
 156                         SNDRV_PCM_INFO_MMAP_VALID |
 157                         SNDRV_PCM_INFO_INTERLEAVED |
 158                         SNDRV_PCM_INFO_PAUSE |
 159                         SNDRV_PCM_INFO_SYNC_START,
 160                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 161                 .rates = SNDRV_PCM_RATE_48000,
 162                 .rate_min = 48000,
 163                 .rate_max = 48000,
 164                 .channels_min = 2,
 165                 .channels_max = 2,
 166                 .buffer_bytes_max = 256 * 1024,
 167                 .period_bytes_min = 128,
 168                 .period_bytes_max = 128 * 1024,
 169                 .periods_min = 2,
 170                 .periods_max = 2048,
 171         },
 172 };
 173
 174 static inline unsigned int
 175 oxygen_substream_channel(struct snd_pcm_substream *substream)
 176 {
 177         return (unsigned int)(uintptr_t)substream->runtime->private_data;
 178 }
 179
 180 static int oxygen_open(struct snd_pcm_substream *substream,
 181                        unsigned int channel)
 182 {
 183         struct oxygen *chip = snd_pcm_substream_chip(substream);
 184         struct snd_pcm_runtime *runtime = substream->runtime;
 185         int err;
 186
 187         runtime->private_data = (void *)(uintptr_t)channel;
 188         runtime->hw = oxygen_hardware[channel];
 189         if (chip->model->pcm_hardware_filter)
 190                 chip->model->pcm_hardware_filter(channel, &runtime->hw);
 191         err = snd_pcm_hw_constraint_step(runtime, 0,
 192                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
 193         if (err < 0)
 194                 return err;
 195         err = snd_pcm_hw_constraint_step(runtime, 0,
 196                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
 197         if (err < 0)
 198                 return err;
 199         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
 200                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 201                 if (err < 0)
 202                         return err;
 203         }
 204         if (runtime->hw.channels_max > 2) {
 205                 err = snd_pcm_hw_constraint_step(runtime, 0,
 206                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
 207                                                  2);
 208                 if (err < 0)
 209                         return err;
 210         }
 211         snd_pcm_set_sync(substream);
 212         chip->streams[channel] = substream;
 213
 214         mutex_lock(&chip->mutex);
 215         chip->pcm_active |= 1 << channel;
 216         if (channel == PCM_SPDIF) {
 217                 chip->spdif_pcm_bits = chip->spdif_bits;
 218                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
 219                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 220                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 221                                SNDRV_CTL_EVENT_MASK_INFO,
 222                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 223         }
 224         mutex_unlock(&chip->mutex);
 225
 226         return 0;
 227 }
 228
 229 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
 230 {
 231         return oxygen_open(substream, PCM_A);
 232 }
 233
 234 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
 235 {
 236         return oxygen_open(substream, PCM_B);
 237 }
 238
 239 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
 240 {
 241         return oxygen_open(substream, PCM_C);
 242 }
 243
 244 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
 245 {
 246         return oxygen_open(substream, PCM_SPDIF);
 247 }
 248
 249 static int oxygen_multich_open(struct snd_pcm_substream *substream)
 250 {
 251         return oxygen_open(substream, PCM_MULTICH);
 252 }
 253
 254 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
 255 {
 256         return oxygen_open(substream, PCM_AC97);
 257 }
 258
 259 static int oxygen_close(struct snd_pcm_substream *substream)
 260 {
 261         struct oxygen *chip = snd_pcm_substream_chip(substream);
 262         unsigned int channel = oxygen_substream_channel(substream);
 263
 264         mutex_lock(&chip->mutex);
 265         chip->pcm_active &= ~(1 << channel);
 266         if (channel == PCM_SPDIF) {
 267                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
 268                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 269                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 270                                SNDRV_CTL_EVENT_MASK_INFO,
 271                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 272         }
 273         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
 274                 oxygen_update_spdif_source(chip);
 275         mutex_unlock(&chip->mutex);
 276
 277         chip->streams[channel] = NULL;
 278         return 0;
 279 }
 280
 281 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
 282 {
 283         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 284                 return OXYGEN_FORMAT_24;
 285         else
 286                 return OXYGEN_FORMAT_16;
 287 }
 288
 289 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
 290 {
 291         switch (params_rate(hw_params)) {
 292         case 32000:
 293                 return OXYGEN_RATE_32000;
 294         case 44100:
 295                 return OXYGEN_RATE_44100;
 296         default: /* 48000 */
 297                 return OXYGEN_RATE_48000;
 298         case 64000:
 299                 return OXYGEN_RATE_64000;
 300         case 88200:
 301                 return OXYGEN_RATE_88200;
 302         case 96000:
 303                 return OXYGEN_RATE_96000;
 304         case 176400:
 305                 return OXYGEN_RATE_176400;
 306         case 192000:
 307                 return OXYGEN_RATE_192000;
 308         }
 309 }
 310
 311 static unsigned int oxygen_i2s_magic2(struct snd_pcm_hw_params *hw_params)
 312 {
 313         return params_rate(hw_params) <= 96000 ? 0x10 : 0x00;
 314 }
 315
 316 static unsigned int oxygen_i2s_format(struct snd_pcm_hw_params *hw_params)
 317 {
 318         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 319                 return OXYGEN_I2S_FORMAT_24;
 320         else
 321                 return OXYGEN_I2S_FORMAT_16;
 322 }
 323
 324 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
 325 {
 326         switch (params_channels(hw_params)) {
 327         default: /* 2 */
 328                 return OXYGEN_PLAY_CHANNELS_2;
 329         case 4:
 330                 return OXYGEN_PLAY_CHANNELS_4;
 331         case 6:
 332                 return OXYGEN_PLAY_CHANNELS_6;
 333         case 8:
 334                 return OXYGEN_PLAY_CHANNELS_8;
 335         }
 336 }
 337
 338 static const unsigned int channel_base_registers[PCM_COUNT] = {
 339         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
 340         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
 341         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
 342         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
 343         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
 344         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
 345 };
 346
 347 static int oxygen_hw_params(struct snd_pcm_substream *substream,
 348                             struct snd_pcm_hw_params *hw_params)
 349 {
 350         struct oxygen *chip = snd_pcm_substream_chip(substream);
 351         unsigned int channel = oxygen_substream_channel(substream);
 352         int err;
 353
 354         err = snd_pcm_lib_malloc_pages(substream,
 355                                        params_buffer_bytes(hw_params));
 356         if (err < 0)
 357                 return err;
 358
 359         oxygen_write32(chip, channel_base_registers[channel],
 360                        (u32)substream->runtime->dma_addr);
 361         if (channel == PCM_MULTICH) {
 362                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
 363                                params_buffer_bytes(hw_params) / 4 - 1);
 364                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
 365                                params_period_bytes(hw_params) / 4 - 1);
 366         } else {
 367                 oxygen_write16(chip, channel_base_registers[channel] + 4,
 368                                params_buffer_bytes(hw_params) / 4 - 1);
 369                 oxygen_write16(chip, channel_base_registers[channel] + 6,
 370                                params_period_bytes(hw_params) / 4 - 1);
 371         }
 372         return 0;
 373 }
 374
 375 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
 376                                   struct snd_pcm_hw_params *hw_params)
 377 {
 378         struct oxygen *chip = snd_pcm_substream_chip(substream);
 379         int err;
 380
 381         err = oxygen_hw_params(substream, hw_params);
 382         if (err < 0)
 383                 return err;
 384
 385         spin_lock_irq(&chip->reg_lock);
 386         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 387                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
 388                              OXYGEN_REC_FORMAT_A_MASK);
 389         oxygen_write8_masked(chip, OXYGEN_I2S_A_FORMAT,
 390                              oxygen_rate(hw_params) |
 391                              oxygen_i2s_magic2(hw_params) |
 392                              oxygen_i2s_format(hw_params),
 393                              OXYGEN_I2S_RATE_MASK |
 394                              OXYGEN_I2S_MAGIC2_MASK |
 395                              OXYGEN_I2S_FORMAT_MASK);
 396         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x08);
 397         spin_unlock_irq(&chip->reg_lock);
 398
 399         mutex_lock(&chip->mutex);
 400         chip->model->set_adc_params(chip, hw_params);
 401         mutex_unlock(&chip->mutex);
 402         return 0;
 403 }
 404
 405 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
 406                                   struct snd_pcm_hw_params *hw_params)
 407 {
 408         struct oxygen *chip = snd_pcm_substream_chip(substream);
 409         int err;
 410
 411         err = oxygen_hw_params(substream, hw_params);
 412         if (err < 0)
 413                 return err;
 414
 415         spin_lock_irq(&chip->reg_lock);
 416         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 417                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
 418                              OXYGEN_REC_FORMAT_B_MASK);
 419         oxygen_write8_masked(chip, OXYGEN_I2S_B_FORMAT,
 420                              oxygen_rate(hw_params) |
 421                              oxygen_i2s_magic2(hw_params) |
 422                              oxygen_i2s_format(hw_params),
 423                              OXYGEN_I2S_RATE_MASK |
 424                              OXYGEN_I2S_MAGIC2_MASK |
 425                              OXYGEN_I2S_FORMAT_MASK);
 426         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x10);
 427         spin_unlock_irq(&chip->reg_lock);
 428
 429         mutex_lock(&chip->mutex);
 430         chip->model->set_adc_params(chip, hw_params);
 431         mutex_unlock(&chip->mutex);
 432         return 0;
 433 }
 434
 435 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
 436                                   struct snd_pcm_hw_params *hw_params)
 437 {
 438         struct oxygen *chip = snd_pcm_substream_chip(substream);
 439         int err;
 440
 441         err = oxygen_hw_params(substream, hw_params);
 442         if (err < 0)
 443                 return err;
 444
 445         spin_lock_irq(&chip->reg_lock);
 446         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 447                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
 448                              OXYGEN_REC_FORMAT_C_MASK);
 449         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x20);
 450         spin_unlock_irq(&chip->reg_lock);
 451         return 0;
 452 }
 453
 454 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
 455                                   struct snd_pcm_hw_params *hw_params)
 456 {
 457         struct oxygen *chip = snd_pcm_substream_chip(substream);
 458         int err;
 459
 460         err = oxygen_hw_params(substream, hw_params);
 461         if (err < 0)
 462                 return err;
 463
 464         spin_lock_irq(&chip->reg_lock);
 465         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 466                             OXYGEN_SPDIF_OUT_ENABLE);
 467         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 468                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
 469                              OXYGEN_SPDIF_FORMAT_MASK);
 470         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 471                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
 472                               OXYGEN_SPDIF_OUT_RATE_MASK);
 473         oxygen_update_spdif_source(chip);
 474         spin_unlock_irq(&chip->reg_lock);
 475         return 0;
 476 }
 477
 478 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
 479                                     struct snd_pcm_hw_params *hw_params)
 480 {
 481         struct oxygen *chip = snd_pcm_substream_chip(substream);
 482         int err;
 483
 484         err = oxygen_hw_params(substream, hw_params);
 485         if (err < 0)
 486                 return err;
 487
 488         spin_lock_irq(&chip->reg_lock);
 489         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
 490                              oxygen_play_channels(hw_params),
 491                              OXYGEN_PLAY_CHANNELS_MASK);
 492         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 493                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
 494                              OXYGEN_MULTICH_FORMAT_MASK);
 495         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
 496                               oxygen_rate(hw_params) | oxygen_i2s_format(hw_params),
 497                               OXYGEN_I2S_RATE_MASK | OXYGEN_I2S_FORMAT_MASK);
 498         oxygen_clear_bits16(chip, OXYGEN_PLAY_ROUTING, 0x001f);
 499         oxygen_update_dac_routing(chip);
 500         oxygen_update_spdif_source(chip);
 501         spin_unlock_irq(&chip->reg_lock);
 502
 503         mutex_lock(&chip->mutex);
 504         chip->model->set_dac_params(chip, hw_params);
 505         mutex_unlock(&chip->mutex);
 506         return 0;
 507 }
 508
 509 static int oxygen_ac97_hw_params(struct snd_pcm_substream *substream,
 510                                  struct snd_pcm_hw_params *hw_params)
 511 {
 512         struct oxygen *chip = snd_pcm_substream_chip(substream);
 513         int err;
 514
 515         err = oxygen_hw_params(substream, hw_params);
 516         if (err < 0)
 517                 return err;
 518
 519         spin_lock_irq(&chip->reg_lock);
 520         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 521                              oxygen_format(hw_params) << OXYGEN_AC97_FORMAT_SHIFT,
 522                              OXYGEN_AC97_FORMAT_MASK);
 523         spin_unlock_irq(&chip->reg_lock);
 524         return 0;
 525 }
 526
 527 static int oxygen_hw_free(struct snd_pcm_substream *substream)
 528 {
 529         struct oxygen *chip = snd_pcm_substream_chip(substream);
 530         unsigned int channel = oxygen_substream_channel(substream);
 531
 532         spin_lock_irq(&chip->reg_lock);
 533         chip->interrupt_mask &= ~(1 << channel);
 534         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 535         spin_unlock_irq(&chip->reg_lock);
 536
 537         return snd_pcm_lib_free_pages(substream);
 538 }
 539
 540 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
 541 {
 542         struct oxygen *chip = snd_pcm_substream_chip(substream);
 543
 544         spin_lock_irq(&chip->reg_lock);
 545         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 546                             OXYGEN_SPDIF_OUT_ENABLE);
 547         spin_unlock_irq(&chip->reg_lock);
 548         return oxygen_hw_free(substream);
 549 }
 550
 551 static int oxygen_prepare(struct snd_pcm_substream *substream)
 552 {
 553         struct oxygen *chip = snd_pcm_substream_chip(substream);
 554         unsigned int channel = oxygen_substream_channel(substream);
 555         unsigned int channel_mask = 1 << channel;
 556
 557         spin_lock_irq(&chip->reg_lock);
 558         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 559         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 560
 561         chip->interrupt_mask |= channel_mask;
 562         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 563         spin_unlock_irq(&chip->reg_lock);
 564         return 0;
 565 }
 566
 567 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
 568 {
 569         struct oxygen *chip = snd_pcm_substream_chip(substream);
 570         struct snd_pcm_substream *s;
 571         unsigned int mask = 0;
 572         int running;
 573
 574         switch (cmd) {
 575         case SNDRV_PCM_TRIGGER_STOP:
 576         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 577                 running = 0;
 578                 break;
 579         case SNDRV_PCM_TRIGGER_START:
 580         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 581                 running = 1;
 582                 break;
 583         default:
 584                 return -EINVAL;
 585         }
 586
 587         snd_pcm_group_for_each_entry(s, substream) {
 588                 if (snd_pcm_substream_chip(s) == chip) {
 589                         mask |= 1 << oxygen_substream_channel(s);
 590                         snd_pcm_trigger_done(s, substream);
 591                 }
 592         }
 593
 594         spin_lock(&chip->reg_lock);
 595         if (running)
 596                 chip->pcm_running |= mask;
 597         else
 598                 chip->pcm_running &= ~mask;
 599         oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
 600         spin_unlock(&chip->reg_lock);
 601         return 0;
 602 }
 603
 604 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
 605 {
 606         struct oxygen *chip = snd_pcm_substream_chip(substream);
 607         struct snd_pcm_runtime *runtime = substream->runtime;
 608         unsigned int channel = oxygen_substream_channel(substream);
 609         u32 curr_addr;
 610
 611         /* no spinlock, this read should be atomic */
 612         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
 613         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
 614 }
 615
 616 static struct snd_pcm_ops oxygen_rec_a_ops = {
 617         .open      = oxygen_rec_a_open,
 618         .close     = oxygen_close,
 619         .ioctl     = snd_pcm_lib_ioctl,
 620         .hw_params = oxygen_rec_a_hw_params,
 621         .hw_free   = oxygen_hw_free,
 622         .prepare   = oxygen_prepare,
 623         .trigger   = oxygen_trigger,
 624         .pointer   = oxygen_pointer,
 625 };
 626
 627 static struct snd_pcm_ops oxygen_rec_b_ops = {
 628         .open      = oxygen_rec_b_open,
 629         .close     = oxygen_close,
 630         .ioctl     = snd_pcm_lib_ioctl,
 631         .hw_params = oxygen_rec_b_hw_params,
 632         .hw_free   = oxygen_hw_free,
 633         .prepare   = oxygen_prepare,
 634         .trigger   = oxygen_trigger,
 635         .pointer   = oxygen_pointer,
 636 };
 637
 638 static struct snd_pcm_ops oxygen_rec_c_ops = {
 639         .open      = oxygen_rec_c_open,
 640         .close     = oxygen_close,
 641         .ioctl     = snd_pcm_lib_ioctl,
 642         .hw_params = oxygen_rec_c_hw_params,
 643         .hw_free   = oxygen_hw_free,
 644         .prepare   = oxygen_prepare,
 645         .trigger   = oxygen_trigger,
 646         .pointer   = oxygen_pointer,
 647 };
 648
 649 static struct snd_pcm_ops oxygen_spdif_ops = {
 650         .open      = oxygen_spdif_open,
 651         .close     = oxygen_close,
 652         .ioctl     = snd_pcm_lib_ioctl,
 653         .hw_params = oxygen_spdif_hw_params,
 654         .hw_free   = oxygen_spdif_hw_free,
 655         .prepare   = oxygen_prepare,
 656         .trigger   = oxygen_trigger,
 657         .pointer   = oxygen_pointer,
 658 };
 659
 660 static struct snd_pcm_ops oxygen_multich_ops = {
 661         .open      = oxygen_multich_open,
 662         .close     = oxygen_close,
 663         .ioctl     = snd_pcm_lib_ioctl,
 664         .hw_params = oxygen_multich_hw_params,
 665         .hw_free   = oxygen_hw_free,
 666         .prepare   = oxygen_prepare,
 667         .trigger   = oxygen_trigger,
 668         .pointer   = oxygen_pointer,
 669 };
 670
 671 static struct snd_pcm_ops oxygen_ac97_ops = {
 672         .open      = oxygen_ac97_open,
 673         .close     = oxygen_close,
 674         .ioctl     = snd_pcm_lib_ioctl,
 675         .hw_params = oxygen_ac97_hw_params,
 676         .hw_free   = oxygen_hw_free,
 677         .prepare   = oxygen_prepare,
 678         .trigger   = oxygen_trigger,
 679         .pointer   = oxygen_pointer,
 680 };
 681
 682 static void oxygen_pcm_free(struct snd_pcm *pcm)
 683 {
 684         snd_pcm_lib_preallocate_free_for_all(pcm);
 685 }
 686
 687 int __devinit oxygen_pcm_init(struct oxygen *chip)
 688 {
 689         struct snd_pcm *pcm;
 690         int outs, ins;
 691         int err;
 692
 693         outs = 1; /* OXYGEN_CHANNEL_MULTICH is always used */
 694         ins = !!(chip->model->used_channels & (OXYGEN_CHANNEL_A |
 695                                                OXYGEN_CHANNEL_B));
 696         err = snd_pcm_new(chip->card, "Analog", 0, outs, ins, &pcm);
 697         if (err < 0)
 698                 return err;
 699         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &oxygen_multich_ops);
 700         if (chip->model->used_channels & OXYGEN_CHANNEL_A)
 701                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 702                                 &oxygen_rec_a_ops);
 703         else if (chip->model->used_channels & OXYGEN_CHANNEL_B)
 704                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 705                                 &oxygen_rec_b_ops);
 706         pcm->private_data = chip;
 707         pcm->private_free = oxygen_pcm_free;
 708         strcpy(pcm->name, "Analog");
 709         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
 710                                       SNDRV_DMA_TYPE_DEV,
 711                                       snd_dma_pci_data(chip->pci),
 712                                       512 * 1024, 2048 * 1024);
 713         if (ins)
 714                 snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
 715                                               SNDRV_DMA_TYPE_DEV,
 716                                               snd_dma_pci_data(chip->pci),
 717                                               128 * 1024, 256 * 1024);
 718
 719         outs = !!(chip->model->used_channels & OXYGEN_CHANNEL_SPDIF);
 720         ins = !!(chip->model->used_channels & OXYGEN_CHANNEL_C);
 721         if (outs | ins) {
 722                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
 723                 if (err < 0)
 724                         return err;
 725                 if (outs)
 726                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 727                                         &oxygen_spdif_ops);
 728                 if (ins)
 729                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 730                                         &oxygen_rec_c_ops);
 731                 pcm->private_data = chip;
 732                 pcm->private_free = oxygen_pcm_free;
 733                 strcpy(pcm->name, "Digital");
 734                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 735                                                       snd_dma_pci_data(chip->pci),
 736                                                       128 * 1024, 256 * 1024);
 737         }
 738
 739         outs = chip->has_ac97_1 &&
 740                 (chip->model->used_channels & OXYGEN_CHANNEL_AC97);
 741         ins = (chip->model->used_channels & (OXYGEN_CHANNEL_A |
 742                                              OXYGEN_CHANNEL_B))
 743                 == (OXYGEN_CHANNEL_A | OXYGEN_CHANNEL_B);
 744         if (outs | ins) {
 745                 err = snd_pcm_new(chip->card, ins ? "Analog2" : "AC97",
 746                                   2, outs, ins, &pcm);
 747                 if (err < 0)
 748                         return err;
 749                 if (outs)
 750                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 751                                         &oxygen_ac97_ops);
 752                 if (ins)
 753                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 754                                         &oxygen_rec_b_ops);
 755                 pcm->private_data = chip;
 756                 pcm->private_free = oxygen_pcm_free;
 757                 strcpy(pcm->name, ins ? "Analog 2" : "Front Panel");
 758                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 759                                                       snd_dma_pci_data(chip->pci),
 760                                                       128 * 1024, 256 * 1024);
 761         }
 762         return 0;
 763 }