sound/pci/oxygen/oxygen_pcm.c

   1 /*
   2  * C-Media CMI8788 driver - PCM code
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/pci.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include "oxygen.h"
  26
  27 static const struct snd_pcm_hardware oxygen_stereo_hardware = {
  28         .info = SNDRV_PCM_INFO_MMAP |
  29                 SNDRV_PCM_INFO_MMAP_VALID |
  30                 SNDRV_PCM_INFO_INTERLEAVED |
  31                 SNDRV_PCM_INFO_PAUSE |
  32                 SNDRV_PCM_INFO_SYNC_START,
  33         .formats = SNDRV_PCM_FMTBIT_S16_LE |
  34                    SNDRV_PCM_FMTBIT_S32_LE,
  35         .rates = SNDRV_PCM_RATE_32000 |
  36                  SNDRV_PCM_RATE_44100 |
  37                  SNDRV_PCM_RATE_48000 |
  38                  SNDRV_PCM_RATE_64000 |
  39                  SNDRV_PCM_RATE_88200 |
  40                  SNDRV_PCM_RATE_96000 |
  41                  SNDRV_PCM_RATE_176400 |
  42                  SNDRV_PCM_RATE_192000,
  43         .rate_min = 32000,
  44         .rate_max = 192000,
  45         .channels_min = 2,
  46         .channels_max = 2,
  47         .buffer_bytes_max = 256 * 1024,
  48         .period_bytes_min = 128,
  49         .period_bytes_max = 128 * 1024,
  50         .periods_min = 2,
  51         .periods_max = 2048,
  52 };
  53 static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
  54         .info = SNDRV_PCM_INFO_MMAP |
  55                 SNDRV_PCM_INFO_MMAP_VALID |
  56                 SNDRV_PCM_INFO_INTERLEAVED |
  57                 SNDRV_PCM_INFO_PAUSE |
  58                 SNDRV_PCM_INFO_SYNC_START,
  59         .formats = SNDRV_PCM_FMTBIT_S16_LE |
  60                    SNDRV_PCM_FMTBIT_S32_LE,
  61         .rates = SNDRV_PCM_RATE_32000 |
  62                  SNDRV_PCM_RATE_44100 |
  63                  SNDRV_PCM_RATE_48000 |
  64                  SNDRV_PCM_RATE_64000 |
  65                  SNDRV_PCM_RATE_88200 |
  66                  SNDRV_PCM_RATE_96000 |
  67                  SNDRV_PCM_RATE_176400 |
  68                  SNDRV_PCM_RATE_192000,
  69         .rate_min = 32000,
  70         .rate_max = 192000,
  71         .channels_min = 2,
  72         .channels_max = 8,
  73         .buffer_bytes_max = 2048 * 1024,
  74         .period_bytes_min = 128,
  75         .period_bytes_max = 256 * 1024,
  76         .periods_min = 2,
  77         .periods_max = 16384,
  78 };
  79 static const struct snd_pcm_hardware oxygen_ac97_hardware = {
  80         .info = SNDRV_PCM_INFO_MMAP |
  81                 SNDRV_PCM_INFO_MMAP_VALID |
  82                 SNDRV_PCM_INFO_INTERLEAVED |
  83                 SNDRV_PCM_INFO_PAUSE |
  84                 SNDRV_PCM_INFO_SYNC_START,
  85         .formats = SNDRV_PCM_FMTBIT_S16_LE,
  86         .rates = SNDRV_PCM_RATE_48000,
  87         .rate_min = 48000,
  88         .rate_max = 48000,
  89         .channels_min = 2,
  90         .channels_max = 2,
  91         .buffer_bytes_max = 256 * 1024,
  92         .period_bytes_min = 128,
  93         .period_bytes_max = 128 * 1024,
  94         .periods_min = 2,
  95         .periods_max = 2048,
  96 };
  97
  98 static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = {
  99         [PCM_A] = &oxygen_stereo_hardware,
 100         [PCM_B] = &oxygen_stereo_hardware,
 101         [PCM_C] = &oxygen_stereo_hardware,
 102         [PCM_SPDIF] = &oxygen_stereo_hardware,
 103         [PCM_MULTICH] = &oxygen_multichannel_hardware,
 104         [PCM_AC97] = &oxygen_ac97_hardware,
 105 };
 106
 107 static inline unsigned int
 108 oxygen_substream_channel(struct snd_pcm_substream *substream)
 109 {
 110         return (unsigned int)(uintptr_t)substream->runtime->private_data;
 111 }
 112
 113 static int oxygen_open(struct snd_pcm_substream *substream,
 114                        unsigned int channel)
 115 {
 116         struct oxygen *chip = snd_pcm_substream_chip(substream);
 117         struct snd_pcm_runtime *runtime = substream->runtime;
 118         int err;
 119
 120         runtime->private_data = (void *)(uintptr_t)channel;
 121         runtime->hw = *oxygen_hardware[channel];
 122         if (chip->model->pcm_hardware_filter)
 123                 chip->model->pcm_hardware_filter(channel, &runtime->hw);
 124         err = snd_pcm_hw_constraint_step(runtime, 0,
 125                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
 126         if (err < 0)
 127                 return err;
 128         err = snd_pcm_hw_constraint_step(runtime, 0,
 129                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
 130         if (err < 0)
 131                 return err;
 132         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
 133                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 134                 if (err < 0)
 135                         return err;
 136         }
 137         if (runtime->hw.channels_max > 2) {
 138                 err = snd_pcm_hw_constraint_step(runtime, 0,
 139                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
 140                                                  2);
 141                 if (err < 0)
 142                         return err;
 143         }
 144         snd_pcm_set_sync(substream);
 145         chip->streams[channel] = substream;
 146
 147         mutex_lock(&chip->mutex);
 148         chip->pcm_active |= 1 << channel;
 149         if (channel == PCM_SPDIF) {
 150                 chip->spdif_pcm_bits = chip->spdif_bits;
 151                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
 152                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 153                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 154                                SNDRV_CTL_EVENT_MASK_INFO,
 155                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 156         }
 157         mutex_unlock(&chip->mutex);
 158
 159         return 0;
 160 }
 161
 162 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
 163 {
 164         return oxygen_open(substream, PCM_A);
 165 }
 166
 167 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
 168 {
 169         return oxygen_open(substream, PCM_B);
 170 }
 171
 172 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
 173 {
 174         return oxygen_open(substream, PCM_C);
 175 }
 176
 177 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
 178 {
 179         return oxygen_open(substream, PCM_SPDIF);
 180 }
 181
 182 static int oxygen_multich_open(struct snd_pcm_substream *substream)
 183 {
 184         return oxygen_open(substream, PCM_MULTICH);
 185 }
 186
 187 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
 188 {
 189         return oxygen_open(substream, PCM_AC97);
 190 }
 191
 192 static int oxygen_close(struct snd_pcm_substream *substream)
 193 {
 194         struct oxygen *chip = snd_pcm_substream_chip(substream);
 195         unsigned int channel = oxygen_substream_channel(substream);
 196
 197         mutex_lock(&chip->mutex);
 198         chip->pcm_active &= ~(1 << channel);
 199         if (channel == PCM_SPDIF) {
 200                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
 201                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 202                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 203                                SNDRV_CTL_EVENT_MASK_INFO,
 204                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 205         }
 206         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
 207                 oxygen_update_spdif_source(chip);
 208         mutex_unlock(&chip->mutex);
 209
 210         chip->streams[channel] = NULL;
 211         return 0;
 212 }
 213
 214 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
 215 {
 216         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 217                 return OXYGEN_FORMAT_24;
 218         else
 219                 return OXYGEN_FORMAT_16;
 220 }
 221
 222 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
 223 {
 224         switch (params_rate(hw_params)) {
 225         case 32000:
 226                 return OXYGEN_RATE_32000;
 227         case 44100:
 228                 return OXYGEN_RATE_44100;
 229         default: /* 48000 */
 230                 return OXYGEN_RATE_48000;
 231         case 64000:
 232                 return OXYGEN_RATE_64000;
 233         case 88200:
 234                 return OXYGEN_RATE_88200;
 235         case 96000:
 236                 return OXYGEN_RATE_96000;
 237         case 176400:
 238                 return OXYGEN_RATE_176400;
 239         case 192000:
 240                 return OXYGEN_RATE_192000;
 241         }
 242 }
 243
 244 static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params)
 245 {
 246         return params_rate(hw_params) <= 96000
 247                 ? OXYGEN_I2S_MCLK_256 : OXYGEN_I2S_MCLK_128;
 248 }
 249
 250 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
 251 {
 252         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 253                 return OXYGEN_I2S_BITS_24;
 254         else
 255                 return OXYGEN_I2S_BITS_16;
 256 }
 257
 258 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
 259 {
 260         switch (params_channels(hw_params)) {
 261         default: /* 2 */
 262                 return OXYGEN_PLAY_CHANNELS_2;
 263         case 4:
 264                 return OXYGEN_PLAY_CHANNELS_4;
 265         case 6:
 266                 return OXYGEN_PLAY_CHANNELS_6;
 267         case 8:
 268                 return OXYGEN_PLAY_CHANNELS_8;
 269         }
 270 }
 271
 272 static const unsigned int channel_base_registers[PCM_COUNT] = {
 273         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
 274         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
 275         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
 276         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
 277         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
 278         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
 279 };
 280
 281 static int oxygen_hw_params(struct snd_pcm_substream *substream,
 282                             struct snd_pcm_hw_params *hw_params)
 283 {
 284         struct oxygen *chip = snd_pcm_substream_chip(substream);
 285         unsigned int channel = oxygen_substream_channel(substream);
 286         int err;
 287
 288         err = snd_pcm_lib_malloc_pages(substream,
 289                                        params_buffer_bytes(hw_params));
 290         if (err < 0)
 291                 return err;
 292
 293         oxygen_write32(chip, channel_base_registers[channel],
 294                        (u32)substream->runtime->dma_addr);
 295         if (channel == PCM_MULTICH) {
 296                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
 297                                params_buffer_bytes(hw_params) / 4 - 1);
 298                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
 299                                params_period_bytes(hw_params) / 4 - 1);
 300         } else {
 301                 oxygen_write16(chip, channel_base_registers[channel] + 4,
 302                                params_buffer_bytes(hw_params) / 4 - 1);
 303                 oxygen_write16(chip, channel_base_registers[channel] + 6,
 304                                params_period_bytes(hw_params) / 4 - 1);
 305         }
 306         return 0;
 307 }
 308
 309 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
 310                                   struct snd_pcm_hw_params *hw_params)
 311 {
 312         struct oxygen *chip = snd_pcm_substream_chip(substream);
 313         int err;
 314
 315         err = oxygen_hw_params(substream, hw_params);
 316         if (err < 0)
 317                 return err;
 318
 319         spin_lock_irq(&chip->reg_lock);
 320         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 321                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
 322                              OXYGEN_REC_FORMAT_A_MASK);
 323         oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
 324                               oxygen_rate(hw_params) |
 325                               oxygen_i2s_mclk(hw_params) |
 326                               chip->model->adc_i2s_format |
 327                               oxygen_i2s_bits(hw_params),
 328                               OXYGEN_I2S_RATE_MASK |
 329                               OXYGEN_I2S_FORMAT_MASK |
 330                               OXYGEN_I2S_MCLK_MASK |
 331                               OXYGEN_I2S_BITS_MASK);
 332         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
 333                              OXYGEN_REC_A_ROUTE_I2S_ADC_1,
 334                              OXYGEN_REC_A_ROUTE_MASK);
 335         spin_unlock_irq(&chip->reg_lock);
 336
 337         mutex_lock(&chip->mutex);
 338         chip->model->set_adc_params(chip, hw_params);
 339         mutex_unlock(&chip->mutex);
 340         return 0;
 341 }
 342
 343 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
 344                                   struct snd_pcm_hw_params *hw_params)
 345 {
 346         struct oxygen *chip = snd_pcm_substream_chip(substream);
 347         int err;
 348
 349         err = oxygen_hw_params(substream, hw_params);
 350         if (err < 0)
 351                 return err;
 352
 353         spin_lock_irq(&chip->reg_lock);
 354         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 355                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
 356                              OXYGEN_REC_FORMAT_B_MASK);
 357         oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
 358                               oxygen_rate(hw_params) |
 359                               oxygen_i2s_mclk(hw_params) |
 360                               chip->model->adc_i2s_format |
 361                               oxygen_i2s_bits(hw_params),
 362                               OXYGEN_I2S_RATE_MASK |
 363                               OXYGEN_I2S_FORMAT_MASK |
 364                               OXYGEN_I2S_MCLK_MASK |
 365                               OXYGEN_I2S_BITS_MASK);
 366         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
 367                              OXYGEN_REC_B_ROUTE_I2S_ADC_2,
 368                              OXYGEN_REC_B_ROUTE_MASK);
 369         spin_unlock_irq(&chip->reg_lock);
 370
 371         mutex_lock(&chip->mutex);
 372         chip->model->set_adc_params(chip, hw_params);
 373         mutex_unlock(&chip->mutex);
 374         return 0;
 375 }
 376
 377 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
 378                                   struct snd_pcm_hw_params *hw_params)
 379 {
 380         struct oxygen *chip = snd_pcm_substream_chip(substream);
 381         int err;
 382
 383         err = oxygen_hw_params(substream, hw_params);
 384         if (err < 0)
 385                 return err;
 386
 387         spin_lock_irq(&chip->reg_lock);
 388         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 389                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
 390                              OXYGEN_REC_FORMAT_C_MASK);
 391         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
 392                              OXYGEN_REC_C_ROUTE_SPDIF,
 393                              OXYGEN_REC_C_ROUTE_MASK);
 394         spin_unlock_irq(&chip->reg_lock);
 395         return 0;
 396 }
 397
 398 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
 399                                   struct snd_pcm_hw_params *hw_params)
 400 {
 401         struct oxygen *chip = snd_pcm_substream_chip(substream);
 402         int err;
 403
 404         err = oxygen_hw_params(substream, hw_params);
 405         if (err < 0)
 406                 return err;
 407
 408         spin_lock_irq(&chip->reg_lock);
 409         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 410                             OXYGEN_SPDIF_OUT_ENABLE);
 411         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 412                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
 413                              OXYGEN_SPDIF_FORMAT_MASK);
 414         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 415                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
 416                               OXYGEN_SPDIF_OUT_RATE_MASK);
 417         oxygen_update_spdif_source(chip);
 418         spin_unlock_irq(&chip->reg_lock);
 419         return 0;
 420 }
 421
 422 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
 423                                     struct snd_pcm_hw_params *hw_params)
 424 {
 425         struct oxygen *chip = snd_pcm_substream_chip(substream);
 426         int err;
 427
 428         err = oxygen_hw_params(substream, hw_params);
 429         if (err < 0)
 430                 return err;
 431
 432         spin_lock_irq(&chip->reg_lock);
 433         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
 434                              oxygen_play_channels(hw_params),
 435                              OXYGEN_PLAY_CHANNELS_MASK);
 436         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 437                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
 438                              OXYGEN_MULTICH_FORMAT_MASK);
 439         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
 440                               oxygen_rate(hw_params) |
 441                               chip->model->dac_i2s_format |
 442                               oxygen_i2s_bits(hw_params),
 443                               OXYGEN_I2S_RATE_MASK |
 444                               OXYGEN_I2S_FORMAT_MASK |
 445                               OXYGEN_I2S_BITS_MASK);
 446         oxygen_write16_masked(chip, OXYGEN_PLAY_ROUTING,
 447                               OXYGEN_PLAY_MULTICH_I2S_DAC,
 448                               OXYGEN_PLAY_MUTE01 | OXYGEN_PLAY_MUTE23 |
 449                               OXYGEN_PLAY_MUTE45 | OXYGEN_PLAY_MUTE67 |
 450                               OXYGEN_PLAY_MULTICH_MASK);
 451         oxygen_update_dac_routing(chip);
 452         oxygen_update_spdif_source(chip);
 453         spin_unlock_irq(&chip->reg_lock);
 454
 455         mutex_lock(&chip->mutex);
 456         chip->model->set_dac_params(chip, hw_params);
 457         mutex_unlock(&chip->mutex);
 458         return 0;
 459 }
 460
 461 static int oxygen_hw_free(struct snd_pcm_substream *substream)
 462 {
 463         struct oxygen *chip = snd_pcm_substream_chip(substream);
 464         unsigned int channel = oxygen_substream_channel(substream);
 465
 466         spin_lock_irq(&chip->reg_lock);
 467         chip->interrupt_mask &= ~(1 << channel);
 468         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 469         spin_unlock_irq(&chip->reg_lock);
 470
 471         return snd_pcm_lib_free_pages(substream);
 472 }
 473
 474 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
 475 {
 476         struct oxygen *chip = snd_pcm_substream_chip(substream);
 477
 478         spin_lock_irq(&chip->reg_lock);
 479         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 480                             OXYGEN_SPDIF_OUT_ENABLE);
 481         spin_unlock_irq(&chip->reg_lock);
 482         return oxygen_hw_free(substream);
 483 }
 484
 485 static int oxygen_prepare(struct snd_pcm_substream *substream)
 486 {
 487         struct oxygen *chip = snd_pcm_substream_chip(substream);
 488         unsigned int channel = oxygen_substream_channel(substream);
 489         unsigned int channel_mask = 1 << channel;
 490
 491         spin_lock_irq(&chip->reg_lock);
 492         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 493         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 494
 495         chip->interrupt_mask |= channel_mask;
 496         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 497         spin_unlock_irq(&chip->reg_lock);
 498         return 0;
 499 }
 500
 501 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
 502 {
 503         struct oxygen *chip = snd_pcm_substream_chip(substream);
 504         struct snd_pcm_substream *s;
 505         unsigned int mask = 0;
 506         int pausing;
 507
 508         switch (cmd) {
 509         case SNDRV_PCM_TRIGGER_STOP:
 510         case SNDRV_PCM_TRIGGER_START:
 511                 pausing = 0;
 512                 break;
 513         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 514         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 515                 pausing = 1;
 516                 break;
 517         default:
 518                 return -EINVAL;
 519         }
 520
 521         snd_pcm_group_for_each_entry(s, substream) {
 522                 if (snd_pcm_substream_chip(s) == chip) {
 523                         mask |= 1 << oxygen_substream_channel(s);
 524                         snd_pcm_trigger_done(s, substream);
 525                 }
 526         }
 527
 528         spin_lock(&chip->reg_lock);
 529         if (!pausing) {
 530                 if (cmd == SNDRV_PCM_TRIGGER_START)
 531                         chip->pcm_running |= mask;
 532                 else
 533                         chip->pcm_running &= ~mask;
 534                 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
 535         } else {
 536                 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
 537                         oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask);
 538                 else
 539                         oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
 540         }
 541         spin_unlock(&chip->reg_lock);
 542         return 0;
 543 }
 544
 545 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
 546 {
 547         struct oxygen *chip = snd_pcm_substream_chip(substream);
 548         struct snd_pcm_runtime *runtime = substream->runtime;
 549         unsigned int channel = oxygen_substream_channel(substream);
 550         u32 curr_addr;
 551
 552         /* no spinlock, this read should be atomic */
 553         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
 554         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
 555 }
 556
 557 static struct snd_pcm_ops oxygen_rec_a_ops = {
 558         .open      = oxygen_rec_a_open,
 559         .close     = oxygen_close,
 560         .ioctl     = snd_pcm_lib_ioctl,
 561         .hw_params = oxygen_rec_a_hw_params,
 562         .hw_free   = oxygen_hw_free,
 563         .prepare   = oxygen_prepare,
 564         .trigger   = oxygen_trigger,
 565         .pointer   = oxygen_pointer,
 566 };
 567
 568 static struct snd_pcm_ops oxygen_rec_b_ops = {
 569         .open      = oxygen_rec_b_open,
 570         .close     = oxygen_close,
 571         .ioctl     = snd_pcm_lib_ioctl,
 572         .hw_params = oxygen_rec_b_hw_params,
 573         .hw_free   = oxygen_hw_free,
 574         .prepare   = oxygen_prepare,
 575         .trigger   = oxygen_trigger,
 576         .pointer   = oxygen_pointer,
 577 };
 578
 579 static struct snd_pcm_ops oxygen_rec_c_ops = {
 580         .open      = oxygen_rec_c_open,
 581         .close     = oxygen_close,
 582         .ioctl     = snd_pcm_lib_ioctl,
 583         .hw_params = oxygen_rec_c_hw_params,
 584         .hw_free   = oxygen_hw_free,
 585         .prepare   = oxygen_prepare,
 586         .trigger   = oxygen_trigger,
 587         .pointer   = oxygen_pointer,
 588 };
 589
 590 static struct snd_pcm_ops oxygen_spdif_ops = {
 591         .open      = oxygen_spdif_open,
 592         .close     = oxygen_close,
 593         .ioctl     = snd_pcm_lib_ioctl,
 594         .hw_params = oxygen_spdif_hw_params,
 595         .hw_free   = oxygen_spdif_hw_free,
 596         .prepare   = oxygen_prepare,
 597         .trigger   = oxygen_trigger,
 598         .pointer   = oxygen_pointer,
 599 };
 600
 601 static struct snd_pcm_ops oxygen_multich_ops = {
 602         .open      = oxygen_multich_open,
 603         .close     = oxygen_close,
 604         .ioctl     = snd_pcm_lib_ioctl,
 605         .hw_params = oxygen_multich_hw_params,
 606         .hw_free   = oxygen_hw_free,
 607         .prepare   = oxygen_prepare,
 608         .trigger   = oxygen_trigger,
 609         .pointer   = oxygen_pointer,
 610 };
 611
 612 static struct snd_pcm_ops oxygen_ac97_ops = {
 613         .open      = oxygen_ac97_open,
 614         .close     = oxygen_close,
 615         .ioctl     = snd_pcm_lib_ioctl,
 616         .hw_params = oxygen_hw_params,
 617         .hw_free   = oxygen_hw_free,
 618         .prepare   = oxygen_prepare,
 619         .trigger   = oxygen_trigger,
 620         .pointer   = oxygen_pointer,
 621 };
 622
 623 static void oxygen_pcm_free(struct snd_pcm *pcm)
 624 {
 625         snd_pcm_lib_preallocate_free_for_all(pcm);
 626 }
 627
 628 int __devinit oxygen_pcm_init(struct oxygen *chip)
 629 {
 630         struct snd_pcm *pcm;
 631         int outs, ins;
 632         int err;
 633
 634         outs = 1; /* OXYGEN_CHANNEL_MULTICH is always used */
 635         ins = !!(chip->model->used_channels & (OXYGEN_CHANNEL_A |
 636                                                OXYGEN_CHANNEL_B));
 637         err = snd_pcm_new(chip->card, "Analog", 0, outs, ins, &pcm);
 638         if (err < 0)
 639                 return err;
 640         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &oxygen_multich_ops);
 641         if (chip->model->used_channels & OXYGEN_CHANNEL_A)
 642                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 643                                 &oxygen_rec_a_ops);
 644         else if (chip->model->used_channels & OXYGEN_CHANNEL_B)
 645                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 646                                 &oxygen_rec_b_ops);
 647         pcm->private_data = chip;
 648         pcm->private_free = oxygen_pcm_free;
 649         strcpy(pcm->name, "Analog");
 650         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
 651                                       SNDRV_DMA_TYPE_DEV,
 652                                       snd_dma_pci_data(chip->pci),
 653                                       512 * 1024, 2048 * 1024);
 654         if (ins)
 655                 snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
 656                                               SNDRV_DMA_TYPE_DEV,
 657                                               snd_dma_pci_data(chip->pci),
 658                                               128 * 1024, 256 * 1024);
 659
 660         outs = !!(chip->model->used_channels & OXYGEN_CHANNEL_SPDIF);
 661         ins = !!(chip->model->used_channels & OXYGEN_CHANNEL_C);
 662         if (outs | ins) {
 663                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
 664                 if (err < 0)
 665                         return err;
 666                 if (outs)
 667                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 668                                         &oxygen_spdif_ops);
 669                 if (ins)
 670                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 671                                         &oxygen_rec_c_ops);
 672                 pcm->private_data = chip;
 673                 pcm->private_free = oxygen_pcm_free;
 674                 strcpy(pcm->name, "Digital");
 675                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 676                                                       snd_dma_pci_data(chip->pci),
 677                                                       128 * 1024, 256 * 1024);
 678         }
 679
 680         outs = chip->has_ac97_1 &&
 681                 (chip->model->used_channels & OXYGEN_CHANNEL_AC97);
 682         ins = (chip->model->used_channels & (OXYGEN_CHANNEL_A |
 683                                              OXYGEN_CHANNEL_B))
 684                 == (OXYGEN_CHANNEL_A | OXYGEN_CHANNEL_B);
 685         if (outs | ins) {
 686                 err = snd_pcm_new(chip->card, ins ? "Analog2" : "AC97",
 687                                   2, outs, ins, &pcm);
 688                 if (err < 0)
 689                         return err;
 690                 if (outs)
 691                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 692                                         &oxygen_ac97_ops);
 693                 if (ins)
 694                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 695                                         &oxygen_rec_b_ops);
 696                 pcm->private_data = chip;
 697                 pcm->private_free = oxygen_pcm_free;
 698                 strcpy(pcm->name, ins ? "Analog 2" : "Front Panel");
 699                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 700                                                       snd_dma_pci_data(chip->pci),
 701                                                       128 * 1024, 256 * 1024);
 702         }
 703         return 0;
 704 }