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1 /*
2  * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
3  *
4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5  *
6  *
7  *  This driver is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License, version 2.
9  *
10  *  This driver is distributed in the hope that it will be useful,
11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  *  GNU General Public License for more details.
14  *
15  *  You should have received a copy of the GNU General Public License
16  *  along with this driver; if not, write to the Free Software
17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18  */
19
20 /*
21  * SPI 0 -> 1st AK4396 (front)
22  * SPI 1 -> 2nd AK4396 (surround)
23  * SPI 2 -> 3rd AK4396 (center/LFE)
24  * SPI 3 -> WM8785
25  * SPI 4 -> 4th AK4396 (back)
26  *
27  * GPIO 0 -> DFS0 of AK5385
28  * GPIO 1 -> DFS1 of AK5385
29  */
30
31 #include <linux/pci.h>
32 #include <sound/control.h>
33 #include <sound/core.h>
34 #include <sound/initval.h>
35 #include <sound/pcm.h>
36 #include <sound/pcm_params.h>
37 #include <sound/tlv.h>
38 #include "oxygen.h"
39 #include "ak4396.h"
40
41 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
42 MODULE_DESCRIPTION("C-Media CMI8788 driver");
43 MODULE_LICENSE("GPL");
44 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
45
46 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
47 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
48 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
49
50 module_param_array(index, int, NULL, 0444);
51 MODULE_PARM_DESC(index, "card index");
52 module_param_array(id, charp, NULL, 0444);
53 MODULE_PARM_DESC(id, "ID string");
54 module_param_array(enable, bool, NULL, 0444);
55 MODULE_PARM_DESC(enable, "enable card");
56
57 static struct pci_device_id oxygen_ids[] __devinitdata = {
58         { OXYGEN_PCI_SUBID(0x10b0, 0x0216) },
59         { OXYGEN_PCI_SUBID(0x10b0, 0x0218) },
60         { OXYGEN_PCI_SUBID(0x10b0, 0x0219) },
61         { OXYGEN_PCI_SUBID(0x13f6, 0x0001) },
62         { OXYGEN_PCI_SUBID(0x13f6, 0x0010) },
63         { OXYGEN_PCI_SUBID(0x13f6, 0x8788) },
64         { OXYGEN_PCI_SUBID(0x147a, 0xa017) },
65         { OXYGEN_PCI_SUBID(0x1a58, 0x0910) },
66         { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = 1 },
67         { OXYGEN_PCI_SUBID(0x7284, 0x9761) },
68         { }
69 };
70 MODULE_DEVICE_TABLE(pci, oxygen_ids);
71
72
73 #define GPIO_AK5385_DFS_MASK    0x0003
74 #define GPIO_AK5385_DFS_NORMAL  0x0000
75 #define GPIO_AK5385_DFS_DOUBLE  0x0001
76 #define GPIO_AK5385_DFS_QUAD    0x0002
77
78 #define WM8785_R0       0
79 #define WM8785_R1       1
80 #define WM8785_R2       2
81 #define WM8785_R7       7
82
83 /* R0 */
84 #define WM8785_MCR_MASK         0x007
85 #define WM8785_MCR_SLAVE        0x000
86 #define WM8785_MCR_MASTER_128   0x001
87 #define WM8785_MCR_MASTER_192   0x002
88 #define WM8785_MCR_MASTER_256   0x003
89 #define WM8785_MCR_MASTER_384   0x004
90 #define WM8785_MCR_MASTER_512   0x005
91 #define WM8785_MCR_MASTER_768   0x006
92 #define WM8785_OSR_MASK         0x018
93 #define WM8785_OSR_SINGLE       0x000
94 #define WM8785_OSR_DOUBLE       0x008
95 #define WM8785_OSR_QUAD         0x010
96 #define WM8785_FORMAT_MASK      0x060
97 #define WM8785_FORMAT_RJUST     0x000
98 #define WM8785_FORMAT_LJUST     0x020
99 #define WM8785_FORMAT_I2S       0x040
100 #define WM8785_FORMAT_DSP       0x060
101 /* R1 */
102 #define WM8785_WL_MASK          0x003
103 #define WM8785_WL_16            0x000
104 #define WM8785_WL_20            0x001
105 #define WM8785_WL_24            0x002
106 #define WM8785_WL_32            0x003
107 #define WM8785_LRP              0x004
108 #define WM8785_BCLKINV          0x008
109 #define WM8785_LRSWAP           0x010
110 #define WM8785_DEVNO_MASK       0x0e0
111 /* R2 */
112 #define WM8785_HPFR             0x001
113 #define WM8785_HPFL             0x002
114 #define WM8785_SDODIS           0x004
115 #define WM8785_PWRDNR           0x008
116 #define WM8785_PWRDNL           0x010
117 #define WM8785_TDM_MASK         0x1c0
118
119 struct generic_data {
120         u8 ak4396_ctl2;
121 };
122
123 static void ak4396_write(struct oxygen *chip, unsigned int codec,
124                          u8 reg, u8 value)
125 {
126         /* maps ALSA channel pair number to SPI output */
127         static const u8 codec_spi_map[4] = {
128                 0, 1, 2, 4
129         };
130         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
131                          OXYGEN_SPI_DATA_LENGTH_2 |
132                          OXYGEN_SPI_CLOCK_320 |
133                          (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
134                          OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
135                          AK4396_WRITE | (reg << 8) | value);
136 }
137
138 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
139 {
140         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
141                          OXYGEN_SPI_DATA_LENGTH_2 |
142                          OXYGEN_SPI_CLOCK_320 |
143                          (3 << OXYGEN_SPI_CODEC_SHIFT) |
144                          OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
145                          (reg << 9) | value);
146 }
147
148 static void ak4396_init(struct oxygen *chip)
149 {
150         struct generic_data *data = chip->model_data;
151         unsigned int i;
152
153         data->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
154         for (i = 0; i < 4; ++i) {
155                 ak4396_write(chip, i,
156                              AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
157                 ak4396_write(chip, i,
158                              AK4396_CONTROL_2, data->ak4396_ctl2);
159                 ak4396_write(chip, i,
160                              AK4396_CONTROL_3, AK4396_PCM);
161                 ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
162                 ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
163         }
164         snd_component_add(chip->card, "AK4396");
165 }
166
167 static void ak5385_init(struct oxygen *chip)
168 {
169         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
170         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
171         snd_component_add(chip->card, "AK5385");
172 }
173
174 static void wm8785_init(struct oxygen *chip)
175 {
176         wm8785_write(chip, WM8785_R7, 0);
177         wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
178                      WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
179         wm8785_write(chip, WM8785_R1, WM8785_WL_24);
180         snd_component_add(chip->card, "WM8785");
181 }
182
183 static void generic_init(struct oxygen *chip)
184 {
185         ak4396_init(chip);
186         wm8785_init(chip);
187 }
188
189 static void meridian_init(struct oxygen *chip)
190 {
191         ak4396_init(chip);
192         ak5385_init(chip);
193 }
194
195 static void generic_cleanup(struct oxygen *chip)
196 {
197 }
198
199 static void set_ak4396_params(struct oxygen *chip,
200                               struct snd_pcm_hw_params *params)
201 {
202         struct generic_data *data = chip->model_data;
203         unsigned int i;
204         u8 value;
205
206         value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
207         if (params_rate(params) <= 54000)
208                 value |= AK4396_DFS_NORMAL;
209         else if (params_rate(params) < 120000)
210                 value |= AK4396_DFS_DOUBLE;
211         else
212                 value |= AK4396_DFS_QUAD;
213         data->ak4396_ctl2 = value;
214         for (i = 0; i < 4; ++i) {
215                 ak4396_write(chip, i,
216                              AK4396_CONTROL_1, AK4396_DIF_24_MSB);
217                 ak4396_write(chip, i,
218                              AK4396_CONTROL_2, value);
219                 ak4396_write(chip, i,
220                              AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
221         }
222 }
223
224 static void update_ak4396_volume(struct oxygen *chip)
225 {
226         unsigned int i;
227
228         for (i = 0; i < 4; ++i) {
229                 ak4396_write(chip, i,
230                              AK4396_LCH_ATT, chip->dac_volume[i * 2]);
231                 ak4396_write(chip, i,
232                              AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
233         }
234 }
235
236 static void update_ak4396_mute(struct oxygen *chip)
237 {
238         struct generic_data *data = chip->model_data;
239         unsigned int i;
240         u8 value;
241
242         value = data->ak4396_ctl2 & ~AK4396_SMUTE;
243         if (chip->dac_mute)
244                 value |= AK4396_SMUTE;
245         data->ak4396_ctl2 = value;
246         for (i = 0; i < 4; ++i)
247                 ak4396_write(chip, i, AK4396_CONTROL_2, value);
248 }
249
250 static void set_wm8785_params(struct oxygen *chip,
251                               struct snd_pcm_hw_params *params)
252 {
253         unsigned int value;
254
255         wm8785_write(chip, WM8785_R7, 0);
256
257         value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
258         if (params_rate(params) <= 48000)
259                 value |= WM8785_OSR_SINGLE;
260         else if (params_rate(params) <= 96000)
261                 value |= WM8785_OSR_DOUBLE;
262         else
263                 value |= WM8785_OSR_QUAD;
264         wm8785_write(chip, WM8785_R0, value);
265
266         if (snd_pcm_format_width(params_format(params)) <= 16)
267                 value = WM8785_WL_16;
268         else
269                 value = WM8785_WL_24;
270         wm8785_write(chip, WM8785_R1, value);
271 }
272
273 static void set_ak5385_params(struct oxygen *chip,
274                               struct snd_pcm_hw_params *params)
275 {
276         unsigned int value;
277
278         if (params_rate(params) <= 54000)
279                 value = GPIO_AK5385_DFS_NORMAL;
280         else if (params_rate(params) <= 108000)
281                 value = GPIO_AK5385_DFS_DOUBLE;
282         else
283                 value = GPIO_AK5385_DFS_QUAD;
284         oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
285                               value, GPIO_AK5385_DFS_MASK);
286 }
287
288 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
289
290 static int ak4396_control_filter(struct snd_kcontrol_new *template)
291 {
292         if (!strcmp(template->name, "Master Playback Volume")) {
293                 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
294                 template->tlv.p = ak4396_db_scale;
295         }
296         return 0;
297 }
298
299 static const struct oxygen_model model_generic = {
300         .shortname = "C-Media CMI8788",
301         .longname = "C-Media Oxygen HD Audio",
302         .chip = "CMI8788",
303         .owner = THIS_MODULE,
304         .init = generic_init,
305         .control_filter = ak4396_control_filter,
306         .cleanup = generic_cleanup,
307         .set_dac_params = set_ak4396_params,
308         .set_adc_params = set_wm8785_params,
309         .update_dac_volume = update_ak4396_volume,
310         .update_dac_mute = update_ak4396_mute,
311         .model_data_size = sizeof(struct generic_data),
312         .dac_channels = 8,
313         .used_channels = OXYGEN_CHANNEL_A |
314                          OXYGEN_CHANNEL_C |
315                          OXYGEN_CHANNEL_SPDIF |
316                          OXYGEN_CHANNEL_MULTICH |
317                          OXYGEN_CHANNEL_AC97,
318         .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
319         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
320         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
321 };
322 static const struct oxygen_model model_meridian = {
323         .shortname = "C-Media CMI8788",
324         .longname = "C-Media Oxygen HD Audio",
325         .chip = "CMI8788",
326         .owner = THIS_MODULE,
327         .init = meridian_init,
328         .control_filter = ak4396_control_filter,
329         .cleanup = generic_cleanup,
330         .set_dac_params = set_ak4396_params,
331         .set_adc_params = set_ak5385_params,
332         .update_dac_volume = update_ak4396_volume,
333         .update_dac_mute = update_ak4396_mute,
334         .model_data_size = sizeof(struct generic_data),
335         .dac_channels = 8,
336         .used_channels = OXYGEN_CHANNEL_B |
337                          OXYGEN_CHANNEL_C |
338                          OXYGEN_CHANNEL_SPDIF |
339                          OXYGEN_CHANNEL_MULTICH |
340                          OXYGEN_CHANNEL_AC97,
341         .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
342         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
343         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
344 };
345
346 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
347                                           const struct pci_device_id *pci_id)
348 {
349         static int dev;
350         int is_meridian;
351         int err;
352
353         if (dev >= SNDRV_CARDS)
354                 return -ENODEV;
355         if (!enable[dev]) {
356                 ++dev;
357                 return -ENOENT;
358         }
359         is_meridian = pci_id->driver_data;
360         err = oxygen_pci_probe(pci, index[dev], id[dev], is_meridian,
361                                is_meridian ? &model_meridian : &model_generic);
362         if (err >= 0)
363                 ++dev;
364         return err;
365 }
366
367 static struct pci_driver oxygen_driver = {
368         .name = "CMI8788",
369         .id_table = oxygen_ids,
370         .probe = generic_oxygen_probe,
371         .remove = __devexit_p(oxygen_pci_remove),
372 };
373
374 static int __init alsa_card_oxygen_init(void)
375 {
376         return pci_register_driver(&oxygen_driver);
377 }
378
379 static void __exit alsa_card_oxygen_exit(void)
380 {
381         pci_unregister_driver(&oxygen_driver);
382 }
383
384 module_init(alsa_card_oxygen_init)
385 module_exit(alsa_card_oxygen_exit)