sound/pci/oxygen/oxygen.c

   1 /*
   2  * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 /*
  21  * SPI 0 -> 1st AK4396 (front)
  22  * SPI 1 -> 2nd AK4396 (surround)
  23  * SPI 2 -> 3rd AK4396 (center/LFE)
  24  * SPI 3 -> WM8785
  25  * SPI 4 -> 4th AK4396 (back)
  26  *
  27  * GPIO 0 -> DFS0 of AK5385
  28  * GPIO 1 -> DFS1 of AK5385
  29  */
  30
  31 #include <linux/pci.h>
  32 #include <sound/control.h>
  33 #include <sound/core.h>
  34 #include <sound/initval.h>
  35 #include <sound/pcm.h>
  36 #include <sound/pcm_params.h>
  37 #include <sound/tlv.h>
  38 #include "oxygen.h"
  39
  40 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  41 MODULE_DESCRIPTION("C-Media CMI8788 driver");
  42 MODULE_LICENSE("GPL");
  43 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
  44
  45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  46 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  47 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  48
  49 module_param_array(index, int, NULL, 0444);
  50 MODULE_PARM_DESC(index, "card index");
  51 module_param_array(id, charp, NULL, 0444);
  52 MODULE_PARM_DESC(id, "ID string");
  53 module_param_array(enable, bool, NULL, 0444);
  54 MODULE_PARM_DESC(enable, "enable card");
  55
  56 static struct pci_device_id oxygen_ids[] __devinitdata = {
  57         { OXYGEN_PCI_SUBID(0x10b0, 0x0216) },
  58         { OXYGEN_PCI_SUBID(0x10b0, 0x0218) },
  59         { OXYGEN_PCI_SUBID(0x10b0, 0x0219) },
  60         { OXYGEN_PCI_SUBID(0x13f6, 0x0001) },
  61         { OXYGEN_PCI_SUBID(0x13f6, 0x0010) },
  62         { OXYGEN_PCI_SUBID(0x13f6, 0x8788) },
  63         { OXYGEN_PCI_SUBID(0x147a, 0xa017) },
  64         { OXYGEN_PCI_SUBID(0x14c3, 0x1710) },
  65         { OXYGEN_PCI_SUBID(0x14c3, 0x1711) },
  66         { OXYGEN_PCI_SUBID(0x1a58, 0x0910) },
  67         { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = 1 },
  68         { OXYGEN_PCI_SUBID(0x7284, 0x9761) },
  69         { }
  70 };
  71 MODULE_DEVICE_TABLE(pci, oxygen_ids);
  72
  73
  74 #define GPIO_AK5385_DFS_MASK    0x0003
  75 #define GPIO_AK5385_DFS_NORMAL  0x0000
  76 #define GPIO_AK5385_DFS_DOUBLE  0x0001
  77 #define GPIO_AK5385_DFS_QUAD    0x0002
  78
  79 #define AK4396_WRITE    0x2000
  80
  81 #define AK4396_CONTROL_1        0
  82 #define AK4396_CONTROL_2        1
  83 #define AK4396_CONTROL_3        2
  84 #define AK4396_LCH_ATT          3
  85 #define AK4396_RCH_ATT          4
  86
  87 /* control 1 */
  88 #define AK4396_RSTN             0x01
  89 #define AK4396_DIF_MASK         0x0e
  90 #define AK4396_DIF_16_LSB       0x00
  91 #define AK4396_DIF_20_LSB       0x02
  92 #define AK4396_DIF_24_MSB       0x04
  93 #define AK4396_DIF_24_I2S       0x06
  94 #define AK4396_DIF_24_LSB       0x08
  95 #define AK4396_ACKS             0x80
  96 /* control 2 */
  97 #define AK4396_SMUTE            0x01
  98 #define AK4396_DEM_MASK         0x06
  99 #define AK4396_DEM_441          0x00
 100 #define AK4396_DEM_OFF          0x02
 101 #define AK4396_DEM_48           0x04
 102 #define AK4396_DEM_32           0x06
 103 #define AK4396_DFS_MASK         0x18
 104 #define AK4396_DFS_NORMAL       0x00
 105 #define AK4396_DFS_DOUBLE       0x08
 106 #define AK4396_DFS_QUAD         0x10
 107 #define AK4396_SLOW             0x20
 108 #define AK4396_DZFM             0x40
 109 #define AK4396_DZFE             0x80
 110 /* control 3 */
 111 #define AK4396_DZFB             0x04
 112 #define AK4396_DCKB             0x10
 113 #define AK4396_DCKS             0x20
 114 #define AK4396_DSDM             0x40
 115 #define AK4396_D_P_MASK         0x80
 116 #define AK4396_PCM              0x00
 117 #define AK4396_DSD              0x80
 118
 119 #define WM8785_R0       0
 120 #define WM8785_R1       1
 121 #define WM8785_R2       2
 122 #define WM8785_R7       7
 123
 124 /* R0 */
 125 #define WM8785_MCR_MASK         0x007
 126 #define WM8785_MCR_SLAVE        0x000
 127 #define WM8785_MCR_MASTER_128   0x001
 128 #define WM8785_MCR_MASTER_192   0x002
 129 #define WM8785_MCR_MASTER_256   0x003
 130 #define WM8785_MCR_MASTER_384   0x004
 131 #define WM8785_MCR_MASTER_512   0x005
 132 #define WM8785_MCR_MASTER_768   0x006
 133 #define WM8785_OSR_MASK         0x018
 134 #define WM8785_OSR_SINGLE       0x000
 135 #define WM8785_OSR_DOUBLE       0x008
 136 #define WM8785_OSR_QUAD         0x010
 137 #define WM8785_FORMAT_MASK      0x060
 138 #define WM8785_FORMAT_RJUST     0x000
 139 #define WM8785_FORMAT_LJUST     0x020
 140 #define WM8785_FORMAT_I2S       0x040
 141 #define WM8785_FORMAT_DSP       0x060
 142 /* R1 */
 143 #define WM8785_WL_MASK          0x003
 144 #define WM8785_WL_16            0x000
 145 #define WM8785_WL_20            0x001
 146 #define WM8785_WL_24            0x002
 147 #define WM8785_WL_32            0x003
 148 #define WM8785_LRP              0x004
 149 #define WM8785_BCLKINV          0x008
 150 #define WM8785_LRSWAP           0x010
 151 #define WM8785_DEVNO_MASK       0x0e0
 152 /* R2 */
 153 #define WM8785_HPFR             0x001
 154 #define WM8785_HPFL             0x002
 155 #define WM8785_SDODIS           0x004
 156 #define WM8785_PWRDNR           0x008
 157 #define WM8785_PWRDNL           0x010
 158 #define WM8785_TDM_MASK         0x1c0
 159
 160 static void ak4396_write(struct oxygen *chip, unsigned int codec,
 161                          u8 reg, u8 value)
 162 {
 163         /* maps ALSA channel pair number to SPI output */
 164         static const u8 codec_spi_map[4] = {
 165                 0, 1, 2, 4
 166         };
 167         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
 168                          OXYGEN_SPI_DATA_LENGTH_2 |
 169                          OXYGEN_SPI_CLOCK_160 |
 170                          (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
 171                          OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
 172                          AK4396_WRITE | (reg << 8) | value);
 173 }
 174
 175 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
 176 {
 177         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
 178                          OXYGEN_SPI_DATA_LENGTH_2 |
 179                          OXYGEN_SPI_CLOCK_160 |
 180                          (3 << OXYGEN_SPI_CODEC_SHIFT) |
 181                          OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
 182                          (reg << 9) | value);
 183 }
 184
 185 static void ak4396_init(struct oxygen *chip)
 186 {
 187         unsigned int i;
 188
 189         chip->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
 190         for (i = 0; i < 4; ++i) {
 191                 ak4396_write(chip, i,
 192                              AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
 193                 ak4396_write(chip, i,
 194                              AK4396_CONTROL_2, chip->ak4396_ctl2);
 195                 ak4396_write(chip, i,
 196                              AK4396_CONTROL_3, AK4396_PCM);
 197                 ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
 198                 ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
 199         }
 200         snd_component_add(chip->card, "AK4396");
 201 }
 202
 203 static void ak5385_init(struct oxygen *chip)
 204 {
 205         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
 206         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
 207         snd_component_add(chip->card, "AK5385");
 208 }
 209
 210 static void wm8785_init(struct oxygen *chip)
 211 {
 212         wm8785_write(chip, WM8785_R7, 0);
 213         wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
 214                      WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
 215         wm8785_write(chip, WM8785_R1, WM8785_WL_24);
 216         snd_component_add(chip->card, "WM8785");
 217 }
 218
 219 static void generic_init(struct oxygen *chip)
 220 {
 221         ak4396_init(chip);
 222         wm8785_init(chip);
 223 }
 224
 225 static void meridian_init(struct oxygen *chip)
 226 {
 227         ak4396_init(chip);
 228         ak5385_init(chip);
 229 }
 230
 231 static void generic_cleanup(struct oxygen *chip)
 232 {
 233 }
 234
 235 static void set_ak4396_params(struct oxygen *chip,
 236                               struct snd_pcm_hw_params *params)
 237 {
 238         unsigned int i;
 239         u8 value;
 240
 241         value = chip->ak4396_ctl2 & ~AK4396_DFS_MASK;
 242         if (params_rate(params) <= 54000)
 243                 value |= AK4396_DFS_NORMAL;
 244         else if (params_rate(params) < 120000)
 245                 value |= AK4396_DFS_DOUBLE;
 246         else
 247                 value |= AK4396_DFS_QUAD;
 248         chip->ak4396_ctl2 = value;
 249         for (i = 0; i < 4; ++i) {
 250                 ak4396_write(chip, i,
 251                              AK4396_CONTROL_1, AK4396_DIF_24_MSB);
 252                 ak4396_write(chip, i,
 253                              AK4396_CONTROL_2, value);
 254                 ak4396_write(chip, i,
 255                              AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
 256         }
 257 }
 258
 259 static void update_ak4396_volume(struct oxygen *chip)
 260 {
 261         unsigned int i;
 262
 263         for (i = 0; i < 4; ++i) {
 264                 ak4396_write(chip, i,
 265                              AK4396_LCH_ATT, chip->dac_volume[i * 2]);
 266                 ak4396_write(chip, i,
 267                              AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
 268         }
 269 }
 270
 271 static void update_ak4396_mute(struct oxygen *chip)
 272 {
 273         unsigned int i;
 274         u8 value;
 275
 276         value = chip->ak4396_ctl2 & ~AK4396_SMUTE;
 277         if (chip->dac_mute)
 278                 value |= AK4396_SMUTE;
 279         for (i = 0; i < 4; ++i)
 280                 ak4396_write(chip, i, AK4396_CONTROL_2, value);
 281 }
 282
 283 static void set_wm8785_params(struct oxygen *chip,
 284                               struct snd_pcm_hw_params *params)
 285 {
 286         unsigned int value;
 287
 288         wm8785_write(chip, WM8785_R7, 0);
 289
 290         value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
 291         if (params_rate(params) <= 48000)
 292                 value |= WM8785_OSR_SINGLE;
 293         else if (params_rate(params) <= 96000)
 294                 value |= WM8785_OSR_DOUBLE;
 295         else
 296                 value |= WM8785_OSR_QUAD;
 297         wm8785_write(chip, WM8785_R0, value);
 298
 299         if (snd_pcm_format_width(params_format(params)) <= 16)
 300                 value = WM8785_WL_16;
 301         else
 302                 value = WM8785_WL_24;
 303         wm8785_write(chip, WM8785_R1, value);
 304 }
 305
 306 static void set_ak5385_params(struct oxygen *chip,
 307                               struct snd_pcm_hw_params *params)
 308 {
 309         unsigned int value;
 310
 311         if (params_rate(params) <= 54000)
 312                 value = GPIO_AK5385_DFS_NORMAL;
 313         else if (params_rate(params) <= 108000)
 314                 value = GPIO_AK5385_DFS_DOUBLE;
 315         else
 316                 value = GPIO_AK5385_DFS_QUAD;
 317         oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
 318                               value, GPIO_AK5385_DFS_MASK);
 319 }
 320
 321 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
 322
 323 static int ak4396_control_filter(struct snd_kcontrol_new *template)
 324 {
 325         if (!strcmp(template->name, "Master Playback Volume")) {
 326                 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
 327                 template->tlv.p = ak4396_db_scale;
 328         }
 329         return 0;
 330 }
 331
 332 static const struct oxygen_model model_generic = {
 333         .shortname = "C-Media CMI8788",
 334         .longname = "C-Media Oxygen HD Audio",
 335         .chip = "CMI8788",
 336         .owner = THIS_MODULE,
 337         .init = generic_init,
 338         .control_filter = ak4396_control_filter,
 339         .cleanup = generic_cleanup,
 340         .set_dac_params = set_ak4396_params,
 341         .set_adc_params = set_wm8785_params,
 342         .update_dac_volume = update_ak4396_volume,
 343         .update_dac_mute = update_ak4396_mute,
 344         .used_channels = OXYGEN_CHANNEL_A |
 345                          OXYGEN_CHANNEL_C |
 346                          OXYGEN_CHANNEL_SPDIF |
 347                          OXYGEN_CHANNEL_MULTICH |
 348                          OXYGEN_CHANNEL_AC97,
 349         .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
 350         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 351         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 352 };
 353 static const struct oxygen_model model_meridian = {
 354         .shortname = "C-Media CMI8788",
 355         .longname = "C-Media Oxygen HD Audio",
 356         .chip = "CMI8788",
 357         .owner = THIS_MODULE,
 358         .init = meridian_init,
 359         .control_filter = ak4396_control_filter,
 360         .cleanup = generic_cleanup,
 361         .set_dac_params = set_ak4396_params,
 362         .set_adc_params = set_ak5385_params,
 363         .update_dac_volume = update_ak4396_volume,
 364         .update_dac_mute = update_ak4396_mute,
 365         .used_channels = OXYGEN_CHANNEL_B |
 366                          OXYGEN_CHANNEL_C |
 367                          OXYGEN_CHANNEL_SPDIF |
 368                          OXYGEN_CHANNEL_MULTICH |
 369                          OXYGEN_CHANNEL_AC97,
 370         .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
 371         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 372         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 373 };
 374
 375 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
 376                                           const struct pci_device_id *pci_id)
 377 {
 378         static int dev;
 379         const struct oxygen_model *model;
 380         int err;
 381
 382         if (dev >= SNDRV_CARDS)
 383                 return -ENODEV;
 384         if (!enable[dev]) {
 385                 ++dev;
 386                 return -ENOENT;
 387         }
 388         model = pci_id->driver_data ? &model_meridian : &model_generic;
 389         err = oxygen_pci_probe(pci, index[dev], id[dev], 1, model);
 390         if (err >= 0)
 391                 ++dev;
 392         return err;
 393 }
 394
 395 static struct pci_driver oxygen_driver = {
 396         .name = "CMI8788",
 397         .id_table = oxygen_ids,
 398         .probe = generic_oxygen_probe,
 399         .remove = __devexit_p(oxygen_pci_remove),
 400 };
 401
 402 static int __init alsa_card_oxygen_init(void)
 403 {
 404         return pci_register_driver(&oxygen_driver);
 405 }
 406
 407 static void __exit alsa_card_oxygen_exit(void)
 408 {
 409         pci_unregister_driver(&oxygen_driver);
 410 }
 411
 412 module_init(alsa_card_oxygen_init)
 413 module_exit(alsa_card_oxygen_exit)