sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *
   9  *
  10  *  BUGS:
  11  *    --
  12  *
  13  *  TODO:
  14  *    --
  15  *
  16  *   This program is free software; you can redistribute it and/or modify
  17  *   it under the terms of the GNU General Public License as published by
  18  *   the Free Software Foundation; either version 2 of the License, or
  19  *   (at your option) any later version.
  20  *
  21  *   This program is distributed in the hope that it will be useful,
  22  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  *   GNU General Public License for more details.
  25  *
  26  *   You should have received a copy of the GNU General Public License
  27  *   along with this program; if not, write to the Free Software
  28  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  29  *
  30  */
  31
  32 #include <sound/driver.h>
  33 #include <linux/delay.h>
  34 #include <linux/init.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/pci.h>
  37 #include <linux/slab.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/mutex.h>
  40
  41
  42 #include <sound/core.h>
  43 #include <sound/emu10k1.h>
  44 #include "p16v.h"
  45 #include "tina2.h"
  46
  47
  48 /*************************************************************************
  49  * EMU10K1 init / done
  50  *************************************************************************/
  51
  52 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
  53 {
  54         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  55         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  56         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  57         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  58         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  59         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  60         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  61
  62         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  63         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  64         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  65         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  66         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  67         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  68
  69         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  70         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  71         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  72         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  73         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  74         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  75         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  76         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  77
  78         /*** these are last so OFF prevents writing ***/
  79         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
  80         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
  81         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
  82         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
  83         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
  84
  85         /* Audigy extra stuffs */
  86         if (emu->audigy) {
  87                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
  88                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
  89                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
  90                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
  91                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
  92                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
  93                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
  94         }
  95 }
  96
  97 static unsigned int spi_dac_init[] = {
  98                 0x00ff,
  99                 0x02ff,
 100                 0x0400,
 101                 0x0520,
 102                 0x0600,
 103                 0x08ff,
 104                 0x0aff,
 105                 0x0cff,
 106                 0x0eff,
 107                 0x10ff,
 108                 0x1200,
 109                 0x1400,
 110                 0x1480,
 111                 0x1800,
 112                 0x1aff,
 113                 0x1cff,
 114                 0x1e00,
 115                 0x0530,
 116                 0x0602,
 117                 0x0622,
 118                 0x1400,
 119 };
 120
 121 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 122 {
 123         unsigned int silent_page;
 124         int ch;
 125
 126         /* disable audio and lock cache */
 127         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 128              emu->port + HCFG);
 129
 130         /* reset recording buffers */
 131         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 132         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 133         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 134         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 135         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 136         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 137
 138         /* disable channel interrupt */
 139         outl(0, emu->port + INTE);
 140         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 141         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 142         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 143         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 144
 145         if (emu->audigy){
 146                 /* set SPDIF bypass mode */
 147                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 148                 /* enable rear left + rear right AC97 slots */
 149                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 150                                       AC97SLOT_REAR_LEFT);
 151         }
 152
 153         /* init envelope engine */
 154         for (ch = 0; ch < NUM_G; ch++)
 155                 snd_emu10k1_voice_init(emu, ch);
 156
 157         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 158         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 159         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 160
 161         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 162                 /* Hacks for Alice3 to work independent of haP16V driver */
 163                 u32 tmp;
 164
 165                 //Setup SRCMulti_I2S SamplingRate
 166                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 167                 tmp &= 0xfffff1ff;
 168                 tmp |= (0x2<<9);
 169                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 170
 171                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 172                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 173                 /* Setup SRCMulti Input Audio Enable */
 174                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 175                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 176
 177                 /* Enabled Phased (8-channel) P16V playback */
 178                 outl(0x0201, emu->port + HCFG2);
 179                 /* Set playback routing. */
 180                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 181         }
 182         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 183                 /* Hacks for Alice3 to work independent of haP16V driver */
 184                 u32 tmp;
 185
 186                 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
 187                 //Setup SRCMulti_I2S SamplingRate
 188                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 189                 tmp &= 0xfffff1ff;
 190                 tmp |= (0x2<<9);
 191                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 192
 193                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 194                 outl(0x600000, emu->port + 0x20);
 195                 outl(0x14, emu->port + 0x24);
 196
 197                 /* Setup SRCMulti Input Audio Enable */
 198                 outl(0x7b0000, emu->port + 0x20);
 199                 outl(0xFF000000, emu->port + 0x24);
 200
 201                 /* Setup SPDIF Out Audio Enable */
 202                 /* The Audigy 2 Value has a separate SPDIF out,
 203                  * so no need for a mixer switch
 204                  */
 205                 outl(0x7a0000, emu->port + 0x20);
 206                 outl(0xFF000000, emu->port + 0x24);
 207                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 208                 outl(tmp, emu->port + A_IOCFG);
 209         }
 210         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 211                 int size, n;
 212
 213                 size = ARRAY_SIZE(spi_dac_init);
 214                 for (n=0; n < size; n++)
 215                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 216
 217                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 218                 /* Enable GPIOs
 219                  * GPIO0: Unknown
 220                  * GPIO1: Speakers-enabled.
 221                  * GPIO2: Unknown
 222                  * GPIO3: Unknown
 223                  * GPIO4: IEC958 Output on.
 224                  * GPIO5: Unknown
 225                  * GPIO6: Unknown
 226                  * GPIO7: Unknown
 227                  */
 228                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 229
 230         }
 231
 232         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 233         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 234         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 235
 236         silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
 237         for (ch = 0; ch < NUM_G; ch++) {
 238                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 239                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 240         }
 241
 242         /*
 243          *  Hokay, setup HCFG
 244          *   Mute Disable Audio = 0
 245          *   Lock Tank Memory = 1
 246          *   Lock Sound Memory = 0
 247          *   Auto Mute = 1
 248          */
 249         if (emu->audigy) {
 250                 if (emu->revision == 4) /* audigy2 */
 251                         outl(HCFG_AUDIOENABLE |
 252                              HCFG_AC3ENABLE_CDSPDIF |
 253                              HCFG_AC3ENABLE_GPSPDIF |
 254                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 255                 else
 256                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 257         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 258          * e.g. card_capabilities->joystick */
 259         } else if (emu->model == 0x20 ||
 260             emu->model == 0xc400 ||
 261             (emu->model == 0x21 && emu->revision < 6))
 262                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 263         else
 264                 // With on-chip joystick
 265                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 266
 267         if (enable_ir) {        /* enable IR for SB Live */
 268                 if ( emu->card_capabilities->emu1212m) {
 269                         ;  /* Disable all access to A_IOCFG for the emu1212m */
 270                 } else if (emu->audigy) {
 271                         unsigned int reg = inl(emu->port + A_IOCFG);
 272                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 273                         udelay(500);
 274                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 275                         udelay(100);
 276                         outl(reg, emu->port + A_IOCFG);
 277                 } else {
 278                         unsigned int reg = inl(emu->port + HCFG);
 279                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 280                         udelay(500);
 281                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 282                         udelay(100);
 283                         outl(reg, emu->port + HCFG);
 284                 }
 285         }
 286
 287         if ( emu->card_capabilities->emu1212m) {
 288                 ;  /* Disable all access to A_IOCFG for the emu1212m */
 289         } else if (emu->audigy) {       /* enable analog output */
 290                 unsigned int reg = inl(emu->port + A_IOCFG);
 291                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 292         }
 293
 294         return 0;
 295 }
 296
 297 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 298 {
 299         /*
 300          *  Enable the audio bit
 301          */
 302         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 303
 304         /* Enable analog/digital outs on audigy */
 305         if ( emu->card_capabilities->emu1212m) {
 306                 ;  /* Disable all access to A_IOCFG for the emu1212m */
 307         } else if (emu->audigy) {
 308                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 309
 310                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 311                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 312                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 313                          * So, sequence is important. */
 314                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 315                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 316                         /* Unmute Analog now. */
 317                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 318                 } else {
 319                         /* Disable routing from AC97 line out to Front speakers */
 320                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 321                 }
 322         }
 323
 324 #if 0
 325         {
 326         unsigned int tmp;
 327         /* FIXME: the following routine disables LiveDrive-II !! */
 328         // TOSLink detection
 329         emu->tos_link = 0;
 330         tmp = inl(emu->port + HCFG);
 331         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 332                 outl(tmp|0x800, emu->port + HCFG);
 333                 udelay(50);
 334                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 335                         emu->tos_link = 1;
 336                         outl(tmp, emu->port + HCFG);
 337                 }
 338         }
 339         }
 340 #endif
 341
 342         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 343 }
 344
 345 int snd_emu10k1_done(struct snd_emu10k1 * emu)
 346 {
 347         int ch;
 348
 349         outl(0, emu->port + INTE);
 350
 351         /*
 352          *  Shutdown the chip
 353          */
 354         for (ch = 0; ch < NUM_G; ch++)
 355                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 356         for (ch = 0; ch < NUM_G; ch++) {
 357                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 358                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 359                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 360                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 361         }
 362
 363         /* reset recording buffers */
 364         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 365         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 366         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 367         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 368         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 369         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 370         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 371         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 372         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 373         if (emu->audigy)
 374                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 375         else
 376                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 377
 378         /* disable channel interrupt */
 379         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 380         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 381         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 382         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 383
 384         /* disable audio and lock cache */
 385         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 386         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 387
 388         return 0;
 389 }
 390
 391 /*************************************************************************
 392  * ECARD functional implementation
 393  *************************************************************************/
 394
 395 /* In A1 Silicon, these bits are in the HC register */
 396 #define HOOKN_BIT               (1L << 12)
 397 #define HANDN_BIT               (1L << 11)
 398 #define PULSEN_BIT              (1L << 10)
 399
 400 #define EC_GDI1                 (1 << 13)
 401 #define EC_GDI0                 (1 << 14)
 402
 403 #define EC_NUM_CONTROL_BITS     20
 404
 405 #define EC_AC3_DATA_SELN        0x0001L
 406 #define EC_EE_DATA_SEL          0x0002L
 407 #define EC_EE_CNTRL_SELN        0x0004L
 408 #define EC_EECLK                0x0008L
 409 #define EC_EECS                 0x0010L
 410 #define EC_EESDO                0x0020L
 411 #define EC_TRIM_CSN             0x0040L
 412 #define EC_TRIM_SCLK            0x0080L
 413 #define EC_TRIM_SDATA           0x0100L
 414 #define EC_TRIM_MUTEN           0x0200L
 415 #define EC_ADCCAL               0x0400L
 416 #define EC_ADCRSTN              0x0800L
 417 #define EC_DACCAL               0x1000L
 418 #define EC_DACMUTEN             0x2000L
 419 #define EC_LEDN                 0x4000L
 420
 421 #define EC_SPDIF0_SEL_SHIFT     15
 422 #define EC_SPDIF1_SEL_SHIFT     17
 423 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 424 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 425 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 426 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 427 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 428                                          * be incremented any time the EEPROM's
 429                                          * format is changed.  */
 430
 431 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 432
 433 /* Addresses for special values stored in to EEPROM */
 434 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 435 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 436 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 437
 438 #define EC_LAST_PROMFILE_ADDR   0x2f
 439
 440 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 441                                          * can be up to 30 characters in length
 442                                          * and is stored as a NULL-terminated
 443                                          * ASCII string.  Any unused bytes must be
 444                                          * filled with zeros */
 445 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 446
 447
 448 /* Most of this stuff is pretty self-evident.  According to the hardware
 449  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 450  * offset problem.  Weird.
 451  */
 452 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 453                                  EC_TRIM_CSN)
 454
 455
 456 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 457 #define EC_DEFAULT_SPDIF0_SEL   0x0
 458 #define EC_DEFAULT_SPDIF1_SEL   0x4
 459
 460 /**************************************************************************
 461  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 462  *  control latch will is loaded bit-serially by toggling the Modem control
 463  *  lines from function 2 on the E8010.  This function hides these details
 464  *  and presents the illusion that we are actually writing to a distinct
 465  *  register.
 466  */
 467
 468 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
 469 {
 470         unsigned short count;
 471         unsigned int data;
 472         unsigned long hc_port;
 473         unsigned int hc_value;
 474
 475         hc_port = emu->port + HCFG;
 476         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 477         outl(hc_value, hc_port);
 478
 479         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 480
 481                 /* Set up the value */
 482                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 483                 value >>= 1;
 484
 485                 outl(hc_value | data, hc_port);
 486
 487                 /* Clock the shift register */
 488                 outl(hc_value | data | HANDN_BIT, hc_port);
 489                 outl(hc_value | data, hc_port);
 490         }
 491
 492         /* Latch the bits */
 493         outl(hc_value | HOOKN_BIT, hc_port);
 494         outl(hc_value, hc_port);
 495 }
 496
 497 /**************************************************************************
 498  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 499  * trim value consists of a 16bit value which is composed of two
 500  * 8 bit gain/trim values, one for the left channel and one for the
 501  * right channel.  The following table maps from the Gain/Attenuation
 502  * value in decibels into the corresponding bit pattern for a single
 503  * channel.
 504  */
 505
 506 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
 507                                          unsigned short gain)
 508 {
 509         unsigned int bit;
 510
 511         /* Enable writing to the TRIM registers */
 512         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 513
 514         /* Do it again to insure that we meet hold time requirements */
 515         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 516
 517         for (bit = (1 << 15); bit; bit >>= 1) {
 518                 unsigned int value;
 519
 520                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 521
 522                 if (gain & bit)
 523                         value |= EC_TRIM_SDATA;
 524
 525                 /* Clock the bit */
 526                 snd_emu10k1_ecard_write(emu, value);
 527                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 528                 snd_emu10k1_ecard_write(emu, value);
 529         }
 530
 531         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 532 }
 533
 534 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
 535 {
 536         unsigned int hc_value;
 537
 538         /* Set up the initial settings */
 539         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 540                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 541                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 542
 543         /* Step 0: Set the codec type in the hardware control register
 544          * and enable audio output */
 545         hc_value = inl(emu->port + HCFG);
 546         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 547         inl(emu->port + HCFG);
 548
 549         /* Step 1: Turn off the led and deassert TRIM_CS */
 550         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 551
 552         /* Step 2: Calibrate the ADC and DAC */
 553         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 554
 555         /* Step 3: Wait for awhile;   XXX We can't get away with this
 556          * under a real operating system; we'll need to block and wait that
 557          * way. */
 558         snd_emu10k1_wait(emu, 48000);
 559
 560         /* Step 4: Switch off the DAC and ADC calibration.  Note
 561          * That ADC_CAL is actually an inverted signal, so we assert
 562          * it here to stop calibration.  */
 563         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 564
 565         /* Step 4: Switch into run mode */
 566         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 567
 568         /* Step 5: Set the analog input gain */
 569         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 570
 571         return 0;
 572 }
 573
 574 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
 575 {
 576         unsigned long special_port;
 577         unsigned int value;
 578
 579         /* Special initialisation routine
 580          * before the rest of the IO-Ports become active.
 581          */
 582         special_port = emu->port + 0x38;
 583         value = inl(special_port);
 584         outl(0x00d00000, special_port);
 585         value = inl(special_port);
 586         outl(0x00d00001, special_port);
 587         value = inl(special_port);
 588         outl(0x00d0005f, special_port);
 589         value = inl(special_port);
 590         outl(0x00d0007f, special_port);
 591         value = inl(special_port);
 592         outl(0x0090007f, special_port);
 593         value = inl(special_port);
 594
 595         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 596         return 0;
 597 }
 598
 599 static int snd_emu1212m_fpga_write(struct snd_emu10k1 * emu, int reg, int value)
 600 {
 601         if (reg<0 || reg>0x3f)
 602                 return 1;
 603         reg+=0x40; /* 0x40 upwards are registers. */
 604         if (value<0 || value>0x3f) /* 0 to 0x3f are values */
 605                 return 1;
 606         outl(reg, emu->port + A_IOCFG);
 607         outl(reg | 0x80, emu->port + A_IOCFG);  /* High bit clocks the value into the fpga. */
 608         outl(value, emu->port + A_IOCFG);
 609         outl(value | 0x80 , emu->port + A_IOCFG);  /* High bit clocks the value into the fpga. */
 610
 611         return 0;
 612 }
 613
 614 static int snd_emu1212m_fpga_read(struct snd_emu10k1 * emu, int reg, int *value)
 615 {
 616         if (reg<0 || reg>0x3f)
 617                 return 1;
 618         reg+=0x40; /* 0x40 upwards are registers. */
 619         outl(reg, emu->port + A_IOCFG);
 620         outl(reg | 0x80, emu->port + A_IOCFG);  /* High bit clocks the value into the fpga. */
 621         *value = inl(emu->port + A_IOCFG);
 622
 623         return 0;
 624 }
 625
 626 static int snd_emu1212m_fpga_netlist_write(struct snd_emu10k1 * emu, int reg, int value)
 627 {
 628         snd_emu1212m_fpga_write(emu, 0x00, ((reg >> 8) & 0x3f) );
 629         snd_emu1212m_fpga_write(emu, 0x01, (reg & 0x3f) );
 630         snd_emu1212m_fpga_write(emu, 0x02, ((value >> 8) & 0x3f) );
 631         snd_emu1212m_fpga_write(emu, 0x03, (value & 0x3f) );
 632
 633         return 0;
 634 }
 635
 636 static int snd_emu10k1_emu1212m_init(struct snd_emu10k1 * emu)
 637 {
 638         unsigned int i;
 639         int tmp;
 640
 641         snd_printk(KERN_ERR "emu1212m: Special config.\n");
 642         outl(0x0005a00c, emu->port + HCFG);
 643         outl(0x0005a004, emu->port + HCFG);
 644         outl(0x0005a000, emu->port + HCFG);
 645         outl(0x0005a000, emu->port + HCFG);
 646
 647         snd_emu1212m_fpga_read(emu, 0x22, &tmp );
 648         snd_emu1212m_fpga_read(emu, 0x23, &tmp );
 649         snd_emu1212m_fpga_read(emu, 0x24, &tmp );
 650         snd_emu1212m_fpga_write(emu, 0x04, 0x01 );
 651         snd_emu1212m_fpga_read(emu, 0x0b, &tmp );
 652         snd_emu1212m_fpga_write(emu, 0x0b, 0x01 );
 653         snd_emu1212m_fpga_read(emu, 0x10, &tmp );
 654         snd_emu1212m_fpga_write(emu, 0x10, 0x00 );
 655         snd_emu1212m_fpga_read(emu, 0x11, &tmp );
 656         snd_emu1212m_fpga_write(emu, 0x11, 0x30 );
 657         snd_emu1212m_fpga_read(emu, 0x13, &tmp );
 658         snd_emu1212m_fpga_write(emu, 0x13, 0x0f );
 659         snd_emu1212m_fpga_read(emu, 0x11, &tmp );
 660         snd_emu1212m_fpga_write(emu, 0x11, 0x30 );
 661         snd_emu1212m_fpga_read(emu, 0x0a, &tmp );
 662         snd_emu1212m_fpga_write(emu, 0x0a, 0x10 );
 663         snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
 664         snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
 665         snd_emu1212m_fpga_write(emu, 0x09, 0x0f );
 666         snd_emu1212m_fpga_write(emu, 0x06, 0x00 );
 667         snd_emu1212m_fpga_write(emu, 0x05, 0x00 );
 668         snd_emu1212m_fpga_write(emu, 0x0e, 0x12 );
 669         snd_emu1212m_fpga_netlist_write(emu, 0x0000, 0x0200);
 670         snd_emu1212m_fpga_netlist_write(emu, 0x0001, 0x0201);
 671         snd_emu1212m_fpga_netlist_write(emu, 0x0002, 0x0500);
 672         snd_emu1212m_fpga_netlist_write(emu, 0x0003, 0x0501);
 673         snd_emu1212m_fpga_netlist_write(emu, 0x0004, 0x0400);
 674         snd_emu1212m_fpga_netlist_write(emu, 0x0005, 0x0401);
 675         snd_emu1212m_fpga_netlist_write(emu, 0x0006, 0x0402);
 676         snd_emu1212m_fpga_netlist_write(emu, 0x0007, 0x0403);
 677         snd_emu1212m_fpga_netlist_write(emu, 0x0008, 0x0404);
 678         snd_emu1212m_fpga_netlist_write(emu, 0x0009, 0x0405);
 679         snd_emu1212m_fpga_netlist_write(emu, 0x000a, 0x0406);
 680         snd_emu1212m_fpga_netlist_write(emu, 0x000b, 0x0407);
 681         snd_emu1212m_fpga_netlist_write(emu, 0x000c, 0x0100);
 682         snd_emu1212m_fpga_netlist_write(emu, 0x000d, 0x0104);
 683         snd_emu1212m_fpga_netlist_write(emu, 0x000e, 0x0200);
 684         snd_emu1212m_fpga_netlist_write(emu, 0x000f, 0x0201);
 685         for (i=0;i < 0x20;i++) {
 686                 snd_emu1212m_fpga_netlist_write(emu, 0x0100+i, 0x0000);
 687         }
 688         for (i=0;i < 4;i++) {
 689                 snd_emu1212m_fpga_netlist_write(emu, 0x0200+i, 0x0000);
 690         }
 691         for (i=0;i < 7;i++) {
 692                 snd_emu1212m_fpga_netlist_write(emu, 0x0300+i, 0x0000);
 693         }
 694         for (i=0;i < 7;i++) {
 695                 snd_emu1212m_fpga_netlist_write(emu, 0x0400+i, 0x0000);
 696         }
 697         snd_emu1212m_fpga_netlist_write(emu, 0x0500, 0x0108);
 698         snd_emu1212m_fpga_netlist_write(emu, 0x0501, 0x010c);
 699         snd_emu1212m_fpga_netlist_write(emu, 0x0600, 0x0110);
 700         snd_emu1212m_fpga_netlist_write(emu, 0x0601, 0x0114);
 701         snd_emu1212m_fpga_netlist_write(emu, 0x0700, 0x0118);
 702         snd_emu1212m_fpga_netlist_write(emu, 0x0701, 0x011c);
 703         snd_emu1212m_fpga_write(emu, 0x07, 0x01 );
 704
 705         snd_emu1212m_fpga_read(emu, 0x21, &tmp );
 706
 707         outl(0x0000a000, emu->port + HCFG);
 708         outl(0x0000a001, emu->port + HCFG);
 709         /* Initial boot complete. Now patches */
 710
 711         snd_emu1212m_fpga_read(emu, 0x21, &tmp );
 712         snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
 713         snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
 714         snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
 715         snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
 716         snd_emu1212m_fpga_read(emu, 0x0a, &tmp );
 717         snd_emu1212m_fpga_write(emu, 0x0a, 0x10 );
 718
 719         snd_emu1212m_fpga_read(emu, 0x20, &tmp );
 720         snd_emu1212m_fpga_read(emu, 0x21, &tmp );
 721
 722         snd_emu1212m_fpga_netlist_write(emu, 0x0300, 0x0312);
 723         snd_emu1212m_fpga_netlist_write(emu, 0x0301, 0x0313);
 724         snd_emu1212m_fpga_netlist_write(emu, 0x0200, 0x0302);
 725         snd_emu1212m_fpga_netlist_write(emu, 0x0201, 0x0303);
 726
 727         return 0;
 728 }
 729 /*
 730  *  Create the EMU10K1 instance
 731  */
 732
 733 #ifdef CONFIG_PM
 734 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
 735 static void free_pm_buffer(struct snd_emu10k1 *emu);
 736 #endif
 737
 738 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
 739 {
 740         if (emu->port) {        /* avoid access to already used hardware */
 741                 snd_emu10k1_fx8010_tram_setup(emu, 0);
 742                 snd_emu10k1_done(emu);
 743                 /* remove reserved page */
 744                 if (emu->reserved_page) {
 745                         snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
 746                         emu->reserved_page = NULL;
 747                 }
 748                 snd_emu10k1_free_efx(emu);
 749         }
 750         if (emu->memhdr)
 751                 snd_util_memhdr_free(emu->memhdr);
 752         if (emu->silent_page.area)
 753                 snd_dma_free_pages(&emu->silent_page);
 754         if (emu->ptb_pages.area)
 755                 snd_dma_free_pages(&emu->ptb_pages);
 756         vfree(emu->page_ptr_table);
 757         vfree(emu->page_addr_table);
 758 #ifdef CONFIG_PM
 759         free_pm_buffer(emu);
 760 #endif
 761         if (emu->irq >= 0)
 762                 free_irq(emu->irq, (void *)emu);
 763         if (emu->port)
 764                 pci_release_regions(emu->pci);
 765         if (emu->card_capabilities->ca0151_chip) /* P16V */
 766                 snd_p16v_free(emu);
 767         pci_disable_device(emu->pci);
 768         kfree(emu);
 769         return 0;
 770 }
 771
 772 static int snd_emu10k1_dev_free(struct snd_device *device)
 773 {
 774         struct snd_emu10k1 *emu = device->device_data;
 775         return snd_emu10k1_free(emu);
 776 }
 777
 778 static struct snd_emu_chip_details emu_chip_details[] = {
 779         /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
 780         /* Tested by James@superbug.co.uk 3rd July 2005 */
 781         /* DSP: CA0108-IAT
 782          * DAC: CS4382-KQ
 783          * ADC: Philips 1361T
 784          * AC97: STAC9750
 785          * CA0151: None
 786          */
 787         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
 788          .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
 789          .id = "Audigy2",
 790          .emu10k2_chip = 1,
 791          .ca0108_chip = 1,
 792          .spk71 = 1,
 793          .ac97_chip = 1} ,
 794         /* Audigy4 (Not PRO) SB0610 */
 795         /* Tested by James@superbug.co.uk 4th April 2006 */
 796         /* A_IOCFG bits
 797          * Output
 798          * 0: ?
 799          * 1: ?
 800          * 2: ?
 801          * 3: 0 - Digital Out, 1 - Line in
 802          * 4: ?
 803          * 5: ?
 804          * 6: ?
 805          * 7: ?
 806          * Input
 807          * 8: ?
 808          * 9: ?
 809          * A: Green jack sense (Front)
 810          * B: ?
 811          * C: Black jack sense (Rear/Side Right)
 812          * D: Yellow jack sense (Center/LFE/Side Left)
 813          * E: ?
 814          * F: ?
 815          *
 816          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
 817          * 0 - Digital Out
 818          * 1 - Line in
 819          */
 820         /* Mic input not tested.
 821          * Analog CD input not tested
 822          * Digital Out not tested.
 823          * Line in working.
 824          * Audio output 5.1 working. Side outputs not working.
 825          */
 826         /* DSP: CA10300-IAT LF
 827          * DAC: Cirrus Logic CS4382-KQZ
 828          * ADC: Philips 1361T
 829          * AC97: Sigmatel STAC9750
 830          * CA0151: None
 831          */
 832         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
 833          .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
 834          .id = "Audigy2",
 835          .emu10k2_chip = 1,
 836          .ca0108_chip = 1,
 837          .spk71 = 1,
 838          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
 839          .ac97_chip = 1} ,
 840         /* Audigy 2 ZS Notebook Cardbus card.*/
 841         /* Tested by James@superbug.co.uk 22th December 2005 */
 842         /* Audio output 7.1/Headphones working.
 843          * Digital output working. (AC3 not checked, only PCM)
 844          * Audio inputs not tested.
 845          */
 846         /* DSP: Tina2
 847          * DAC: Wolfson WM8768/WM8568
 848          * ADC: Wolfson WM8775
 849          * AC97: None
 850          * CA0151: None
 851          */
 852         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
 853          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
 854          .id = "Audigy2",
 855          .emu10k2_chip = 1,
 856          .ca0108_chip = 1,
 857          .ca_cardbus_chip = 1,
 858          .spi_dac = 1,
 859          .spk71 = 1} ,
 860         {.vendor = 0x1102, .device = 0x0008,
 861          .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
 862          .id = "Audigy2",
 863          .emu10k2_chip = 1,
 864          .ca0108_chip = 1,
 865          .ac97_chip = 1} ,
 866         /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
 867         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
 868          .driver = "Audigy2", .name = "E-mu 1212m [4001]",
 869          .id = "EMU1212m",
 870          .emu10k2_chip = 1,
 871          .ca0102_chip = 1,
 872          .emu1212m = 1} ,
 873         /* Tested by James@superbug.co.uk 3rd July 2005 */
 874         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
 875          .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
 876          .id = "Audigy2",
 877          .emu10k2_chip = 1,
 878          .ca0102_chip = 1,
 879          .ca0151_chip = 1,
 880          .spk71 = 1,
 881          .spdif_bug = 1,
 882          .ac97_chip = 1} ,
 883         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
 884         /* The 0x20061102 does have SB0350 written on it
 885          * Just like 0x20021102
 886          */
 887         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
 888          .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
 889          .id = "Audigy2",
 890          .emu10k2_chip = 1,
 891          .ca0102_chip = 1,
 892          .ca0151_chip = 1,
 893          .spk71 = 1,
 894          .spdif_bug = 1,
 895          .ac97_chip = 1} ,
 896         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
 897          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
 898          .id = "Audigy2",
 899          .emu10k2_chip = 1,
 900          .ca0102_chip = 1,
 901          .ca0151_chip = 1,
 902          .spk71 = 1,
 903          .spdif_bug = 1,
 904          .ac97_chip = 1} ,
 905         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
 906          .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
 907          .id = "Audigy2",
 908          .emu10k2_chip = 1,
 909          .ca0102_chip = 1,
 910          .ca0151_chip = 1,
 911          .spk71 = 1,
 912          .spdif_bug = 1,
 913          .ac97_chip = 1} ,
 914         /* Audigy 2 */
 915         /* Tested by James@superbug.co.uk 3rd July 2005 */
 916         /* DSP: CA0102-IAT
 917          * DAC: CS4382-KQ
 918          * ADC: Philips 1361T
 919          * AC97: STAC9721
 920          * CA0151: Yes
 921          */
 922         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
 923          .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
 924          .id = "Audigy2",
 925          .emu10k2_chip = 1,
 926          .ca0102_chip = 1,
 927          .ca0151_chip = 1,
 928          .spk71 = 1,
 929          .spdif_bug = 1,
 930          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
 931          .ac97_chip = 1} ,
 932         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
 933          .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
 934          .id = "Audigy2",
 935          .emu10k2_chip = 1,
 936          .ca0102_chip = 1,
 937          .ca0151_chip = 1,
 938          .spk71 = 1,
 939          .spdif_bug = 1} ,
 940         /* Dell OEM/Creative Labs Audigy 2 ZS */
 941         /* See ALSA bug#1365 */
 942         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
 943          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
 944          .id = "Audigy2",
 945          .emu10k2_chip = 1,
 946          .ca0102_chip = 1,
 947          .ca0151_chip = 1,
 948          .spk71 = 1,
 949          .spdif_bug = 1,
 950          .ac97_chip = 1} ,
 951         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
 952          .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
 953          .id = "Audigy2",
 954          .emu10k2_chip = 1,
 955          .ca0102_chip = 1,
 956          .ca0151_chip = 1,
 957          .spk71 = 1,
 958          .spdif_bug = 1,
 959          .ac97_chip = 1} ,
 960         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
 961          .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
 962          .id = "Audigy2",
 963          .emu10k2_chip = 1,
 964          .ca0102_chip = 1,
 965          .ca0151_chip = 1,
 966          .spdif_bug = 1,
 967          .ac97_chip = 1} ,
 968         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
 969          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
 970          .id = "Audigy",
 971          .emu10k2_chip = 1,
 972          .ca0102_chip = 1,
 973          .ac97_chip = 1} ,
 974         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
 975          .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
 976          .id = "Audigy",
 977          .emu10k2_chip = 1,
 978          .ca0102_chip = 1,
 979          .spdif_bug = 1,
 980          .ac97_chip = 1} ,
 981         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
 982          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
 983          .id = "Audigy",
 984          .emu10k2_chip = 1,
 985          .ca0102_chip = 1,
 986          .ac97_chip = 1} ,
 987         {.vendor = 0x1102, .device = 0x0004,
 988          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
 989          .id = "Audigy",
 990          .emu10k2_chip = 1,
 991          .ca0102_chip = 1,
 992          .ac97_chip = 1} ,
 993         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
 994          .driver = "EMU10K1", .name = "SBLive! [SB0105]",
 995          .id = "Live",
 996          .emu10k1_chip = 1,
 997          .ac97_chip = 1,
 998          .sblive51 = 1} ,
 999         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1000          .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1001          .id = "Live",
1002          .emu10k1_chip = 1,
1003          .ac97_chip = 1,
1004          .sblive51 = 1} ,
1005         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1006          .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1007          .id = "Live",
1008          .emu10k1_chip = 1,
1009          .ac97_chip = 1,
1010          .sblive51 = 1} ,
1011         /* Tested by ALSA bug#1680 26th December 2005 */
1012         /* note: It really has SB0220 written on the card. */
1013         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1014          .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1015          .id = "Live",
1016          .emu10k1_chip = 1,
1017          .ac97_chip = 1,
1018          .sblive51 = 1} ,
1019         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1020         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1021          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1022          .id = "Live",
1023          .emu10k1_chip = 1,
1024          .ac97_chip = 1,
1025          .sblive51 = 1} ,
1026         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1027          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1028          .id = "Live",
1029          .emu10k1_chip = 1,
1030          .ac97_chip = 1,
1031          .sblive51 = 1} ,
1032         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1033          .driver = "EMU10K1", .name = "SB Live 5.1",
1034          .id = "Live",
1035          .emu10k1_chip = 1,
1036          .ac97_chip = 1,
1037          .sblive51 = 1} ,
1038         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1039         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1040          .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1041          .id = "Live",
1042          .emu10k1_chip = 1,
1043          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1044                           * share the same IDs!
1045                           */
1046          .sblive51 = 1} ,
1047         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1048          .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1049          .id = "Live",
1050          .emu10k1_chip = 1,
1051          .ac97_chip = 1,
1052          .sblive51 = 1} ,
1053         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1054          .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1055          .id = "Live",
1056          .emu10k1_chip = 1,
1057          .ac97_chip = 1} ,
1058         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1059          .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1060          .id = "Live",
1061          .emu10k1_chip = 1,
1062          .ac97_chip = 1,
1063          .sblive51 = 1} ,
1064         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1065          .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1066          .id = "Live",
1067          .emu10k1_chip = 1,
1068          .ac97_chip = 1,
1069          .sblive51 = 1} ,
1070         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1071          .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1072          .id = "Live",
1073          .emu10k1_chip = 1,
1074          .ac97_chip = 1,
1075          .sblive51 = 1} ,
1076         /* Tested by James@superbug.co.uk 3rd July 2005 */
1077         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1078          .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1079          .id = "Live",
1080          .emu10k1_chip = 1,
1081          .ac97_chip = 1,
1082          .sblive51 = 1} ,
1083         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1084          .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1085          .id = "Live",
1086          .emu10k1_chip = 1,
1087          .ac97_chip = 1,
1088          .sblive51 = 1} ,
1089         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1090          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1091          .id = "Live",
1092          .emu10k1_chip = 1,
1093          .ac97_chip = 1,
1094          .sblive51 = 1} ,
1095         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1096          .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1097          .id = "Live",
1098          .emu10k1_chip = 1,
1099          .ac97_chip = 1,
1100          .sblive51 = 1} ,
1101         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1102          .driver = "EMU10K1", .name = "E-mu APS [4001]",
1103          .id = "APS",
1104          .emu10k1_chip = 1,
1105          .ecard = 1} ,
1106         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1107          .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1108          .id = "Live",
1109          .emu10k1_chip = 1,
1110          .ac97_chip = 1,
1111          .sblive51 = 1} ,
1112         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1113          .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1114          .id = "Live",
1115          .emu10k1_chip = 1,
1116          .ac97_chip = 1,
1117          .sblive51 = 1} ,
1118         {.vendor = 0x1102, .device = 0x0002,
1119          .driver = "EMU10K1", .name = "SB Live [Unknown]",
1120          .id = "Live",
1121          .emu10k1_chip = 1,
1122          .ac97_chip = 1,
1123          .sblive51 = 1} ,
1124         { } /* terminator */
1125 };
1126
1127 int __devinit snd_emu10k1_create(struct snd_card *card,
1128                        struct pci_dev * pci,
1129                        unsigned short extin_mask,
1130                        unsigned short extout_mask,
1131                        long max_cache_bytes,
1132                        int enable_ir,
1133                        uint subsystem,
1134                        struct snd_emu10k1 ** remu)
1135 {
1136         struct snd_emu10k1 *emu;
1137         int idx, err;
1138         int is_audigy;
1139         unsigned char revision;
1140         unsigned int silent_page;
1141         const struct snd_emu_chip_details *c;
1142         static struct snd_device_ops ops = {
1143                 .dev_free =     snd_emu10k1_dev_free,
1144         };
1145
1146         *remu = NULL;
1147
1148         /* enable PCI device */
1149         if ((err = pci_enable_device(pci)) < 0)
1150                 return err;
1151
1152         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1153         if (emu == NULL) {
1154                 pci_disable_device(pci);
1155                 return -ENOMEM;
1156         }
1157         emu->card = card;
1158         spin_lock_init(&emu->reg_lock);
1159         spin_lock_init(&emu->emu_lock);
1160         spin_lock_init(&emu->voice_lock);
1161         spin_lock_init(&emu->synth_lock);
1162         spin_lock_init(&emu->memblk_lock);
1163         mutex_init(&emu->fx8010.lock);
1164         INIT_LIST_HEAD(&emu->mapped_link_head);
1165         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1166         emu->pci = pci;
1167         emu->irq = -1;
1168         emu->synth = NULL;
1169         emu->get_synth_voice = NULL;
1170         /* read revision & serial */
1171         pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1172         emu->revision = revision;
1173         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1174         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1175         snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1176
1177         for (c = emu_chip_details; c->vendor; c++) {
1178                 if (c->vendor == pci->vendor && c->device == pci->device) {
1179                         if (subsystem) {
1180                                 if (c->subsystem && (c->subsystem == subsystem) ) {
1181                                         break;
1182                                 } else continue;
1183                         } else {
1184                                 if (c->subsystem && (c->subsystem != emu->serial) )
1185                                         continue;
1186                                 if (c->revision && c->revision != emu->revision)
1187                                         continue;
1188                         }
1189                         break;
1190                 }
1191         }
1192         if (c->vendor == 0) {
1193                 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1194                 kfree(emu);
1195                 pci_disable_device(pci);
1196                 return -ENOENT;
1197         }
1198         emu->card_capabilities = c;
1199         if (c->subsystem && !subsystem)
1200                 snd_printdd("Sound card name=%s\n", c->name);
1201         else if (subsystem)
1202                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1203                         c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1204         else
1205                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1206                         c->name, pci->vendor, pci->device, emu->serial);
1207
1208         if (!*card->id && c->id) {
1209                 int i, n = 0;
1210                 strlcpy(card->id, c->id, sizeof(card->id));
1211                 for (;;) {
1212                         for (i = 0; i < snd_ecards_limit; i++) {
1213                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1214                                         break;
1215                         }
1216                         if (i >= snd_ecards_limit)
1217                                 break;
1218                         n++;
1219                         if (n >= SNDRV_CARDS)
1220                                 break;
1221                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1222                 }
1223         }
1224
1225         is_audigy = emu->audigy = c->emu10k2_chip;
1226
1227         /* set the DMA transfer mask */
1228         emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1229         if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1230             pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1231                 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1232                 kfree(emu);
1233                 pci_disable_device(pci);
1234                 return -ENXIO;
1235         }
1236         if (is_audigy)
1237                 emu->gpr_base = A_FXGPREGBASE;
1238         else
1239                 emu->gpr_base = FXGPREGBASE;
1240
1241         if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1242                 kfree(emu);
1243                 pci_disable_device(pci);
1244                 return err;
1245         }
1246         emu->port = pci_resource_start(pci, 0);
1247
1248         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_DISABLED|IRQF_SHARED, "EMU10K1", (void *)emu)) {
1249                 err = -EBUSY;
1250                 goto error;
1251         }
1252         emu->irq = pci->irq;
1253
1254         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1255         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1256                                 32 * 1024, &emu->ptb_pages) < 0) {
1257                 err = -ENOMEM;
1258                 goto error;
1259         }
1260
1261         emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
1262         emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
1263         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1264                 err = -ENOMEM;
1265                 goto error;
1266         }
1267
1268         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1269                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1270                 err = -ENOMEM;
1271                 goto error;
1272         }
1273         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1274         if (emu->memhdr == NULL) {
1275                 err = -ENOMEM;
1276                 goto error;
1277         }
1278         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1279                 sizeof(struct snd_util_memblk);
1280
1281         pci_set_master(pci);
1282
1283         emu->fx8010.fxbus_mask = 0x303f;
1284         if (extin_mask == 0)
1285                 extin_mask = 0x3fcf;
1286         if (extout_mask == 0)
1287                 extout_mask = 0x7fff;
1288         emu->fx8010.extin_mask = extin_mask;
1289         emu->fx8010.extout_mask = extout_mask;
1290         emu->enable_ir = enable_ir;
1291
1292         if (emu->card_capabilities->ecard) {
1293                 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1294                         goto error;
1295         } else if (emu->card_capabilities->ca_cardbus_chip) {
1296                 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1297                         goto error;
1298         } else if (emu->card_capabilities->emu1212m) {
1299                 if ((err = snd_emu10k1_emu1212m_init(emu)) < 0) {
1300                         snd_emu10k1_free(emu);
1301                         return err;
1302                 }
1303         } else {
1304                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1305                         does not support this, it shouldn't do any harm */
1306                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1307         }
1308
1309         /* initialize TRAM setup */
1310         emu->fx8010.itram_size = (16 * 1024)/2;
1311         emu->fx8010.etram_pages.area = NULL;
1312         emu->fx8010.etram_pages.bytes = 0;
1313
1314         /*
1315          *  Init to 0x02109204 :
1316          *  Clock accuracy    = 0     (1000ppm)
1317          *  Sample Rate       = 2     (48kHz)
1318          *  Audio Channel     = 1     (Left of 2)
1319          *  Source Number     = 0     (Unspecified)
1320          *  Generation Status = 1     (Original for Cat Code 12)
1321          *  Cat Code          = 12    (Digital Signal Mixer)
1322          *  Mode              = 0     (Mode 0)
1323          *  Emphasis          = 0     (None)
1324          *  CP                = 1     (Copyright unasserted)
1325          *  AN                = 0     (Audio data)
1326          *  P                 = 0     (Consumer)
1327          */
1328         emu->spdif_bits[0] = emu->spdif_bits[1] =
1329                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1330                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1331                 SPCS_GENERATIONSTATUS | 0x00001200 |
1332                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1333
1334         emu->reserved_page = (struct snd_emu10k1_memblk *)
1335                 snd_emu10k1_synth_alloc(emu, 4096);
1336         if (emu->reserved_page)
1337                 emu->reserved_page->map_locked = 1;
1338
1339         /* Clear silent pages and set up pointers */
1340         memset(emu->silent_page.area, 0, PAGE_SIZE);
1341         silent_page = emu->silent_page.addr << 1;
1342         for (idx = 0; idx < MAXPAGES; idx++)
1343                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1344
1345         /* set up voice indices */
1346         for (idx = 0; idx < NUM_G; idx++) {
1347                 emu->voices[idx].emu = emu;
1348                 emu->voices[idx].number = idx;
1349         }
1350
1351         if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1352                 goto error;
1353 #ifdef CONFIG_PM
1354         if ((err = alloc_pm_buffer(emu)) < 0)
1355                 goto error;
1356 #endif
1357
1358         /*  Initialize the effect engine */
1359         if ((err = snd_emu10k1_init_efx(emu)) < 0)
1360                 goto error;
1361         snd_emu10k1_audio_enable(emu);
1362
1363         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1364                 goto error;
1365
1366 #ifdef CONFIG_PROC_FS
1367         snd_emu10k1_proc_init(emu);
1368 #endif
1369
1370         snd_card_set_dev(card, &pci->dev);
1371         *remu = emu;
1372         return 0;
1373
1374  error:
1375         snd_emu10k1_free(emu);
1376         return err;
1377 }
1378
1379 #ifdef CONFIG_PM
1380 static unsigned char saved_regs[] = {
1381         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1382         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1383         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1384         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1385         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1386         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1387         0xff /* end */
1388 };
1389 static unsigned char saved_regs_audigy[] = {
1390         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1391         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1392         0xff /* end */
1393 };
1394
1395 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1396 {
1397         int size;
1398
1399         size = ARRAY_SIZE(saved_regs);
1400         if (emu->audigy)
1401                 size += ARRAY_SIZE(saved_regs_audigy);
1402         emu->saved_ptr = vmalloc(4 * NUM_G * size);
1403         if (! emu->saved_ptr)
1404                 return -ENOMEM;
1405         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1406                 return -ENOMEM;
1407         if (emu->card_capabilities->ca0151_chip &&
1408             snd_p16v_alloc_pm_buffer(emu) < 0)
1409                 return -ENOMEM;
1410         return 0;
1411 }
1412
1413 static void free_pm_buffer(struct snd_emu10k1 *emu)
1414 {
1415         vfree(emu->saved_ptr);
1416         snd_emu10k1_efx_free_pm_buffer(emu);
1417         if (emu->card_capabilities->ca0151_chip)
1418                 snd_p16v_free_pm_buffer(emu);
1419 }
1420
1421 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1422 {
1423         int i;
1424         unsigned char *reg;
1425         unsigned int *val;
1426
1427         val = emu->saved_ptr;
1428         for (reg = saved_regs; *reg != 0xff; reg++)
1429                 for (i = 0; i < NUM_G; i++, val++)
1430                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
1431         if (emu->audigy) {
1432                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1433                         for (i = 0; i < NUM_G; i++, val++)
1434                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1435         }
1436         if (emu->audigy)
1437                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1438         emu->saved_hcfg = inl(emu->port + HCFG);
1439 }
1440
1441 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1442 {
1443         if (emu->card_capabilities->ecard)
1444                 snd_emu10k1_ecard_init(emu);
1445         else if (emu->card_capabilities->ca_cardbus_chip)
1446                 snd_emu10k1_cardbus_init(emu);
1447         else if (emu->card_capabilities->emu1212m)
1448                 snd_emu10k1_emu1212m_init(emu);
1449         else
1450                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1451         snd_emu10k1_init(emu, emu->enable_ir, 1);
1452 }
1453
1454 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1455 {
1456         int i;
1457         unsigned char *reg;
1458         unsigned int *val;
1459
1460         snd_emu10k1_audio_enable(emu);
1461
1462         /* resore for spdif */
1463         if (emu->audigy)
1464                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
1465         outl(emu->saved_hcfg, emu->port + HCFG);
1466
1467         val = emu->saved_ptr;
1468         for (reg = saved_regs; *reg != 0xff; reg++)
1469                 for (i = 0; i < NUM_G; i++, val++)
1470                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
1471         if (emu->audigy) {
1472                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1473                         for (i = 0; i < NUM_G; i++, val++)
1474                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1475         }
1476 }
1477 #endif