1 /* (C) 2000 Guenter Geiger <geiger@debian.org>
2 with copy/pastes from the driver of Winfried Ritsch <ritsch@iem.kug.ac.at>
7 * 10 Jan 2001: 0.1 initial version
8 * 19 Jan 2001: 0.2 fixed bug in select()
9 * 27 Apr 2001: 0.3 more than one card usable
10 * 11 May 2001: 0.4 fixed for SMP, included into kernel source tree
11 * 17 May 2001: 0.5 draining code didn't work on new cards
12 * 18 May 2001: 0.6 remove synchronize_irq() call
13 * 17 Jul 2001: 0.7 updated xrmectrl to make it work for newer cards
14 * 2 feb 2002: 0.8 fixed pci device handling, see below for patches from Heiko (Thanks!)
15 Marcus Meissner <Marcus.Meissner@caldera.de>
17 Modifications - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
18 HP20020108 fixed handling of "large" read()
19 HP20020116 towards REV 1.5 support, based on ALSA's card-rme9652.c
20 HP20020118 made mixer ioctl and handling of devices>1 more safe
21 HP20020201 fixed handling of "large" read() properly
22 added REV 1.5 S/P-DIF receiver support
23 SNDCTL_DSP_SPEED now returns the actual speed
24 * 10 Aug 2002: added synchronize_irq() again
27 - test more than one card --- done
28 - check for pci IOREGION (see es1370) in rme96xx_probe ??
31 - mixer mmap interface
33 - get rid of noise upon first open (why ??)
34 - allow multiple open (at least for read)
35 - allow multiple open for non overlapping regions
36 - recheck the multiple devices part (offsets of different devices, etc)
37 - do decent draining in _release --- done
39 - what about using fragstotal>2 for small fragsize? (HP20020118)
40 - add support for AFMT_S32_LE
44 #define RMEVERSION "0.8"
47 #include <linux/version.h>
48 #include <linux/module.h>
49 #include <linux/string.h>
50 #include <linux/sched.h>
51 #include <linux/sound.h>
52 #include <linux/soundcard.h>
53 #include <linux/pci.h>
54 #include <linux/smp_lock.h>
55 #include <linux/delay.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/init.h>
59 #include <linux/interrupt.h>
60 #include <linux/poll.h>
61 #include <linux/wait.h>
70 static int devices = 1;
71 module_param(devices, int, 0);
72 MODULE_PARM_DESC(devices, "number of dsp devices allocated by the driver");
75 MODULE_AUTHOR("Guenter Geiger, geiger@debian.org");
76 MODULE_DESCRIPTION("RME9652/36 \"Hammerfall\" Driver");
77 MODULE_LICENSE("GPL");
81 #define DBG(x) printk("RME_DEBUG:");x
82 #define COMM(x) printk("RME_COMM: " x "\n");
84 #define DBG(x) while (0) {}
88 /*--------------------------------------------------------------------------
89 Preporcessor Macros and Definitions
90 --------------------------------------------------------------------------*/
92 #define RME96xx_MAGIC 0x6473
94 /* Registers-Space in offsets from base address with 16MByte size */
96 #define RME96xx_IO_EXTENT 16l*1024l*1024l
97 #define RME96xx_CHANNELS_PER_CARD 26
99 /* Write - Register */
101 /* 0,4,8,12,16,20,24,28 ... hardware init (erasing fifo-pointer intern) */
102 #define RME96xx_num_of_init_regs 8
104 #define RME96xx_init_buffer (0/4)
105 #define RME96xx_play_buffer (32/4) /* pointer to 26x64kBit RAM from mainboard */
106 #define RME96xx_rec_buffer (36/4) /* pointer to 26x64kBit RAM from mainboard */
107 #define RME96xx_control_register (64/4) /* exact meaning see below */
108 #define RME96xx_irq_clear (96/4) /* irq acknowledge */
109 #define RME96xx_time_code (100/4) /* if used with alesis adat */
110 #define RME96xx_thru_base (128/4) /* 132...228 Thru for 26 channels */
111 #define RME96xx_thru_channels RME96xx_CHANNELS_PER_CARD
115 #define RME96xx_status_register 0 /* meaning see below */
119 /* Status Register: */
120 /* ------------------------------------------------------------------------ */
121 #define RME96xx_IRQ 0x0000001 /* IRQ is High if not reset by RMExx_irq_clear */
122 #define RME96xx_lock_2 0x0000002 /* ADAT 3-PLL: 1=locked, 0=unlocked */
123 #define RME96xx_lock_1 0x0000004 /* ADAT 2-PLL: 1=locked, 0=unlocked */
124 #define RME96xx_lock_0 0x0000008 /* ADAT 1-PLL: 1=locked, 0=unlocked */
126 #define RME96xx_fs48 0x0000010 /* sample rate 0 ...44.1/88.2, 1 ... 48/96 Khz */
127 #define RME96xx_wsel_rd 0x0000020 /* if Word-Clock is used and valid then 1 */
128 #define RME96xx_buf_pos1 0x0000040 /* Bit 6..15 : Position of buffer-pointer in 64Bytes-blocks */
129 #define RME96xx_buf_pos2 0x0000080 /* resolution +/- 1 64Byte/block (since 64Bytes bursts) */
131 #define RME96xx_buf_pos3 0x0000100 /* 10 bits = 1024 values */
132 #define RME96xx_buf_pos4 0x0000200 /* if we mask off the first 6 bits, we can take the status */
133 #define RME96xx_buf_pos5 0x0000400 /* register as sample counter in the hardware buffer */
134 #define RME96xx_buf_pos6 0x0000800
136 #define RME96xx_buf_pos7 0x0001000
137 #define RME96xx_buf_pos8 0x0002000
138 #define RME96xx_buf_pos9 0x0004000
139 #define RME96xx_buf_pos10 0x0008000
141 #define RME96xx_sync_2 0x0010000 /* if ADAT-IN3 synced to system clock */
142 #define RME96xx_sync_1 0x0020000 /* if ADAT-IN2 synced to system clock */
143 #define RME96xx_sync_0 0x0040000 /* if ADAT-IN1 synced to system clock */
144 #define RME96xx_DS_rd 0x0080000 /* 1=Double Speed, 0=Normal Speed */
146 #define RME96xx_tc_busy 0x0100000 /* 1=time-code copy in progress (960ms) */
147 #define RME96xx_tc_out 0x0200000 /* time-code out bit */
148 #define RME96xx_F_0 0x0400000 /* 000=64kHz, 100=88.2kHz, 011=96kHz */
149 #define RME96xx_F_1 0x0800000 /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
151 #define RME96xx_F_2 0x1000000 /* 001=Rev 1.5+ external Crystal Chip */
152 #define RME96xx_ERF 0x2000000 /* Error-Flag of SDPIF Receiver (1=No Lock)*/
153 #define RME96xx_buffer_id 0x4000000 /* toggles by each interrupt on rec/play */
154 #define RME96xx_tc_valid 0x8000000 /* 1 = a signal is detected on time-code input */
155 #define RME96xx_SPDIF_READ 0x10000000 /* byte available from Rev 1.5+ SPDIF interface */
157 /* Status Register Fields */
159 #define RME96xx_lock (RME96xx_lock_0|RME96xx_lock_1|RME96xx_lock_2)
160 #define RME96xx_sync (RME96xx_sync_0|RME96xx_sync_1|RME96xx_sync_2)
161 #define RME96xx_F (RME96xx_F_0|RME96xx_F_1|RME96xx_F_2)
162 #define rme96xx_decode_spdif_rate(x) ((x)>>22)
164 /* Bit 6..15 : h/w buffer pointer */
165 #define RME96xx_buf_pos 0x000FFC0
166 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
167 Rev G EEPROMS and Rev 1.5 cards or later.
169 #define RME96xx_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME96xx_buf_pos))
172 /* Control-Register: */
173 /*--------------------------------------------------------------------------------*/
175 #define RME96xx_start_bit 0x0001 /* start record/play */
176 #define RME96xx_latency0 0x0002 /* Buffer size / latency */
177 #define RME96xx_latency1 0x0004 /* buffersize = 512Bytes * 2^n */
178 #define RME96xx_latency2 0x0008 /* 0=64samples ... 7=8192samples */
180 #define RME96xx_Master 0x0010 /* Clock Mode 1=Master, 0=Slave/Auto */
181 #define RME96xx_IE 0x0020 /* Interupt Enable */
182 #define RME96xx_freq 0x0040 /* samplerate 0=44.1/88.2, 1=48/96 kHz*/
183 #define RME96xx_freq1 0x0080 /* samplerate 0=32 kHz, 1=other rates ??? (from ALSA, but may be wrong) */
184 #define RME96xx_DS 0x0100 /* double speed 0=44.1/48, 1=88.2/96 Khz */
185 #define RME96xx_PRO 0x0200 /* SPDIF-OUT 0=consumer, 1=professional */
186 #define RME96xx_EMP 0x0400 /* SPDIF-OUT emphasis 0=off, 1=on */
187 #define RME96xx_Dolby 0x0800 /* SPDIF-OUT non-audio bit 1=set, 0=unset */
189 #define RME96xx_opt_out 0x1000 /* use 1st optical OUT as SPDIF: 1=yes, 0=no */
190 #define RME96xx_wsel 0x2000 /* use Wordclock as sync (overwrites master) */
191 #define RME96xx_inp_0 0x4000 /* SPDIF-IN 00=optical (ADAT1), */
192 #define RME96xx_inp_1 0x8000 /* 01=coaxial (Cinch), 10=internal CDROM */
194 #define RME96xx_SyncRef0 0x10000 /* preferred sync-source in autosync */
195 #define RME96xx_SyncRef1 0x20000 /* 00=ADAT1, 01=ADAT2, 10=ADAT3, 11=SPDIF */
197 #define RME96xx_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w SPDIF receiver */
198 #define RME96xx_SPDIF_SELECT (1<<19)
199 #define RME96xx_SPDIF_CLOCK (1<<20)
200 #define RME96xx_SPDIF_WRITE (1<<21)
201 #define RME96xx_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
204 #define RME96xx_ctrl_init (RME96xx_latency0 |\
210 /* Control register fields and shortcuts */
212 #define RME96xx_latency (RME96xx_latency0|RME96xx_latency1|RME96xx_latency2)
213 #define RME96xx_inp (RME96xx_inp_0|RME96xx_inp_1)
214 #define RME96xx_SyncRef (RME96xx_SyncRef0|RME96xx_SyncRef1)
215 #define RME96xx_mixer_allowed (RME96xx_Master|RME96xx_PRO|RME96xx_EMP|RME96xx_Dolby|RME96xx_opt_out|RME96xx_wsel|RME96xx_inp|RME96xx_SyncRef|RME96xx_ADAT1_INTERNAL)
217 /* latency = 512Bytes * 2^n, where n is made from Bit3 ... Bit1 (??? HP20020201) */
219 #define RME96xx_SET_LATENCY(x) (((x)&0x7)<<1)
220 #define RME96xx_GET_LATENCY(x) (((x)>>1)&0x7)
221 #define RME96xx_SET_inp(x) (((x)&0x3)<<14)
222 #define RME96xx_GET_inp(x) (((x)>>14)&0x3)
223 #define RME96xx_SET_SyncRef(x) (((x)&0x3)<<17)
224 #define RME96xx_GET_SyncRef(x) (((x)>>17)&0x3)
228 #define RME96xx_BYTES_PER_SAMPLE 4 /* sizeof(u32) */
229 #define RME_16K 16*1024
231 #define RME96xx_DMA_MAX_SAMPLES (RME_16K)
232 #define RME96xx_DMA_MAX_SIZE (RME_16K * RME96xx_BYTES_PER_SAMPLE)
233 #define RME96xx_DMA_MAX_SIZE_ALL (RME96xx_DMA_MAX_SIZE * RME96xx_CHANNELS_PER_CARD)
235 #define RME96xx_NUM_OF_FRAGMENTS 2
236 #define RME96xx_FRAGMENT_MAX_SIZE (RME96xx_DMA_MAX_SIZE/2)
237 #define RME96xx_FRAGMENT_MAX_SAMPLES (RME96xx_DMA_MAX_SAMPLES/2)
238 #define RME96xx_MAX_LATENCY 7 /* 16k samples */
241 #define RME96xx_MAX_DEVS 4 /* we provide some OSS stereodevs */
242 #define RME96xx_MASK_DEVS 0x3 /* RME96xx_MAX_DEVS-1 */
244 #define RME_MESS "rme96xx:"
245 /*------------------------------------------------------------------------
246 Types, struct and function declarations
247 ------------------------------------------------------------------------*/
250 /* --------------------------------------------------------------------- */
252 static const char invalid_magic[] = KERN_CRIT RME_MESS" invalid magic value\n";
254 #define VALIDATE_STATE(s) \
256 if (!(s) || (s)->magic != RME96xx_MAGIC) { \
257 printk(invalid_magic); \
262 /* --------------------------------------------------------------------- */
265 static struct file_operations rme96xx_audio_fops;
266 static struct file_operations rme96xx_mixer_fops;
269 typedef int32_t raw_sample_t;
271 typedef struct _rme96xx_info {
273 /* hardware settings */
275 struct pci_dev * pcidev; /* pci_dev structure */
276 unsigned long __iomem *iobase;
279 /* list of rme96xx devices */
280 struct list_head devs;
284 u32 *recbuf; /* memory for rec buffer */
285 u32 *playbuf; /* memory for play buffer */
287 u32 control_register;
289 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
291 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
292 char *card_name; /* hammerfall or hammerfall light names */
294 int open_count; /* unused ??? HP20020201 */
298 unsigned int fragsize;
301 int hwptr; /* can be negativ because of pci burst offset */
302 unsigned int hwbufid; /* set by interrupt, buffer which is written/read now */
308 int inchannels; /* number of channels for device */
309 int outchannels; /* number of channels for device */
310 int mono; /* if true, we play mono on 2 channels */
311 int inoffset; /* which channel is considered the first one */
315 int opened; /* open() made */
316 int started; /* first write/read */
317 int mmapped; /* mmap */
320 struct _rme96xx_info *s;
322 /* pointer to read/write position in buffer */
326 unsigned error; /* over/underruns cleared on sync again */
328 /* waiting and locking */
329 wait_queue_head_t wait;
330 struct semaphore open_sem;
331 wait_queue_head_t open_wait;
333 } dma[RME96xx_MAX_DEVS];
335 int dspnum[RME96xx_MAX_DEVS]; /* register with sound subsystem */
336 int mixer; /* register with sound subsystem */
340 /* fiddling with the card (first level hardware control) */
342 static inline void rme96xx_set_ctrl(rme96xx_info* s,int mask)
345 s->control_register|=mask;
346 writel(s->control_register,s->iobase + RME96xx_control_register);
350 static inline void rme96xx_unset_ctrl(rme96xx_info* s,int mask)
353 s->control_register&=(~mask);
354 writel(s->control_register,s->iobase + RME96xx_control_register);
358 static inline int rme96xx_get_sample_rate_status(rme96xx_info* s)
362 status = readl(s->iobase + RME96xx_status_register);
363 val = (status & RME96xx_fs48) ? 48000 : 44100;
364 if (status & RME96xx_DS_rd)
369 static inline int rme96xx_get_sample_rate_ctrl(rme96xx_info* s)
372 val = (s->control_register & RME96xx_freq) ? 48000 : 44100;
373 if (s->control_register & RME96xx_DS)
379 /* code from ALSA card-rme9652.c for rev 1.5 SPDIF receiver HP 20020201 */
381 static void rme96xx_spdif_set_bit (rme96xx_info* s, int mask, int onoff)
384 s->control_register |= mask;
386 s->control_register &= ~mask;
388 writel(s->control_register,s->iobase + RME96xx_control_register);
391 static void rme96xx_spdif_write_byte (rme96xx_info* s, const int val)
396 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
398 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 1);
400 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 0);
402 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
403 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
407 static int rme96xx_spdif_read_byte (rme96xx_info* s)
415 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
416 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
417 if (readl(s->iobase + RME96xx_status_register) & RME96xx_SPDIF_READ)
419 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
425 static void rme96xx_write_spdif_codec (rme96xx_info* s, const int address, const int data)
427 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
428 rme96xx_spdif_write_byte (s, 0x20);
429 rme96xx_spdif_write_byte (s, address);
430 rme96xx_spdif_write_byte (s, data);
431 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
435 static int rme96xx_spdif_read_codec (rme96xx_info* s, const int address)
439 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
440 rme96xx_spdif_write_byte (s, 0x20);
441 rme96xx_spdif_write_byte (s, address);
442 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
443 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
445 rme96xx_spdif_write_byte (s, 0x21);
446 ret = rme96xx_spdif_read_byte (s);
447 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
452 static void rme96xx_initialize_spdif_receiver (rme96xx_info* s)
454 /* XXX what unsets this ? */
455 /* no idea ??? HP 20020201 */
457 s->control_register |= RME96xx_SPDIF_RESET;
459 rme96xx_write_spdif_codec (s, 4, 0x40);
460 rme96xx_write_spdif_codec (s, 17, 0x13);
461 rme96xx_write_spdif_codec (s, 6, 0x02);
464 static inline int rme96xx_spdif_sample_rate (rme96xx_info *s, int *spdifrate)
466 unsigned int rate_bits;
469 if (readl(s->iobase + RME96xx_status_register) & RME96xx_ERF) {
470 return -1; /* error condition */
473 if (s->hw_rev == 15) {
477 x = rme96xx_spdif_read_codec (s, 30);
484 if (y > 30400 && y < 33600) {ret = 32000; *spdifrate = 0x7;}
485 else if (y > 41900 && y < 46000) {ret = 44100; *spdifrate = 0x6;}
486 else if (y > 46000 && y < 50400) {ret = 48000; *spdifrate = 0x5;}
487 else if (y > 60800 && y < 67200) {ret = 64000; *spdifrate = 0x0;}
488 else if (y > 83700 && y < 92000) {ret = 88200; *spdifrate = 0x4;}
489 else if (y > 92000 && y < 100000) {ret = 96000; *spdifrate = 0x3;}
490 else {ret = 0; *spdifrate = 0x1;}
494 rate_bits = readl(s->iobase + RME96xx_status_register) & RME96xx_F;
496 switch (*spdifrate = rme96xx_decode_spdif_rate(rate_bits)) {
522 /* was an ALSA warning ...
523 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
524 s->card_name, rate_bits);
531 /* end of code from ALSA card-rme9652.c */
535 /* the hwbuf in the status register seems to have some jitter, to get rid of
536 it, we first only let the numbers grow, to be on the secure side we
537 subtract a certain amount RME96xx_BURSTBYTES from the resulting number */
539 /* the function returns the hardware pointer in bytes */
540 #define RME96xx_BURSTBYTES -64 /* bytes by which hwptr could be off */
542 static inline int rme96xx_gethwptr(rme96xx_info* s,int exact)
547 /* the hwptr seems to be rather unreliable :(, so we don't use it */
548 spin_lock_irqsave(&s->lock,flags);
550 hwp = readl(s->iobase + RME96xx_status_register) & 0xffc0;
551 s->hwptr = (hwp < s->hwptr) ? s->hwptr : hwp;
554 spin_unlock_irqrestore(&s->lock,flags);
555 return (s->hwptr+RME96xx_BURSTBYTES) & ((s->fragsize<<1)-1);
557 return (s->hwbufid ? s->fragsize : 0);
560 static inline void rme96xx_setlatency(rme96xx_info* s,int l)
563 s->fragsize = 1<<(8+l);
564 rme96xx_unset_ctrl(s,RME96xx_latency);
565 rme96xx_set_ctrl(s,RME96xx_SET_LATENCY(l));
569 static void rme96xx_clearbufs(struct dmabuf* dma)
575 for(i=0;i<devices;i++) {
576 for (j=0;j<dma->outchannels + dma->mono;j++)
577 memset(&dma->s->playbuf[(dma->outoffset + j)*RME96xx_DMA_MAX_SAMPLES],
578 0, RME96xx_DMA_MAX_SIZE);
580 spin_lock_irqsave(&dma->s->lock,flags);
583 spin_unlock_irqrestore(&dma->s->lock,flags);
586 static int rme96xx_startcard(rme96xx_info *s,int stop)
592 if(s->control_register & RME96xx_IE){
593 /* disable interrupt first */
595 rme96xx_unset_ctrl( s,RME96xx_start_bit );
597 rme96xx_unset_ctrl( s,RME96xx_IE);
598 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
600 spin_unlock_irqrestore(&s->lock,flags);
602 COMM("Sound card stopped");
606 COMM ("interrupt disabled");
607 /* first initialize all pointers on card */
608 for(i=0;i<RME96xx_num_of_init_regs;i++){
609 writel(0,s->iobase + i);
612 COMM ("regs cleaned");
614 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
618 spin_unlock_irqrestore(&s->lock,flags);
620 rme96xx_set_ctrl( s, RME96xx_IE | RME96xx_start_bit);
623 COMM("Sound card started");
629 static inline int rme96xx_getospace(struct dmabuf * dma, unsigned int hwp)
635 spin_lock_irqsave(&dma->s->lock,flags);
636 swptr = dma->writeptr;
640 cnt = ((dma->s->fragsize<<1) - swptr);
642 spin_unlock_irqrestore(&dma->s->lock,flags);
646 static inline int rme96xx_getispace(struct dmabuf * dma, unsigned int hwp)
652 spin_lock_irqsave(&dma->s->lock,flags);
653 swptr = dma->readptr;
657 cnt = ((dma->s->fragsize<<1) - swptr);
659 spin_unlock_irqrestore(&dma->s->lock,flags);
664 static inline int rme96xx_copyfromuser(struct dmabuf* dma,const char __user * buffer,int count,int hop)
666 int swptr = dma->writeptr;
667 switch (dma->format) {
668 case AFMT_S32_BLOCKED:
670 char __user * buf = (char __user *)buffer;
671 int cnt = count/dma->outchannels;
673 for (i=0;i < dma->outchannels;i++) {
674 char* hwbuf =(char*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
677 if (copy_from_user(hwbuf,buf, cnt))
687 int cnt = count/dma->outchannels;
688 for (i=0;i < dma->outchannels + dma->mono;i++) {
689 short __user * sbuf = (short __user *)buffer + i*(!dma->mono);
690 short* hwbuf =(short*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
692 for (j=0;j<(cnt>>1);j++) {
693 hwbuf++; /* skip the low 16 bits */
694 __get_user(*hwbuf++,sbuf++);
695 sbuf+=(dma->outchannels-1);
702 printk(RME_MESS" unsupported format\n");
706 swptr&=((dma->s->fragsize<<1) -1);
707 dma->writeptr = swptr;
712 /* The count argument is the number of bytes */
713 static inline int rme96xx_copytouser(struct dmabuf* dma,const char __user* buffer,int count,int hop)
715 int swptr = dma->readptr;
716 switch (dma->format) {
717 case AFMT_S32_BLOCKED:
719 char __user * buf = (char __user *)buffer;
720 int cnt = count/dma->inchannels;
723 for (i=0;i < dma->inchannels;i++) {
724 char* hwbuf =(char*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
727 if (copy_to_user(buf,hwbuf,cnt))
737 int cnt = count/dma->inchannels;
738 for (i=0;i < dma->inchannels;i++) {
739 short __user * sbuf = (short __user *)buffer + i;
740 short* hwbuf =(short*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
742 for (j=0;j<(cnt>>1);j++) {
744 __put_user(*hwbuf++,sbuf++);
745 sbuf+=(dma->inchannels-1);
752 printk(RME_MESS" unsupported format\n");
756 swptr&=((dma->s->fragsize<<1) -1);
757 dma->readptr = swptr;
762 static irqreturn_t rme96xx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
765 rme96xx_info *s = (rme96xx_info *)dev_id;
770 status = readl(s->iobase + RME96xx_status_register);
771 if (!(status & RME96xx_IRQ)) {
775 spin_lock_irqsave(&s->lock,flags);
776 writel(0,s->iobase + RME96xx_irq_clear);
778 s->hwbufid = (status & RME96xx_buffer_id)>>26;
779 if ((status & 0xffc0) <= 256) s->hwptr = 0;
780 for(i=0;i<devices;i++)
784 wake_up(&(db->wait));
786 spin_unlock_irqrestore(&s->lock,flags);
792 /*----------------------------------------------------------------------------
793 PCI detection and module initialization stuff
794 ----------------------------------------------------------------------------*/
796 static void* busmaster_malloc(int size) {
797 int pg; /* 2 s exponent of memory size */
800 DBG(printk("kernel malloc pages ..\n"));
802 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
804 buf = (char *) __get_free_pages(GFP_KERNEL | GFP_DMA, pg);
807 struct page* page, *last_page;
809 page = virt_to_page(buf);
810 last_page = page + (1 << pg);
811 DBG(printk("setting reserved bit\n"));
812 while (page < last_page) {
813 SetPageReserved(page);
818 DBG(printk("allocated %ld",(long)buf));
822 static void busmaster_free(void* ptr,int size) {
824 struct page* page, *last_page;
829 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
831 page = virt_to_page(ptr);
832 last_page = page + (1 << pg);
833 while (page < last_page) {
834 ClearPageReserved(page);
837 DBG(printk("freeing pages\n"));
838 free_pages((unsigned long) ptr, pg);
839 DBG(printk("done\n"));
842 /* initialize those parts of the info structure which are not pci detectable resources */
844 static int rme96xx_dmabuf_init(rme96xx_info * s,struct dmabuf* dma,int ioffset,int ooffset) {
846 init_MUTEX(&dma->open_sem);
847 init_waitqueue_head(&dma->open_wait);
848 init_waitqueue_head(&dma->wait);
852 dma->format = AFMT_S32_BLOCKED;
853 dma->formatshift = 0;
854 dma->inchannels = dma->outchannels = 1;
855 dma->inoffset = ioffset;
856 dma->outoffset = ooffset;
864 rme96xx_clearbufs(dma);
869 static int rme96xx_init(rme96xx_info* s)
875 DBG(printk("%s\n", __FUNCTION__));
878 s->magic = RME96xx_MAGIC;
880 spin_lock_init(&s->lock);
882 COMM ("setup busmaster memory")
883 s->recbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
884 s->playbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
886 if (!s->recbuf || !s->playbuf) {
887 printk(KERN_ERR RME_MESS" Unable to allocate busmaster memory\n");
891 COMM ("setting rec and playbuffers")
893 writel((u32) virt_to_bus(s->recbuf),s->iobase + RME96xx_rec_buffer);
894 writel((u32) virt_to_bus(s->playbuf),s->iobase + RME96xx_play_buffer);
896 COMM ("initializing control register")
897 rme96xx_unset_ctrl(s,0xffffffff);
898 rme96xx_set_ctrl(s,RME96xx_ctrl_init);
901 COMM ("setup devices")
902 for (i=0;i < devices;i++) {
903 struct dmabuf * dma = &s->dma[i];
904 rme96xx_dmabuf_init(s,dma,2*i,2*i);
907 /* code from ALSA card-rme9652.c HP 20020201 */
908 /* Determine the h/w rev level of the card. This seems like
909 a particularly kludgy way to encode it, but its what RME
910 chose to do, so we follow them ...
913 status = readl(s->iobase + RME96xx_status_register);
914 if (rme96xx_decode_spdif_rate(status&RME96xx_F) == 1) {
920 /* Differentiate between the standard Hammerfall, and the
921 "Light", which does not have the expansion board. This
922 method comes from information received from Mathhias
923 Clausen at RME. Display the EEPROM and h/w revID where
927 pci_read_config_word(s->pcidev, PCI_CLASS_REVISION, &rev);
928 switch (rev & 0xff) {
929 case 8: /* original eprom */
930 if (s->hw_rev == 15) {
931 s->card_name = "RME Digi9636 (Rev 1.5)";
933 s->card_name = "RME Digi9636";
936 case 9: /* W36_G EPROM */
937 s->card_name = "RME Digi9636 (Rev G)";
939 case 4: /* W52_G EPROM */
940 s->card_name = "RME Digi9652 (Rev G)";
943 case 3: /* original eprom */
944 if (s->hw_rev == 15) {
945 s->card_name = "RME Digi9652 (Rev 1.5)";
947 s->card_name = "RME Digi9652";
952 printk(KERN_INFO RME_MESS" detected %s (hw_rev %d)\n",s->card_name,s->hw_rev);
955 rme96xx_initialize_spdif_receiver (s);
958 rme96xx_setlatency(s,7);
960 printk(KERN_INFO RME_MESS" card %d initialized\n",numcards);
965 /* open uses this to figure out which device was opened .. this seems to be
966 unnecessary complex */
968 static LIST_HEAD(devs);
970 static int __devinit rme96xx_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
975 DBG(printk("%s\n", __FUNCTION__));
977 if (pcidev->irq == 0)
979 if (!pci_dma_supported(pcidev, 0xffffffff)) {
980 printk(KERN_WARNING RME_MESS" architecture does not support 32bit PCI busmaster DMA\n");
983 if (!(s = kmalloc(sizeof(rme96xx_info), GFP_KERNEL))) {
984 printk(KERN_WARNING RME_MESS" out of memory\n");
987 memset(s, 0, sizeof(rme96xx_info));
990 s->iobase = ioremap(pci_resource_start(pcidev, 0),RME96xx_IO_EXTENT);
991 s->irq = pcidev->irq;
993 DBG(printk("remapped iobase: %lx irq %d\n",(long)s->iobase,s->irq));
995 if (pci_enable_device(pcidev))
997 if (request_irq(s->irq, rme96xx_interrupt, SA_SHIRQ, "rme96xx", s)) {
998 printk(KERN_ERR RME_MESS" irq %u in use\n", s->irq);
1002 /* initialize the card */
1005 if (rme96xx_init(s) < 0) {
1006 printk(KERN_ERR RME_MESS" initialization failed\n");
1009 for (i=0;i<devices;i++) {
1010 if ((s->dspnum[i] = register_sound_dsp(&rme96xx_audio_fops, -1)) < 0)
1014 if ((s->mixer = register_sound_mixer(&rme96xx_mixer_fops, -1)) < 0)
1017 pci_set_drvdata(pcidev, s);
1018 pcidev->dma_mask = 0xffffffff; /* ????? */
1019 /* put it into driver list */
1020 list_add_tail(&s->devs, &devs);
1022 DBG(printk("initialization successful\n"));
1028 unregister_sound_dsp(s->dspnum[i]);
1036 static void __devexit rme96xx_remove(struct pci_dev *dev)
1039 rme96xx_info *s = pci_get_drvdata(dev);
1042 printk(KERN_ERR"device structure not valid\n");
1046 if (s->started) rme96xx_startcard(s,0);
1051 unregister_sound_dsp(s->dspnum[i]);
1054 unregister_sound_mixer(s->mixer);
1055 synchronize_irq(s->irq);
1057 busmaster_free(s->recbuf,RME96xx_DMA_MAX_SIZE_ALL);
1058 busmaster_free(s->playbuf,RME96xx_DMA_MAX_SIZE_ALL);
1060 pci_set_drvdata(dev, NULL);
1064 #ifndef PCI_VENDOR_ID_RME
1065 #define PCI_VENDOR_ID_RME 0x10ee
1067 #ifndef PCI_DEVICE_ID_RME9652
1068 #define PCI_DEVICE_ID_RME9652 0x3fc4
1071 #define PCI_ANY_ID 0
1074 static struct pci_device_id id_table[] = {
1076 .vendor = PCI_VENDOR_ID_RME,
1077 .device = PCI_DEVICE_ID_RME9652,
1078 .subvendor = PCI_ANY_ID,
1079 .subdevice = PCI_ANY_ID,
1084 MODULE_DEVICE_TABLE(pci, id_table);
1086 static struct pci_driver rme96xx_driver = {
1088 .id_table = id_table,
1089 .probe = rme96xx_probe,
1090 .remove = __devexit_p(rme96xx_remove),
1093 static int __init init_rme96xx(void)
1095 printk(KERN_INFO RME_MESS" version "RMEVERSION" time " __TIME__ " " __DATE__ "\n");
1096 devices = ((devices-1) & RME96xx_MASK_DEVS) + 1;
1097 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices);
1099 return pci_module_init(&rme96xx_driver);
1102 static void __exit cleanup_rme96xx(void)
1104 printk(KERN_INFO RME_MESS" unloading\n");
1105 pci_unregister_driver(&rme96xx_driver);
1108 module_init(init_rme96xx);
1109 module_exit(cleanup_rme96xx);
1115 /*--------------------------------------------------------------------------
1116 Implementation of file operations
1117 ---------------------------------------------------------------------------*/
1119 #define RME96xx_FMT (AFMT_S16_LE|AFMT_U8|AFMT_S32_BLOCKED)
1120 /* AFTM_U8 is not (yet?) supported ... HP20020201 */
1122 static int rme96xx_ioctl(struct inode *in, struct file *file, unsigned int cmd, unsigned long arg)
1124 struct dmabuf * dma = (struct dmabuf *)file->private_data;
1125 rme96xx_info *s = dma->s;
1126 unsigned long flags;
1127 audio_buf_info abinfo;
1131 void __user *argp = (void __user *)arg;
1132 int __user *p = argp;
1136 DBG(printk("ioctl %ud\n",cmd));
1139 case OSS_GETVERSION:
1140 return put_user(SOUND_VERSION, p);
1142 case SNDCTL_DSP_SYNC:
1144 if (file->f_mode & FMODE_WRITE)
1145 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1149 case SNDCTL_DSP_SETDUPLEX:
1152 case SNDCTL_DSP_GETCAPS:
1153 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1155 case SNDCTL_DSP_RESET:
1156 // rme96xx_clearbufs(dma);
1159 case SNDCTL_DSP_SPEED:
1160 if (get_user(val, p))
1163 /* generally it's not a problem if we change the speed
1164 if (dma->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
1167 spin_lock_irqsave(&s->lock, flags);
1172 rme96xx_unset_ctrl(s,RME96xx_freq);
1176 rme96xx_set_ctrl(s,RME96xx_freq);
1178 /* just report current rate as default
1179 e.g. use 0 to "select" current digital input rate
1181 rme96xx_unset_ctrl(s,RME96xx_freq);
1186 rme96xx_set_ctrl(s,RME96xx_DS);
1188 rme96xx_unset_ctrl(s,RME96xx_DS);
1189 /* set val to actual value HP 20020201 */
1190 /* NOTE: if not "Sync Master", reported rate might be not yet "updated" ... but I don't want to insert a long udelay() here */
1191 if ((s->control_register & RME96xx_Master) && !(s->control_register & RME96xx_wsel))
1192 val = rme96xx_get_sample_rate_ctrl(s);
1194 val = rme96xx_get_sample_rate_status(s);
1196 spin_unlock_irqrestore(&s->lock, flags);
1198 DBG(printk("speed set to %d\n",val));
1199 return put_user(val, p);
1201 case SNDCTL_DSP_STEREO: /* this plays a mono file on two channels */
1202 if (get_user(val, p))
1206 DBG(printk("setting to mono\n"));
1208 dma->inchannels = 1;
1209 dma->outchannels = 1;
1212 DBG(printk("setting to stereo\n"));
1214 dma->inchannels = 2;
1215 dma->outchannels = 2;
1218 case SNDCTL_DSP_CHANNELS:
1219 /* remember to check for resonable offset/channel pairs here */
1220 if (get_user(val, p))
1223 if (file->f_mode & FMODE_WRITE) {
1224 if (val > 0 && (dma->outoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1225 dma->outchannels = val;
1227 dma->outchannels = val = 2;
1228 DBG(printk("setting to outchannels %d\n",val));
1230 if (file->f_mode & FMODE_READ) {
1231 if (val > 0 && (dma->inoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1232 dma->inchannels = val;
1234 dma->inchannels = val = 2;
1235 DBG(printk("setting to inchannels %d\n",val));
1240 return put_user(val, p);
1242 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1243 return put_user(RME96xx_FMT, p);
1245 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1246 DBG(printk("setting to format %x\n",val));
1247 if (get_user(val, p))
1249 if (val != AFMT_QUERY) {
1250 if (val & RME96xx_FMT)
1252 switch (dma->format) {
1256 case AFMT_S32_BLOCKED:
1261 return put_user(dma->format, p);
1263 case SNDCTL_DSP_POST:
1266 case SNDCTL_DSP_GETTRIGGER:
1269 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1270 val |= PCM_ENABLE_INPUT;
1271 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1272 val |= PCM_ENABLE_OUTPUT;
1274 return put_user(val, p);
1276 case SNDCTL_DSP_SETTRIGGER:
1277 if (get_user(val, p))
1280 if (file->f_mode & FMODE_READ) {
1281 if (val & PCM_ENABLE_INPUT) {
1282 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1288 if (file->f_mode & FMODE_WRITE) {
1289 if (val & PCM_ENABLE_OUTPUT) {
1290 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1299 case SNDCTL_DSP_GETOSPACE:
1300 if (!(file->f_mode & FMODE_WRITE))
1303 val = rme96xx_gethwptr(dma->s,0);
1306 count = rme96xx_getospace(dma,val);
1307 if (!s->started) count = s->fragsize*2;
1308 abinfo.fragsize =(s->fragsize*dma->outchannels)>>dma->formatshift;
1309 abinfo.bytes = (count*dma->outchannels)>>dma->formatshift;
1310 abinfo.fragstotal = 2;
1311 abinfo.fragments = (count > s->fragsize);
1313 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1315 case SNDCTL_DSP_GETISPACE:
1316 if (!(file->f_mode & FMODE_READ))
1319 val = rme96xx_gethwptr(dma->s,0);
1321 count = rme96xx_getispace(dma,val);
1323 abinfo.fragsize = (s->fragsize*dma->inchannels)>>dma->formatshift;
1324 abinfo.bytes = (count*dma->inchannels)>>dma->formatshift;
1325 abinfo.fragstotal = 2;
1326 abinfo.fragments = count > s->fragsize;
1327 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1329 case SNDCTL_DSP_NONBLOCK:
1330 file->f_flags |= O_NONBLOCK;
1333 case SNDCTL_DSP_GETODELAY: /* What should this exactly do ? ,
1334 ATM it is just abinfo.bytes */
1335 if (!(file->f_mode & FMODE_WRITE))
1338 val = rme96xx_gethwptr(dma->s,0);
1339 count = val - dma->readptr;
1341 count += s->fragsize<<1;
1343 return put_user(count, p);
1346 /* check out how to use mmaped mode (can only be blocked !!!) */
1347 case SNDCTL_DSP_GETIPTR:
1348 if (!(file->f_mode & FMODE_READ))
1350 val = rme96xx_gethwptr(dma->s,0);
1351 spin_lock_irqsave(&s->lock,flags);
1352 cinfo.bytes = s->fragsize<<1;
1353 count = val - dma->readptr;
1355 count += s->fragsize<<1;
1357 cinfo.blocks = (count > s->fragsize);
1360 dma->readptr &= s->fragsize<<1;
1361 spin_unlock_irqrestore(&s->lock,flags);
1363 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1367 case SNDCTL_DSP_GETOPTR:
1368 if (!(file->f_mode & FMODE_READ))
1370 val = rme96xx_gethwptr(dma->s,0);
1371 spin_lock_irqsave(&s->lock,flags);
1372 cinfo.bytes = s->fragsize<<1;
1373 count = val - dma->writeptr;
1375 count += s->fragsize<<1;
1377 cinfo.blocks = (count > s->fragsize);
1380 dma->writeptr &= s->fragsize<<1;
1381 spin_unlock_irqrestore(&s->lock,flags);
1382 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1385 case SNDCTL_DSP_GETBLKSIZE:
1386 return put_user(s->fragsize, p);
1388 case SNDCTL_DSP_SETFRAGMENT:
1389 if (get_user(val, p))
1393 if (val < 0) val = 0;
1394 if (val > 7) val = 7;
1395 rme96xx_setlatency(s,val);
1398 case SNDCTL_DSP_SUBDIVIDE:
1400 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1401 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1403 if (get_user(val, p))
1405 if (val != 1 && val != 2 && val != 4)
1407 if (file->f_mode & FMODE_READ)
1408 s->dma_adc.subdivision = val;
1409 if (file->f_mode & FMODE_WRITE)
1410 s->dma_dac2.subdivision = val;
1414 case SOUND_PCM_READ_RATE:
1416 s->rate = rme96xx_get_sample_rate_status(s);
1417 return put_user(s->rate, p);
1419 case SOUND_PCM_READ_CHANNELS:
1420 return put_user(dma->outchannels, p);
1422 case SOUND_PCM_READ_BITS:
1423 switch (dma->format) {
1424 case AFMT_S32_BLOCKED:
1431 return put_user(val, p);
1433 case SOUND_PCM_WRITE_FILTER:
1434 case SNDCTL_DSP_SETSYNCRO:
1435 case SOUND_PCM_READ_FILTER:
1446 static int rme96xx_open(struct inode *in, struct file *f)
1448 int minor = iminor(in);
1449 struct list_head *list;
1453 DECLARE_WAITQUEUE(wait, current);
1455 DBG(printk("device num %d open\n",devnum));
1457 nonseekable_open(in, f);
1458 for (list = devs.next; ; list = list->next) {
1461 s = list_entry(list, rme96xx_info, devs);
1462 for (devnum=0; devnum<devices; devnum++)
1463 if (!((s->dspnum[devnum] ^ minor) & ~0xf))
1470 dma = &s->dma[devnum];
1471 f->private_data = dma;
1472 /* wait for device to become free */
1473 down(&dma->open_sem);
1474 while (dma->open_mode & f->f_mode) {
1475 if (f->f_flags & O_NONBLOCK) {
1479 add_wait_queue(&dma->open_wait, &wait);
1480 __set_current_state(TASK_INTERRUPTIBLE);
1483 remove_wait_queue(&dma->open_wait, &wait);
1484 set_current_state(TASK_RUNNING);
1485 if (signal_pending(current))
1486 return -ERESTARTSYS;
1487 down(&dma->open_sem);
1490 COMM ("hardware open")
1492 if (!dma->opened) rme96xx_dmabuf_init(dma->s,dma,dma->inoffset,dma->outoffset);
1494 dma->open_mode |= (f->f_mode & (FMODE_READ | FMODE_WRITE));
1498 DBG(printk("device num %d open finished\n",devnum));
1502 static int rme96xx_release(struct inode *in, struct file *file)
1504 struct dmabuf * dma = (struct dmabuf*) file->private_data;
1505 /* int hwp; ... was unused HP20020201 */
1506 DBG(printk("%s\n", __FUNCTION__));
1509 if (dma->open_mode & FMODE_WRITE) {
1510 #if 0 /* Why doesn't this work with some cards ?? */
1511 hwp = rme96xx_gethwptr(dma->s,0);
1512 while (rme96xx_getospace(dma,hwp)) {
1513 interruptible_sleep_on(&(dma->wait));
1514 hwp = rme96xx_gethwptr(dma->s,0);
1517 rme96xx_clearbufs(dma);
1520 dma->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1522 if (!(dma->open_mode & (FMODE_READ|FMODE_WRITE))) {
1524 if (dma->s->started) rme96xx_startcard(dma->s,1);
1527 wake_up(&dma->open_wait);
1534 static ssize_t rme96xx_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1536 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1538 int cnt; /* number of bytes from "buffer" that will/can be used */
1539 int hop = count/dma->outchannels;
1541 int exact = (file->f_flags & O_NONBLOCK);
1544 if(dma == NULL || (dma->s) == NULL)
1547 if (dma->mmapped || !dma->opened)
1550 if (!access_ok(VERIFY_READ, buffer, count))
1553 if (! (dma->open_mode & FMODE_WRITE))
1556 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1557 hwp = rme96xx_gethwptr(dma->s,0);
1559 if(!(dma->started)){
1560 COMM ("first write")
1563 dma->writeptr = hwp;
1568 cnt = rme96xx_getospace(dma,hwp);
1569 cnt>>=dma->formatshift;
1570 cnt*=dma->outchannels;
1575 if (rme96xx_copyfromuser(dma,buffer,cnt,hop))
1576 return ret ? ret : -EFAULT;
1580 if (count == 0) return ret;
1582 if (file->f_flags & O_NONBLOCK)
1583 return ret ? ret : -EAGAIN;
1585 if ((hwp - dma->writeptr) <= 0) {
1586 interruptible_sleep_on(&(dma->wait));
1588 if (signal_pending(current))
1589 return ret ? ret : -ERESTARTSYS;
1592 hwp = rme96xx_gethwptr(dma->s,exact);
1599 static ssize_t rme96xx_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1601 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1603 int cnt; /* number of bytes from "buffer" that will/can be used */
1604 int hop = count/dma->inchannels;
1606 int exact = (file->f_flags & O_NONBLOCK);
1609 if(dma == NULL || (dma->s) == NULL)
1612 if (dma->mmapped || !dma->opened)
1615 if (!access_ok(VERIFY_WRITE, buffer, count))
1618 if (! (dma->open_mode & FMODE_READ))
1621 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1622 hwp = rme96xx_gethwptr(dma->s,0);
1624 if(!(dma->started)){
1627 dma->writeptr = hwp;
1633 cnt = rme96xx_getispace(dma,hwp);
1634 cnt>>=dma->formatshift;
1635 cnt*=dma->inchannels;
1642 if (rme96xx_copytouser(dma,buffer,cnt,hop))
1643 return ret ? ret : -EFAULT;
1648 if (count == 0) return ret;
1650 if (file->f_flags & O_NONBLOCK)
1651 return ret ? ret : -EAGAIN;
1653 if ((hwp - dma->readptr) <= 0) {
1654 interruptible_sleep_on(&(dma->wait));
1656 if (signal_pending(current))
1657 return ret ? ret : -ERESTARTSYS;
1659 hwp = rme96xx_gethwptr(dma->s,exact);
1666 static int rm96xx_mmap(struct file *file, struct vm_area_struct *vma) {
1667 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1668 rme96xx_info* s = dma->s;
1674 if (vma->vm_pgoff != 0) {
1678 size = vma->vm_end - vma->vm_start;
1679 if (size > RME96xx_DMA_MAX_SIZE) {
1685 if (vma->vm_flags & VM_WRITE) {
1686 if (!s->started) rme96xx_startcard(s,1);
1688 if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->outoffset*RME96xx_DMA_MAX_SIZE) >> PAGE_SHIFT, size, vma->vm_page_prot)) {
1693 else if (vma->vm_flags & VM_READ) {
1694 if (!s->started) rme96xx_startcard(s,1);
1695 if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->inoffset*RME96xx_DMA_MAX_SIZE) >> PAGE_SHIFT, size, vma->vm_page_prot)) {
1705 /* this is the mapping */
1706 vma->vm_flags &= ~VM_IO;
1712 static unsigned int rme96xx_poll(struct file *file, struct poll_table_struct *wait)
1714 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1715 rme96xx_info* s = dma->s;
1716 unsigned int mask = 0;
1717 unsigned int hwp,cnt;
1719 DBG(printk("rme96xx poll_wait ...\n"));
1723 mask |= POLLOUT | POLLWRNORM;
1725 poll_wait(file, &dma->wait, wait);
1727 hwp = rme96xx_gethwptr(dma->s,0);
1729 DBG(printk("rme96xx poll: ..cnt %d > %d\n",cnt,s->fragsize));
1731 cnt = rme96xx_getispace(dma,hwp);
1733 if (file->f_mode & FMODE_READ)
1735 mask |= POLLIN | POLLRDNORM;
1739 cnt = rme96xx_getospace(dma,hwp);
1741 if (file->f_mode & FMODE_WRITE)
1743 mask |= POLLOUT | POLLWRNORM;
1746 // printk("rme96xx poll_wait ...%d > %d\n",rme96xx_getospace(dma,hwp),rme96xx_getispace(dma,hwp));
1752 static struct file_operations rme96xx_audio_fops = {
1753 .owner = THIS_MODULE,
1754 .read = rme96xx_read,
1755 .write = rme96xx_write,
1756 .poll = rme96xx_poll,
1757 .ioctl = rme96xx_ioctl,
1758 .mmap = rm96xx_mmap,
1759 .open = rme96xx_open,
1760 .release = rme96xx_release
1763 static int rme96xx_mixer_open(struct inode *inode, struct file *file)
1765 int minor = iminor(inode);
1766 struct list_head *list;
1769 COMM ("mixer open");
1771 nonseekable_open(inode, file);
1772 for (list = devs.next; ; list = list->next) {
1775 s = list_entry(list, rme96xx_info, devs);
1776 if (s->mixer== minor)
1780 file->private_data = s;
1782 COMM ("mixer opened")
1786 static int rme96xx_mixer_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1788 rme96xx_info *s = (rme96xx_info *)file->private_data;
1791 void __user *argp = (void __user *)arg;
1792 int __user *p = argp;
1794 status = readl(s->iobase + RME96xx_status_register);
1795 /* hack to convert rev 1.5 SPDIF rate to "crystalrate" format HP 20020201 */
1796 rme96xx_spdif_sample_rate(s,&spdifrate);
1797 status = (status & ~RME96xx_F) | ((spdifrate<<22) & RME96xx_F);
1800 if (cmd == SOUND_MIXER_PRIVATE1) {
1802 if (copy_from_user(&mixer,argp,sizeof(mixer)))
1805 mixer.devnr &= RME96xx_MASK_DEVS;
1806 if (mixer.devnr >= devices)
1807 mixer.devnr = devices-1;
1808 if (file->f_mode & FMODE_WRITE && !s->dma[mixer.devnr].opened) {
1809 /* modify only if device not open */
1810 if (mixer.o_offset < 0)
1812 if (mixer.o_offset >= RME96xx_CHANNELS_PER_CARD)
1813 mixer.o_offset = RME96xx_CHANNELS_PER_CARD-1;
1814 if (mixer.i_offset < 0)
1816 if (mixer.i_offset >= RME96xx_CHANNELS_PER_CARD)
1817 mixer.i_offset = RME96xx_CHANNELS_PER_CARD-1;
1818 s->dma[mixer.devnr].outoffset = mixer.o_offset;
1819 s->dma[mixer.devnr].inoffset = mixer.i_offset;
1822 mixer.o_offset = s->dma[mixer.devnr].outoffset;
1823 mixer.i_offset = s->dma[mixer.devnr].inoffset;
1825 return copy_to_user(argp, &mixer, sizeof(mixer)) ? -EFAULT : 0;
1827 if (cmd == SOUND_MIXER_PRIVATE2) {
1828 return put_user(status, p);
1830 if (cmd == SOUND_MIXER_PRIVATE3) {
1832 if (copy_from_user(&control,argp,sizeof(control)))
1834 if (file->f_mode & FMODE_WRITE) {
1835 s->control_register &= ~RME96xx_mixer_allowed;
1836 s->control_register |= control & RME96xx_mixer_allowed;
1837 writel(control,s->iobase + RME96xx_control_register);
1840 return put_user(s->control_register, p);
1847 static int rme96xx_mixer_release(struct inode *inode, struct file *file)
1852 static /*const*/ struct file_operations rme96xx_mixer_fops = {
1853 .owner = THIS_MODULE,
1854 .ioctl = rme96xx_mixer_ioctl,
1855 .open = rme96xx_mixer_open,
1856 .release = rme96xx_mixer_release,