2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of AD1848/AD1847/CS4248
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #define SNDRV_MAIN_OBJECT_FILE
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/slab.h>
28 #include <linux/ioport.h>
29 #include <sound/core.h>
30 #include <sound/ad1848.h>
31 #include <sound/control.h>
32 #include <sound/tlv.h>
33 #include <sound/pcm_params.h>
38 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
39 MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
40 MODULE_LICENSE("GPL");
43 #define SNDRV_DEBUG_MCE
50 static unsigned char freq_bits[14] = {
51 /* 5510 */ 0x00 | AD1848_XTAL2,
52 /* 6620 */ 0x0E | AD1848_XTAL2,
53 /* 8000 */ 0x00 | AD1848_XTAL1,
54 /* 9600 */ 0x0E | AD1848_XTAL1,
55 /* 11025 */ 0x02 | AD1848_XTAL2,
56 /* 16000 */ 0x02 | AD1848_XTAL1,
57 /* 18900 */ 0x04 | AD1848_XTAL2,
58 /* 22050 */ 0x06 | AD1848_XTAL2,
59 /* 27042 */ 0x04 | AD1848_XTAL1,
60 /* 32000 */ 0x06 | AD1848_XTAL1,
61 /* 33075 */ 0x0C | AD1848_XTAL2,
62 /* 37800 */ 0x08 | AD1848_XTAL2,
63 /* 44100 */ 0x0A | AD1848_XTAL2,
64 /* 48000 */ 0x0C | AD1848_XTAL1
67 static unsigned int rates[14] = {
68 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
69 27042, 32000, 33075, 37800, 44100, 48000
72 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
73 .count = ARRAY_SIZE(rates),
78 static unsigned char snd_ad1848_original_image[16] =
82 0x9f, /* 02 - la1ic */
83 0x9f, /* 03 - ra1ic */
84 0x9f, /* 04 - la2ic */
85 0x9f, /* 05 - ra2ic */
89 AD1848_AUTOCALIB, /* 09 - ic */
102 static void snd_ad1848_wait(struct snd_ad1848 *chip)
106 for (timeout = 250; timeout > 0; timeout--) {
107 if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
113 void snd_ad1848_out(struct snd_ad1848 *chip,
117 snd_ad1848_wait(chip);
118 #ifdef CONFIG_SND_DEBUG
119 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
120 snd_printk(KERN_WARNING "auto calibration time out - "
121 "reg = 0x%x, value = 0x%x\n", reg, value);
123 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
124 outb(chip->image[reg] = value, AD1848P(chip, REG));
126 snd_printdd("codec out - reg 0x%x = 0x%x\n",
127 chip->mce_bit | reg, value);
130 EXPORT_SYMBOL(snd_ad1848_out);
132 static void snd_ad1848_dout(struct snd_ad1848 *chip,
133 unsigned char reg, unsigned char value)
135 snd_ad1848_wait(chip);
136 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
137 outb(value, AD1848P(chip, REG));
141 static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
143 snd_ad1848_wait(chip);
144 #ifdef CONFIG_SND_DEBUG
145 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
146 snd_printk(KERN_WARNING "auto calibration time out - "
147 "reg = 0x%x\n", reg);
149 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
151 return inb(AD1848P(chip, REG));
156 static void snd_ad1848_debug(struct snd_ad1848 *chip)
158 printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
159 printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
160 printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
161 printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
162 printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
163 printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
164 printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
165 printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
166 printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
167 printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
168 printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
169 printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
170 printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
171 printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
172 printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
173 printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
174 printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
175 printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
181 * AD1848 detection / MCE routines
184 static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
189 snd_ad1848_wait(chip);
190 #ifdef CONFIG_SND_DEBUG
191 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
192 snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
194 spin_lock_irqsave(&chip->reg_lock, flags);
195 chip->mce_bit |= AD1848_MCE;
196 timeout = inb(AD1848P(chip, REGSEL));
198 snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
199 if (!(timeout & AD1848_MCE))
200 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
201 spin_unlock_irqrestore(&chip->reg_lock, flags);
204 static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
206 unsigned long flags, timeout;
209 spin_lock_irqsave(&chip->reg_lock, flags);
210 for (timeout = 5; timeout > 0; timeout--)
211 inb(AD1848P(chip, REGSEL));
212 /* end of cleanup sequence */
213 for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
216 snd_printdd("(1) timeout = %d\n", timeout);
218 #ifdef CONFIG_SND_DEBUG
219 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
220 snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
223 chip->mce_bit &= ~AD1848_MCE;
224 reg = inb(AD1848P(chip, REGSEL));
225 outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL));
227 snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
228 if ((reg & AD1848_MCE) == 0) {
229 spin_unlock_irqrestore(&chip->reg_lock, flags);
234 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
235 * It may take up to 5 sample periods (at most 907 us @ 5.5125 kHz) for
236 * the process to _start_, so it is important to wait at least that long
237 * before checking. Otherwise we might think AC has finished when it
238 * has in fact not begun. It could take 128 (no AC) or 384 (AC) cycles
239 * for ACI to drop. This gives a wait of at most 70 ms with a more
240 * typical value of 3-9 ms.
242 timeout = jiffies + msecs_to_jiffies(250);
244 spin_unlock_irqrestore(&chip->reg_lock, flags);
246 spin_lock_irqsave(&chip->reg_lock, flags);
247 reg = snd_ad1848_in(chip, AD1848_TEST_INIT) &
248 AD1848_CALIB_IN_PROGRESS;
249 } while (reg && time_before(jiffies, timeout));
250 spin_unlock_irqrestore(&chip->reg_lock, flags);
253 "mce_down - auto calibration time out (2)\n");
255 snd_printdd("(4) jiffies = %lu\n", jiffies);
256 snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
259 static unsigned int snd_ad1848_get_count(unsigned char format,
262 switch (format & 0xe0) {
263 case AD1848_LINEAR_16:
267 if (format & AD1848_STEREO)
272 static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
273 int channel, int cmd)
278 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
280 spin_lock(&chip->reg_lock);
281 if (cmd == SNDRV_PCM_TRIGGER_START) {
282 if (chip->image[AD1848_IFACE_CTRL] & what) {
283 spin_unlock(&chip->reg_lock);
286 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
287 chip->mode |= AD1848_MODE_RUNNING;
288 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
289 if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
290 spin_unlock(&chip->reg_lock);
293 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
294 chip->mode &= ~AD1848_MODE_RUNNING;
298 spin_unlock(&chip->reg_lock);
306 static unsigned char snd_ad1848_get_rate(unsigned int rate)
310 for (i = 0; i < ARRAY_SIZE(rates); i++)
311 if (rate == rates[i])
314 return freq_bits[ARRAY_SIZE(rates) - 1];
317 static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
318 unsigned int cmd, void *arg)
320 return snd_pcm_lib_ioctl(substream, cmd, arg);
323 static unsigned char snd_ad1848_get_format(int format, int channels)
325 unsigned char rformat;
327 rformat = AD1848_LINEAR_8;
329 case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
330 case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
331 case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
334 rformat |= AD1848_STEREO;
336 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
341 static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
346 spin_lock_irqsave(&chip->reg_lock, flags);
347 if (chip->calibrate_mute == mute) {
348 spin_unlock_irqrestore(&chip->reg_lock, flags);
352 snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
353 snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
355 snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
356 snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
357 snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
358 snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
359 snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
360 snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
361 chip->calibrate_mute = mute;
362 spin_unlock_irqrestore(&chip->reg_lock, flags);
365 static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
367 if (hw_params == NULL) {
368 chip->image[AD1848_DATA_FORMAT] = 0x20;
370 chip->image[AD1848_DATA_FORMAT] =
371 snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
372 snd_ad1848_get_rate(params_rate(hw_params));
374 // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
377 static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
381 mutex_lock(&chip->open_mutex);
382 if (chip->mode & AD1848_MODE_OPEN) {
383 mutex_unlock(&chip->open_mutex);
386 snd_ad1848_mce_down(chip);
388 #ifdef SNDRV_DEBUG_MCE
389 snd_printk("open: (1)\n");
391 snd_ad1848_mce_up(chip);
392 spin_lock_irqsave(&chip->reg_lock, flags);
393 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
394 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
396 chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
397 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
398 spin_unlock_irqrestore(&chip->reg_lock, flags);
399 snd_ad1848_mce_down(chip);
401 #ifdef SNDRV_DEBUG_MCE
402 snd_printk("open: (2)\n");
405 snd_ad1848_set_data_format(chip, NULL);
407 snd_ad1848_mce_up(chip);
408 spin_lock_irqsave(&chip->reg_lock, flags);
409 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
410 spin_unlock_irqrestore(&chip->reg_lock, flags);
411 snd_ad1848_mce_down(chip);
413 #ifdef SNDRV_DEBUG_MCE
414 snd_printk("open: (3)\n");
417 /* ok. now enable and ack CODEC IRQ */
418 spin_lock_irqsave(&chip->reg_lock, flags);
419 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
420 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
421 chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
422 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
423 spin_unlock_irqrestore(&chip->reg_lock, flags);
426 mutex_unlock(&chip->open_mutex);
431 static void snd_ad1848_close(struct snd_ad1848 *chip)
435 mutex_lock(&chip->open_mutex);
437 mutex_unlock(&chip->open_mutex);
441 spin_lock_irqsave(&chip->reg_lock, flags);
442 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
443 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
444 chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
445 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
446 spin_unlock_irqrestore(&chip->reg_lock, flags);
448 /* now disable capture & playback */
450 snd_ad1848_mce_up(chip);
451 spin_lock_irqsave(&chip->reg_lock, flags);
452 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
453 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
454 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
455 spin_unlock_irqrestore(&chip->reg_lock, flags);
456 snd_ad1848_mce_down(chip);
458 /* clear IRQ again */
459 spin_lock_irqsave(&chip->reg_lock, flags);
460 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
461 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
462 spin_unlock_irqrestore(&chip->reg_lock, flags);
465 mutex_unlock(&chip->open_mutex);
469 * ok.. exported functions..
472 static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
475 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
476 return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
479 static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
482 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
483 return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
486 static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
487 struct snd_pcm_hw_params *hw_params)
489 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
493 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
495 snd_ad1848_calibrate_mute(chip, 1);
496 snd_ad1848_set_data_format(chip, hw_params);
497 snd_ad1848_mce_up(chip);
498 spin_lock_irqsave(&chip->reg_lock, flags);
499 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
500 spin_unlock_irqrestore(&chip->reg_lock, flags);
501 snd_ad1848_mce_down(chip);
502 snd_ad1848_calibrate_mute(chip, 0);
506 static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
508 return snd_pcm_lib_free_pages(substream);
511 static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
513 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
514 struct snd_pcm_runtime *runtime = substream->runtime;
516 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
517 unsigned int count = snd_pcm_lib_period_bytes(substream);
519 chip->dma_size = size;
520 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
521 snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
522 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
523 spin_lock_irqsave(&chip->reg_lock, flags);
524 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
525 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
526 spin_unlock_irqrestore(&chip->reg_lock, flags);
530 static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
531 struct snd_pcm_hw_params *hw_params)
533 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
537 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
539 snd_ad1848_calibrate_mute(chip, 1);
540 snd_ad1848_set_data_format(chip, hw_params);
541 snd_ad1848_mce_up(chip);
542 spin_lock_irqsave(&chip->reg_lock, flags);
543 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
544 spin_unlock_irqrestore(&chip->reg_lock, flags);
545 snd_ad1848_mce_down(chip);
546 snd_ad1848_calibrate_mute(chip, 0);
550 static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
552 return snd_pcm_lib_free_pages(substream);
555 static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
557 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
558 struct snd_pcm_runtime *runtime = substream->runtime;
560 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
561 unsigned int count = snd_pcm_lib_period_bytes(substream);
563 chip->dma_size = size;
564 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
565 snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
566 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
567 spin_lock_irqsave(&chip->reg_lock, flags);
568 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
569 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
570 spin_unlock_irqrestore(&chip->reg_lock, flags);
574 static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
576 struct snd_ad1848 *chip = dev_id;
578 if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
579 (chip->mode & AD1848_MODE_RUNNING))
580 snd_pcm_period_elapsed(chip->playback_substream);
581 if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
582 (chip->mode & AD1848_MODE_RUNNING))
583 snd_pcm_period_elapsed(chip->capture_substream);
584 outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
588 static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
590 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
593 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
595 ptr = snd_dma_pointer(chip->dma, chip->dma_size);
596 return bytes_to_frames(substream->runtime, ptr);
599 static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
601 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
604 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
606 ptr = snd_dma_pointer(chip->dma, chip->dma_size);
607 return bytes_to_frames(substream->runtime, ptr);
614 static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
618 if (!chip->thinkpad_flag) return;
620 outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
621 tmp = inb(AD1848_THINKPAD_CTL_PORT2);
625 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
628 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
630 outb(tmp, AD1848_THINKPAD_CTL_PORT2);
635 static void snd_ad1848_suspend(struct snd_ad1848 *chip)
637 snd_pcm_suspend_all(chip->pcm);
638 if (chip->thinkpad_flag)
639 snd_ad1848_thinkpad_twiddle(chip, 0);
642 static void snd_ad1848_resume(struct snd_ad1848 *chip)
646 if (chip->thinkpad_flag)
647 snd_ad1848_thinkpad_twiddle(chip, 1);
649 /* clear any pendings IRQ */
650 inb(AD1848P(chip, STATUS));
651 outb(0, AD1848P(chip, STATUS));
654 snd_ad1848_mce_down(chip);
655 for (i = 0; i < 16; i++)
656 snd_ad1848_out(chip, i, chip->image[i]);
657 snd_ad1848_mce_up(chip);
658 snd_ad1848_mce_down(chip);
660 #endif /* CONFIG_PM */
662 static int snd_ad1848_probe(struct snd_ad1848 * chip)
665 int i, id, rev, ad1847;
669 snd_ad1848_debug(chip);
672 for (i = 0; i < 1000; i++) {
674 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
677 spin_lock_irqsave(&chip->reg_lock, flags);
678 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
679 snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
680 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
681 rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
683 spin_unlock_irqrestore(&chip->reg_lock, flags);
688 if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
689 spin_unlock_irqrestore(&chip->reg_lock, flags);
693 spin_unlock_irqrestore(&chip->reg_lock, flags);
697 return -ENODEV; /* no valid device found */
698 if (chip->hardware == AD1848_HW_DETECT) {
700 chip->hardware = AD1848_HW_AD1847;
702 chip->hardware = AD1848_HW_AD1848;
703 rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
705 chip->hardware = AD1848_HW_CS4248;
706 } else if ((rev & 0x0f) == 0x0a) {
707 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
708 for (i = 0; i < 16; ++i) {
709 if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
710 chip->hardware = AD1848_HW_CMI8330;
714 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
718 spin_lock_irqsave(&chip->reg_lock, flags);
719 inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
720 outb(0, AD1848P(chip, STATUS));
722 spin_unlock_irqrestore(&chip->reg_lock, flags);
724 chip->image[AD1848_MISC_INFO] = 0x00;
725 chip->image[AD1848_IFACE_CTRL] =
726 (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
727 ptr = (unsigned char *) &chip->image;
728 snd_ad1848_mce_down(chip);
729 spin_lock_irqsave(&chip->reg_lock, flags);
730 for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
731 snd_ad1848_out(chip, i, *ptr++);
732 spin_unlock_irqrestore(&chip->reg_lock, flags);
733 snd_ad1848_mce_up(chip);
734 snd_ad1848_mce_down(chip);
735 return 0; /* all things are ok.. */
742 static struct snd_pcm_hardware snd_ad1848_playback =
744 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
745 SNDRV_PCM_INFO_MMAP_VALID),
746 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
747 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
748 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
753 .buffer_bytes_max = (128*1024),
754 .period_bytes_min = 64,
755 .period_bytes_max = (128*1024),
761 static struct snd_pcm_hardware snd_ad1848_capture =
763 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
764 SNDRV_PCM_INFO_MMAP_VALID),
765 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
766 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
767 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
772 .buffer_bytes_max = (128*1024),
773 .period_bytes_min = 64,
774 .period_bytes_max = (128*1024),
784 static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
786 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
787 struct snd_pcm_runtime *runtime = substream->runtime;
790 if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
792 chip->playback_substream = substream;
793 runtime->hw = snd_ad1848_playback;
794 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
795 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
796 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
800 static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
802 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
803 struct snd_pcm_runtime *runtime = substream->runtime;
806 if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
808 chip->capture_substream = substream;
809 runtime->hw = snd_ad1848_capture;
810 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
811 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
812 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
816 static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
818 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
820 chip->mode &= ~AD1848_MODE_PLAY;
821 chip->playback_substream = NULL;
822 snd_ad1848_close(chip);
826 static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
828 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
830 chip->mode &= ~AD1848_MODE_CAPTURE;
831 chip->capture_substream = NULL;
832 snd_ad1848_close(chip);
836 static int snd_ad1848_free(struct snd_ad1848 *chip)
838 release_and_free_resource(chip->res_port);
840 free_irq(chip->irq, (void *) chip);
841 if (chip->dma >= 0) {
842 snd_dma_disable(chip->dma);
849 static int snd_ad1848_dev_free(struct snd_device *device)
851 struct snd_ad1848 *chip = device->device_data;
852 return snd_ad1848_free(chip);
855 static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
857 switch (chip->hardware) {
858 case AD1848_HW_AD1847: return "AD1847";
859 case AD1848_HW_AD1848: return "AD1848";
860 case AD1848_HW_CS4248: return "CS4248";
861 case AD1848_HW_CMI8330: return "CMI8330/C3D";
862 default: return "???";
866 int snd_ad1848_create(struct snd_card *card,
869 unsigned short hardware,
870 struct snd_ad1848 ** rchip)
872 static struct snd_device_ops ops = {
873 .dev_free = snd_ad1848_dev_free,
875 struct snd_ad1848 *chip;
879 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
882 spin_lock_init(&chip->reg_lock);
883 mutex_init(&chip->open_mutex);
888 chip->hardware = hardware;
889 memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
891 if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
892 snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
893 snd_ad1848_free(chip);
896 if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
897 snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
898 snd_ad1848_free(chip);
902 if (request_dma(dma, "AD1848")) {
903 snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
904 snd_ad1848_free(chip);
909 if (hardware == AD1848_HW_THINKPAD) {
910 chip->thinkpad_flag = 1;
911 chip->hardware = AD1848_HW_DETECT; /* reset */
912 snd_ad1848_thinkpad_twiddle(chip, 1);
915 if (snd_ad1848_probe(chip) < 0) {
916 snd_ad1848_free(chip);
920 /* Register device */
921 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
922 snd_ad1848_free(chip);
927 chip->suspend = snd_ad1848_suspend;
928 chip->resume = snd_ad1848_resume;
935 EXPORT_SYMBOL(snd_ad1848_create);
937 static struct snd_pcm_ops snd_ad1848_playback_ops = {
938 .open = snd_ad1848_playback_open,
939 .close = snd_ad1848_playback_close,
940 .ioctl = snd_ad1848_ioctl,
941 .hw_params = snd_ad1848_playback_hw_params,
942 .hw_free = snd_ad1848_playback_hw_free,
943 .prepare = snd_ad1848_playback_prepare,
944 .trigger = snd_ad1848_playback_trigger,
945 .pointer = snd_ad1848_playback_pointer,
948 static struct snd_pcm_ops snd_ad1848_capture_ops = {
949 .open = snd_ad1848_capture_open,
950 .close = snd_ad1848_capture_close,
951 .ioctl = snd_ad1848_ioctl,
952 .hw_params = snd_ad1848_capture_hw_params,
953 .hw_free = snd_ad1848_capture_hw_free,
954 .prepare = snd_ad1848_capture_prepare,
955 .trigger = snd_ad1848_capture_trigger,
956 .pointer = snd_ad1848_capture_pointer,
959 int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
964 if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
967 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
968 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
970 pcm->private_data = chip;
971 pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
972 strcpy(pcm->name, snd_ad1848_chip_id(chip));
974 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
976 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
984 EXPORT_SYMBOL(snd_ad1848_pcm);
986 const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
988 return direction == SNDRV_PCM_STREAM_PLAYBACK ?
989 &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
992 EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
998 static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1000 static char *texts[4] = {
1001 "Line", "Aux", "Mic", "Mix"
1004 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1006 uinfo->value.enumerated.items = 4;
1007 if (uinfo->value.enumerated.item > 3)
1008 uinfo->value.enumerated.item = 3;
1009 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1013 static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1015 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1016 unsigned long flags;
1018 spin_lock_irqsave(&chip->reg_lock, flags);
1019 ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
1020 ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
1021 spin_unlock_irqrestore(&chip->reg_lock, flags);
1025 static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1027 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1028 unsigned long flags;
1029 unsigned short left, right;
1032 if (ucontrol->value.enumerated.item[0] > 3 ||
1033 ucontrol->value.enumerated.item[1] > 3)
1035 left = ucontrol->value.enumerated.item[0] << 6;
1036 right = ucontrol->value.enumerated.item[1] << 6;
1037 spin_lock_irqsave(&chip->reg_lock, flags);
1038 left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
1039 right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
1040 change = left != chip->image[AD1848_LEFT_INPUT] ||
1041 right != chip->image[AD1848_RIGHT_INPUT];
1042 snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
1043 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
1044 spin_unlock_irqrestore(&chip->reg_lock, flags);
1048 static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1050 int mask = (kcontrol->private_value >> 16) & 0xff;
1052 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1054 uinfo->value.integer.min = 0;
1055 uinfo->value.integer.max = mask;
1059 static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1061 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1062 unsigned long flags;
1063 int reg = kcontrol->private_value & 0xff;
1064 int shift = (kcontrol->private_value >> 8) & 0xff;
1065 int mask = (kcontrol->private_value >> 16) & 0xff;
1066 int invert = (kcontrol->private_value >> 24) & 0xff;
1068 spin_lock_irqsave(&chip->reg_lock, flags);
1069 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1070 spin_unlock_irqrestore(&chip->reg_lock, flags);
1072 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1076 static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1078 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1079 unsigned long flags;
1080 int reg = kcontrol->private_value & 0xff;
1081 int shift = (kcontrol->private_value >> 8) & 0xff;
1082 int mask = (kcontrol->private_value >> 16) & 0xff;
1083 int invert = (kcontrol->private_value >> 24) & 0xff;
1087 val = (ucontrol->value.integer.value[0] & mask);
1091 spin_lock_irqsave(&chip->reg_lock, flags);
1092 val = (chip->image[reg] & ~(mask << shift)) | val;
1093 change = val != chip->image[reg];
1094 snd_ad1848_out(chip, reg, val);
1095 spin_unlock_irqrestore(&chip->reg_lock, flags);
1099 static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1101 int mask = (kcontrol->private_value >> 24) & 0xff;
1103 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1105 uinfo->value.integer.min = 0;
1106 uinfo->value.integer.max = mask;
1110 static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1112 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1113 unsigned long flags;
1114 int left_reg = kcontrol->private_value & 0xff;
1115 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1116 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1117 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1118 int mask = (kcontrol->private_value >> 24) & 0xff;
1119 int invert = (kcontrol->private_value >> 22) & 1;
1121 spin_lock_irqsave(&chip->reg_lock, flags);
1122 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1123 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1124 spin_unlock_irqrestore(&chip->reg_lock, flags);
1126 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1127 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1132 static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1134 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1135 unsigned long flags;
1136 int left_reg = kcontrol->private_value & 0xff;
1137 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1138 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1139 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1140 int mask = (kcontrol->private_value >> 24) & 0xff;
1141 int invert = (kcontrol->private_value >> 22) & 1;
1143 unsigned short val1, val2;
1145 val1 = ucontrol->value.integer.value[0] & mask;
1146 val2 = ucontrol->value.integer.value[1] & mask;
1151 val1 <<= shift_left;
1152 val2 <<= shift_right;
1153 spin_lock_irqsave(&chip->reg_lock, flags);
1154 if (left_reg != right_reg) {
1155 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1156 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1157 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1158 snd_ad1848_out(chip, left_reg, val1);
1159 snd_ad1848_out(chip, right_reg, val2);
1161 val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1162 change = val1 != chip->image[left_reg];
1163 snd_ad1848_out(chip, left_reg, val1);
1165 spin_unlock_irqrestore(&chip->reg_lock, flags);
1171 int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip,
1172 const struct ad1848_mix_elem *c)
1174 static struct snd_kcontrol_new newctls[] = {
1175 [AD1848_MIX_SINGLE] = {
1176 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1177 .info = snd_ad1848_info_single,
1178 .get = snd_ad1848_get_single,
1179 .put = snd_ad1848_put_single,
1181 [AD1848_MIX_DOUBLE] = {
1182 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1183 .info = snd_ad1848_info_double,
1184 .get = snd_ad1848_get_double,
1185 .put = snd_ad1848_put_double,
1187 [AD1848_MIX_CAPTURE] = {
1188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1189 .info = snd_ad1848_info_mux,
1190 .get = snd_ad1848_get_mux,
1191 .put = snd_ad1848_put_mux,
1194 struct snd_kcontrol *ctl;
1197 ctl = snd_ctl_new1(&newctls[c->type], chip);
1200 strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
1201 ctl->id.index = c->index;
1202 ctl->private_value = c->private_value;
1204 ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1205 ctl->tlv.p = c->tlv;
1207 if ((err = snd_ctl_add(chip->card, ctl)) < 0)
1212 EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
1214 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
1215 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
1216 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
1218 static struct ad1848_mix_elem snd_ad1848_controls[] = {
1219 AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
1220 AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
1222 AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1223 AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
1224 db_scale_5bit_12db_max),
1225 AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1226 AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
1227 db_scale_5bit_12db_max),
1228 AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
1231 .name = "Capture Source",
1232 .type = AD1848_MIX_CAPTURE,
1234 AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
1235 AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
1239 int snd_ad1848_mixer(struct snd_ad1848 *chip)
1241 struct snd_card *card;
1242 struct snd_pcm *pcm;
1246 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1251 strcpy(card->mixername, pcm->name);
1253 for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
1254 if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
1260 EXPORT_SYMBOL(snd_ad1848_mixer);
1266 static int __init alsa_ad1848_init(void)
1271 static void __exit alsa_ad1848_exit(void)
1275 module_init(alsa_ad1848_init)
1276 module_exit(alsa_ad1848_exit)