2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of AD1848/AD1847/CS4248
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #define SNDRV_MAIN_OBJECT_FILE
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/slab.h>
27 #include <linux/ioport.h>
28 #include <sound/core.h>
29 #include <sound/ad1848.h>
30 #include <sound/control.h>
31 #include <sound/tlv.h>
32 #include <sound/pcm_params.h>
37 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
38 MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
39 MODULE_LICENSE("GPL");
42 #define SNDRV_DEBUG_MCE
49 static unsigned char freq_bits[14] = {
50 /* 5510 */ 0x00 | AD1848_XTAL2,
51 /* 6620 */ 0x0E | AD1848_XTAL2,
52 /* 8000 */ 0x00 | AD1848_XTAL1,
53 /* 9600 */ 0x0E | AD1848_XTAL1,
54 /* 11025 */ 0x02 | AD1848_XTAL2,
55 /* 16000 */ 0x02 | AD1848_XTAL1,
56 /* 18900 */ 0x04 | AD1848_XTAL2,
57 /* 22050 */ 0x06 | AD1848_XTAL2,
58 /* 27042 */ 0x04 | AD1848_XTAL1,
59 /* 32000 */ 0x06 | AD1848_XTAL1,
60 /* 33075 */ 0x0C | AD1848_XTAL2,
61 /* 37800 */ 0x08 | AD1848_XTAL2,
62 /* 44100 */ 0x0A | AD1848_XTAL2,
63 /* 48000 */ 0x0C | AD1848_XTAL1
66 static unsigned int rates[14] = {
67 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
68 27042, 32000, 33075, 37800, 44100, 48000
71 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
72 .count = ARRAY_SIZE(rates),
77 static unsigned char snd_ad1848_original_image[16] =
81 0x9f, /* 02 - la1ic */
82 0x9f, /* 03 - ra1ic */
83 0x9f, /* 04 - la2ic */
84 0x9f, /* 05 - ra2ic */
88 AD1848_AUTOCALIB, /* 09 - ic */
101 static void snd_ad1848_wait(struct snd_wss *chip)
105 for (timeout = 250; timeout > 0; timeout--) {
106 if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
112 void snd_ad1848_out(struct snd_wss *chip,
116 snd_ad1848_wait(chip);
117 #ifdef CONFIG_SND_DEBUG
118 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
119 snd_printk(KERN_WARNING "auto calibration time out - "
120 "reg = 0x%x, value = 0x%x\n", reg, value);
122 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
123 outb(chip->image[reg] = value, AD1848P(chip, REG));
125 snd_printdd("codec out - reg 0x%x = 0x%x\n",
126 chip->mce_bit | reg, value);
129 EXPORT_SYMBOL(snd_ad1848_out);
131 static void snd_ad1848_dout(struct snd_wss *chip,
132 unsigned char reg, unsigned char value)
134 snd_ad1848_wait(chip);
135 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
136 outb(value, AD1848P(chip, REG));
140 static unsigned char snd_ad1848_in(struct snd_wss *chip, unsigned char reg)
142 snd_ad1848_wait(chip);
143 #ifdef CONFIG_SND_DEBUG
144 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
145 snd_printk(KERN_WARNING "auto calibration time out - "
146 "reg = 0x%x\n", reg);
148 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
150 return inb(AD1848P(chip, REG));
155 static void snd_ad1848_debug(struct snd_wss *chip)
157 printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
158 printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
159 printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
160 printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
161 printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
162 printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
163 printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
164 printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
165 printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
166 printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
167 printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
168 printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
169 printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
170 printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
171 printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
172 printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
173 printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
174 printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
180 * AD1848 detection / MCE routines
183 static void snd_ad1848_mce_up(struct snd_wss *chip)
188 snd_ad1848_wait(chip);
189 #ifdef CONFIG_SND_DEBUG
190 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
191 snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
193 spin_lock_irqsave(&chip->reg_lock, flags);
194 chip->mce_bit |= AD1848_MCE;
195 timeout = inb(AD1848P(chip, REGSEL));
197 snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
198 if (!(timeout & AD1848_MCE))
199 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
200 spin_unlock_irqrestore(&chip->reg_lock, flags);
203 static void snd_ad1848_mce_down(struct snd_wss *chip)
205 unsigned long flags, timeout;
208 spin_lock_irqsave(&chip->reg_lock, flags);
209 for (timeout = 5; timeout > 0; timeout--)
210 inb(AD1848P(chip, REGSEL));
211 /* end of cleanup sequence */
212 for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
215 snd_printdd("(1) timeout = %ld\n", timeout);
217 #ifdef CONFIG_SND_DEBUG
218 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
219 snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
222 chip->mce_bit &= ~AD1848_MCE;
223 reg = inb(AD1848P(chip, REGSEL));
224 outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL));
226 snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
227 if ((reg & AD1848_MCE) == 0) {
228 spin_unlock_irqrestore(&chip->reg_lock, flags);
233 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
234 * It may take up to 5 sample periods (at most 907 us @ 5.5125 kHz) for
235 * the process to _start_, so it is important to wait at least that long
236 * before checking. Otherwise we might think AC has finished when it
237 * has in fact not begun. It could take 128 (no AC) or 384 (AC) cycles
238 * for ACI to drop. This gives a wait of at most 70 ms with a more
239 * typical value of 3-9 ms.
241 timeout = jiffies + msecs_to_jiffies(250);
243 spin_unlock_irqrestore(&chip->reg_lock, flags);
245 spin_lock_irqsave(&chip->reg_lock, flags);
246 reg = snd_ad1848_in(chip, AD1848_TEST_INIT) &
247 AD1848_CALIB_IN_PROGRESS;
248 } while (reg && time_before(jiffies, timeout));
249 spin_unlock_irqrestore(&chip->reg_lock, flags);
252 "mce_down - auto calibration time out (2)\n");
254 snd_printdd("(4) jiffies = %lu\n", jiffies);
255 snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
258 static unsigned int snd_ad1848_get_count(unsigned char format,
261 switch (format & 0xe0) {
262 case AD1848_LINEAR_16:
266 if (format & AD1848_STEREO)
271 static int snd_ad1848_trigger(struct snd_wss *chip, unsigned char what,
272 int channel, int cmd)
277 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
279 spin_lock(&chip->reg_lock);
280 if (cmd == SNDRV_PCM_TRIGGER_START) {
281 if (chip->image[AD1848_IFACE_CTRL] & what) {
282 spin_unlock(&chip->reg_lock);
285 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
286 chip->mode |= AD1848_MODE_RUNNING;
287 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
288 if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
289 spin_unlock(&chip->reg_lock);
292 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
293 chip->mode &= ~AD1848_MODE_RUNNING;
297 spin_unlock(&chip->reg_lock);
305 static unsigned char snd_ad1848_get_rate(unsigned int rate)
309 for (i = 0; i < ARRAY_SIZE(rates); i++)
310 if (rate == rates[i])
313 return freq_bits[ARRAY_SIZE(rates) - 1];
316 static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
317 unsigned int cmd, void *arg)
319 return snd_pcm_lib_ioctl(substream, cmd, arg);
322 static unsigned char snd_ad1848_get_format(int format, int channels)
324 unsigned char rformat;
326 rformat = AD1848_LINEAR_8;
328 case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
329 case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
330 case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
333 rformat |= AD1848_STEREO;
335 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
340 static void snd_ad1848_calibrate_mute(struct snd_wss *chip, int mute)
345 spin_lock_irqsave(&chip->reg_lock, flags);
346 if (chip->calibrate_mute == mute) {
347 spin_unlock_irqrestore(&chip->reg_lock, flags);
351 snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
352 snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
354 snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
355 snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
356 snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
357 snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
358 snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
359 snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
360 chip->calibrate_mute = mute;
361 spin_unlock_irqrestore(&chip->reg_lock, flags);
364 static void snd_ad1848_set_data_format(struct snd_wss *chip,
365 struct snd_pcm_hw_params *hw_params)
367 if (hw_params == NULL) {
368 chip->image[AD1848_DATA_FORMAT] = 0x20;
370 chip->image[AD1848_DATA_FORMAT] =
371 snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
372 snd_ad1848_get_rate(params_rate(hw_params));
374 // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
377 static int snd_ad1848_open(struct snd_wss *chip, unsigned int mode)
381 if (chip->mode & AD1848_MODE_OPEN)
384 snd_ad1848_mce_down(chip);
386 #ifdef SNDRV_DEBUG_MCE
387 snd_printk("open: (1)\n");
389 snd_ad1848_mce_up(chip);
390 spin_lock_irqsave(&chip->reg_lock, flags);
391 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
392 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
394 chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
395 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
396 spin_unlock_irqrestore(&chip->reg_lock, flags);
397 snd_ad1848_mce_down(chip);
399 #ifdef SNDRV_DEBUG_MCE
400 snd_printk("open: (2)\n");
403 snd_ad1848_set_data_format(chip, NULL);
405 snd_ad1848_mce_up(chip);
406 spin_lock_irqsave(&chip->reg_lock, flags);
407 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
408 spin_unlock_irqrestore(&chip->reg_lock, flags);
409 snd_ad1848_mce_down(chip);
411 #ifdef SNDRV_DEBUG_MCE
412 snd_printk("open: (3)\n");
415 /* ok. now enable and ack CODEC IRQ */
416 spin_lock_irqsave(&chip->reg_lock, flags);
417 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
418 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
419 chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
420 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
421 spin_unlock_irqrestore(&chip->reg_lock, flags);
428 static void snd_ad1848_close(struct snd_wss *chip)
435 spin_lock_irqsave(&chip->reg_lock, flags);
436 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
437 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
438 chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
439 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
440 spin_unlock_irqrestore(&chip->reg_lock, flags);
442 /* now disable capture & playback */
444 snd_ad1848_mce_up(chip);
445 spin_lock_irqsave(&chip->reg_lock, flags);
446 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
447 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
448 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
449 spin_unlock_irqrestore(&chip->reg_lock, flags);
450 snd_ad1848_mce_down(chip);
452 /* clear IRQ again */
453 spin_lock_irqsave(&chip->reg_lock, flags);
454 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
455 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
456 spin_unlock_irqrestore(&chip->reg_lock, flags);
462 * ok.. exported functions..
465 static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
468 struct snd_wss *chip = snd_pcm_substream_chip(substream);
469 return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
472 static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
475 struct snd_wss *chip = snd_pcm_substream_chip(substream);
476 return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
479 static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
480 struct snd_pcm_hw_params *hw_params)
482 struct snd_wss *chip = snd_pcm_substream_chip(substream);
486 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
488 snd_ad1848_calibrate_mute(chip, 1);
489 snd_ad1848_set_data_format(chip, hw_params);
490 snd_ad1848_mce_up(chip);
491 spin_lock_irqsave(&chip->reg_lock, flags);
492 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
493 spin_unlock_irqrestore(&chip->reg_lock, flags);
494 snd_ad1848_mce_down(chip);
495 snd_ad1848_calibrate_mute(chip, 0);
499 static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
501 return snd_pcm_lib_free_pages(substream);
504 static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
506 struct snd_wss *chip = snd_pcm_substream_chip(substream);
507 struct snd_pcm_runtime *runtime = substream->runtime;
509 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
510 unsigned int count = snd_pcm_lib_period_bytes(substream);
512 chip->p_dma_size = size;
513 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
514 snd_dma_program(chip->dma1, runtime->dma_addr, size,
515 DMA_MODE_WRITE | DMA_AUTOINIT);
516 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
517 spin_lock_irqsave(&chip->reg_lock, flags);
518 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
519 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
520 spin_unlock_irqrestore(&chip->reg_lock, flags);
524 static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
525 struct snd_pcm_hw_params *hw_params)
527 struct snd_wss *chip = snd_pcm_substream_chip(substream);
531 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
533 snd_ad1848_calibrate_mute(chip, 1);
534 snd_ad1848_set_data_format(chip, hw_params);
535 snd_ad1848_mce_up(chip);
536 spin_lock_irqsave(&chip->reg_lock, flags);
537 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
538 spin_unlock_irqrestore(&chip->reg_lock, flags);
539 snd_ad1848_mce_down(chip);
540 snd_ad1848_calibrate_mute(chip, 0);
544 static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
546 return snd_pcm_lib_free_pages(substream);
549 static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
551 struct snd_wss *chip = snd_pcm_substream_chip(substream);
552 struct snd_pcm_runtime *runtime = substream->runtime;
554 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
555 unsigned int count = snd_pcm_lib_period_bytes(substream);
557 chip->c_dma_size = size;
558 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
559 snd_dma_program(chip->dma2, runtime->dma_addr, size,
560 DMA_MODE_READ | DMA_AUTOINIT);
561 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
562 spin_lock_irqsave(&chip->reg_lock, flags);
563 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
564 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
565 spin_unlock_irqrestore(&chip->reg_lock, flags);
569 static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
571 struct snd_wss *chip = dev_id;
573 if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
574 (chip->mode & AD1848_MODE_RUNNING))
575 snd_pcm_period_elapsed(chip->playback_substream);
576 if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
577 (chip->mode & AD1848_MODE_RUNNING))
578 snd_pcm_period_elapsed(chip->capture_substream);
579 outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
583 static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
585 struct snd_wss *chip = snd_pcm_substream_chip(substream);
588 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
590 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
591 return bytes_to_frames(substream->runtime, ptr);
594 static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
596 struct snd_wss *chip = snd_pcm_substream_chip(substream);
599 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
601 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
602 return bytes_to_frames(substream->runtime, ptr);
609 static void snd_ad1848_thinkpad_twiddle(struct snd_wss *chip, int on)
613 if (!chip->thinkpad_flag) return;
615 outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
616 tmp = inb(AD1848_THINKPAD_CTL_PORT2);
620 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
623 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
625 outb(tmp, AD1848_THINKPAD_CTL_PORT2);
630 static void snd_ad1848_suspend(struct snd_wss *chip)
632 snd_pcm_suspend_all(chip->pcm);
633 if (chip->thinkpad_flag)
634 snd_ad1848_thinkpad_twiddle(chip, 0);
637 static void snd_ad1848_resume(struct snd_wss *chip)
641 if (chip->thinkpad_flag)
642 snd_ad1848_thinkpad_twiddle(chip, 1);
644 /* clear any pendings IRQ */
645 inb(AD1848P(chip, STATUS));
646 outb(0, AD1848P(chip, STATUS));
649 snd_ad1848_mce_down(chip);
650 for (i = 0; i < 16; i++)
651 snd_ad1848_out(chip, i, chip->image[i]);
652 snd_ad1848_mce_up(chip);
653 snd_ad1848_mce_down(chip);
655 #endif /* CONFIG_PM */
657 static int snd_ad1848_probe(struct snd_wss *chip)
660 int i, id, rev, ad1847;
664 snd_ad1848_debug(chip);
667 for (i = 0; i < 1000; i++) {
669 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
672 spin_lock_irqsave(&chip->reg_lock, flags);
673 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
674 snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
675 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
676 rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
678 spin_unlock_irqrestore(&chip->reg_lock, flags);
683 if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
684 spin_unlock_irqrestore(&chip->reg_lock, flags);
688 spin_unlock_irqrestore(&chip->reg_lock, flags);
692 return -ENODEV; /* no valid device found */
693 if (chip->hardware == AD1848_HW_DETECT) {
695 chip->hardware = AD1848_HW_AD1847;
697 chip->hardware = AD1848_HW_AD1848;
698 rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
700 chip->hardware = AD1848_HW_CS4248;
701 } else if ((rev & 0x0f) == 0x0a) {
702 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
703 for (i = 0; i < 16; ++i) {
704 if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
705 chip->hardware = AD1848_HW_CMI8330;
709 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
713 spin_lock_irqsave(&chip->reg_lock, flags);
714 inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
715 outb(0, AD1848P(chip, STATUS));
717 spin_unlock_irqrestore(&chip->reg_lock, flags);
719 chip->image[AD1848_MISC_INFO] = 0x00;
720 chip->image[AD1848_IFACE_CTRL] =
721 (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
722 ptr = (unsigned char *) &chip->image;
723 snd_ad1848_mce_down(chip);
724 spin_lock_irqsave(&chip->reg_lock, flags);
725 for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
726 snd_ad1848_out(chip, i, *ptr++);
727 spin_unlock_irqrestore(&chip->reg_lock, flags);
728 snd_ad1848_mce_up(chip);
729 snd_ad1848_mce_down(chip);
730 return 0; /* all things are ok.. */
737 static struct snd_pcm_hardware snd_ad1848_playback =
739 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
740 SNDRV_PCM_INFO_MMAP_VALID),
741 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
742 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
743 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
748 .buffer_bytes_max = (128*1024),
749 .period_bytes_min = 64,
750 .period_bytes_max = (128*1024),
756 static struct snd_pcm_hardware snd_ad1848_capture =
758 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
759 SNDRV_PCM_INFO_MMAP_VALID),
760 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
761 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
762 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
767 .buffer_bytes_max = (128*1024),
768 .period_bytes_min = 64,
769 .period_bytes_max = (128*1024),
779 static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
781 struct snd_wss *chip = snd_pcm_substream_chip(substream);
782 struct snd_pcm_runtime *runtime = substream->runtime;
785 if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
787 chip->playback_substream = substream;
788 runtime->hw = snd_ad1848_playback;
789 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
790 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
791 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
795 static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
797 struct snd_wss *chip = snd_pcm_substream_chip(substream);
798 struct snd_pcm_runtime *runtime = substream->runtime;
801 if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
803 chip->capture_substream = substream;
804 runtime->hw = snd_ad1848_capture;
805 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
806 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
807 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
811 static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
813 struct snd_wss *chip = snd_pcm_substream_chip(substream);
815 chip->mode &= ~AD1848_MODE_PLAY;
816 chip->playback_substream = NULL;
817 snd_ad1848_close(chip);
821 static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
823 struct snd_wss *chip = snd_pcm_substream_chip(substream);
825 chip->mode &= ~AD1848_MODE_CAPTURE;
826 chip->capture_substream = NULL;
827 snd_ad1848_close(chip);
831 static int snd_ad1848_free(struct snd_wss *chip)
833 release_and_free_resource(chip->res_port);
835 free_irq(chip->irq, (void *) chip);
836 if (chip->dma1 >= 0) {
837 snd_dma_disable(chip->dma1);
838 free_dma(chip->dma1);
844 static int snd_ad1848_dev_free(struct snd_device *device)
846 struct snd_wss *chip = device->device_data;
847 return snd_ad1848_free(chip);
850 static const char *snd_ad1848_chip_id(struct snd_wss *chip)
852 switch (chip->hardware) {
853 case AD1848_HW_AD1847: return "AD1847";
854 case AD1848_HW_AD1848: return "AD1848";
855 case AD1848_HW_CS4248: return "CS4248";
856 case AD1848_HW_CMI8330: return "CMI8330/C3D";
857 default: return "???";
861 int snd_ad1848_create(struct snd_card *card,
864 unsigned short hardware,
865 struct snd_wss **rchip)
867 static struct snd_device_ops ops = {
868 .dev_free = snd_ad1848_dev_free,
870 struct snd_wss *chip;
874 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
877 spin_lock_init(&chip->reg_lock);
883 chip->single_dma = 1;
884 chip->hardware = hardware;
885 memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
887 if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
888 snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
889 snd_ad1848_free(chip);
892 if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
893 snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
894 snd_ad1848_free(chip);
898 if (request_dma(dma, "AD1848")) {
899 snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
900 snd_ad1848_free(chip);
906 if (hardware == AD1848_HW_THINKPAD) {
907 chip->thinkpad_flag = 1;
908 chip->hardware = AD1848_HW_DETECT; /* reset */
909 snd_ad1848_thinkpad_twiddle(chip, 1);
912 if (snd_ad1848_probe(chip) < 0) {
913 snd_ad1848_free(chip);
917 /* Register device */
918 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
919 snd_ad1848_free(chip);
924 chip->suspend = snd_ad1848_suspend;
925 chip->resume = snd_ad1848_resume;
932 EXPORT_SYMBOL(snd_ad1848_create);
934 static struct snd_pcm_ops snd_ad1848_playback_ops = {
935 .open = snd_ad1848_playback_open,
936 .close = snd_ad1848_playback_close,
937 .ioctl = snd_ad1848_ioctl,
938 .hw_params = snd_ad1848_playback_hw_params,
939 .hw_free = snd_ad1848_playback_hw_free,
940 .prepare = snd_ad1848_playback_prepare,
941 .trigger = snd_ad1848_playback_trigger,
942 .pointer = snd_ad1848_playback_pointer,
945 static struct snd_pcm_ops snd_ad1848_capture_ops = {
946 .open = snd_ad1848_capture_open,
947 .close = snd_ad1848_capture_close,
948 .ioctl = snd_ad1848_ioctl,
949 .hw_params = snd_ad1848_capture_hw_params,
950 .hw_free = snd_ad1848_capture_hw_free,
951 .prepare = snd_ad1848_capture_prepare,
952 .trigger = snd_ad1848_capture_trigger,
953 .pointer = snd_ad1848_capture_pointer,
956 int snd_ad1848_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm)
961 if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
964 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
965 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
967 pcm->private_data = chip;
968 pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
969 strcpy(pcm->name, snd_ad1848_chip_id(chip));
971 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
975 128 * 1024 : 64 * 1024);
983 EXPORT_SYMBOL(snd_ad1848_pcm);
985 const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
987 return direction == SNDRV_PCM_STREAM_PLAYBACK ?
988 &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
991 EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
997 static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
999 static char *texts[4] = {
1000 "Line", "Aux", "Mic", "Mix"
1003 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1005 uinfo->value.enumerated.items = 4;
1006 if (uinfo->value.enumerated.item > 3)
1007 uinfo->value.enumerated.item = 3;
1008 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1012 static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1014 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1015 unsigned long flags;
1017 spin_lock_irqsave(&chip->reg_lock, flags);
1018 ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
1019 ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
1020 spin_unlock_irqrestore(&chip->reg_lock, flags);
1024 static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1026 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1027 unsigned long flags;
1028 unsigned short left, right;
1031 if (ucontrol->value.enumerated.item[0] > 3 ||
1032 ucontrol->value.enumerated.item[1] > 3)
1034 left = ucontrol->value.enumerated.item[0] << 6;
1035 right = ucontrol->value.enumerated.item[1] << 6;
1036 spin_lock_irqsave(&chip->reg_lock, flags);
1037 left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
1038 right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
1039 change = left != chip->image[AD1848_LEFT_INPUT] ||
1040 right != chip->image[AD1848_RIGHT_INPUT];
1041 snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
1042 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
1043 spin_unlock_irqrestore(&chip->reg_lock, flags);
1047 static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1049 int mask = (kcontrol->private_value >> 16) & 0xff;
1051 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1053 uinfo->value.integer.min = 0;
1054 uinfo->value.integer.max = mask;
1058 static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1060 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1061 unsigned long flags;
1062 int reg = kcontrol->private_value & 0xff;
1063 int shift = (kcontrol->private_value >> 8) & 0xff;
1064 int mask = (kcontrol->private_value >> 16) & 0xff;
1065 int invert = (kcontrol->private_value >> 24) & 0xff;
1067 spin_lock_irqsave(&chip->reg_lock, flags);
1068 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1069 spin_unlock_irqrestore(&chip->reg_lock, flags);
1071 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1075 static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1077 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1078 unsigned long flags;
1079 int reg = kcontrol->private_value & 0xff;
1080 int shift = (kcontrol->private_value >> 8) & 0xff;
1081 int mask = (kcontrol->private_value >> 16) & 0xff;
1082 int invert = (kcontrol->private_value >> 24) & 0xff;
1086 val = (ucontrol->value.integer.value[0] & mask);
1090 spin_lock_irqsave(&chip->reg_lock, flags);
1091 val = (chip->image[reg] & ~(mask << shift)) | val;
1092 change = val != chip->image[reg];
1093 snd_ad1848_out(chip, reg, val);
1094 spin_unlock_irqrestore(&chip->reg_lock, flags);
1098 static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1100 int mask = (kcontrol->private_value >> 24) & 0xff;
1102 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1104 uinfo->value.integer.min = 0;
1105 uinfo->value.integer.max = mask;
1109 static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1111 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1112 unsigned long flags;
1113 int left_reg = kcontrol->private_value & 0xff;
1114 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1115 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1116 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1117 int mask = (kcontrol->private_value >> 24) & 0xff;
1118 int invert = (kcontrol->private_value >> 22) & 1;
1120 spin_lock_irqsave(&chip->reg_lock, flags);
1121 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1122 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1123 spin_unlock_irqrestore(&chip->reg_lock, flags);
1125 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1126 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1131 static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1133 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1134 unsigned long flags;
1135 int left_reg = kcontrol->private_value & 0xff;
1136 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1137 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1138 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1139 int mask = (kcontrol->private_value >> 24) & 0xff;
1140 int invert = (kcontrol->private_value >> 22) & 1;
1142 unsigned short val1, val2;
1144 val1 = ucontrol->value.integer.value[0] & mask;
1145 val2 = ucontrol->value.integer.value[1] & mask;
1150 val1 <<= shift_left;
1151 val2 <<= shift_right;
1152 spin_lock_irqsave(&chip->reg_lock, flags);
1153 if (left_reg != right_reg) {
1154 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1155 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1156 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1157 snd_ad1848_out(chip, left_reg, val1);
1158 snd_ad1848_out(chip, right_reg, val2);
1160 val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1161 change = val1 != chip->image[left_reg];
1162 snd_ad1848_out(chip, left_reg, val1);
1164 spin_unlock_irqrestore(&chip->reg_lock, flags);
1170 int snd_ad1848_add_ctl_elem(struct snd_wss *chip,
1171 const struct ad1848_mix_elem *c)
1173 static struct snd_kcontrol_new newctls[] = {
1174 [AD1848_MIX_SINGLE] = {
1175 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1176 .info = snd_ad1848_info_single,
1177 .get = snd_ad1848_get_single,
1178 .put = snd_ad1848_put_single,
1180 [AD1848_MIX_DOUBLE] = {
1181 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1182 .info = snd_ad1848_info_double,
1183 .get = snd_ad1848_get_double,
1184 .put = snd_ad1848_put_double,
1186 [AD1848_MIX_CAPTURE] = {
1187 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1188 .info = snd_ad1848_info_mux,
1189 .get = snd_ad1848_get_mux,
1190 .put = snd_ad1848_put_mux,
1193 struct snd_kcontrol *ctl;
1196 ctl = snd_ctl_new1(&newctls[c->type], chip);
1199 strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
1200 ctl->id.index = c->index;
1201 ctl->private_value = c->private_value;
1203 ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1204 ctl->tlv.p = c->tlv;
1206 if ((err = snd_ctl_add(chip->card, ctl)) < 0)
1211 EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
1213 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
1214 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
1215 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
1217 static struct ad1848_mix_elem snd_ad1848_controls[] = {
1218 AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
1219 AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
1221 AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1222 AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
1223 db_scale_5bit_12db_max),
1224 AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1225 AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
1226 db_scale_5bit_12db_max),
1227 AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
1230 .name = "Capture Source",
1231 .type = AD1848_MIX_CAPTURE,
1233 AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
1234 AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
1238 int snd_ad1848_mixer(struct snd_wss *chip)
1240 struct snd_card *card;
1241 struct snd_pcm *pcm;
1245 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1250 strcpy(card->mixername, pcm->name);
1252 for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
1253 if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
1259 EXPORT_SYMBOL(snd_ad1848_mixer);
1265 static int __init alsa_ad1848_init(void)
1270 static void __exit alsa_ad1848_exit(void)
1274 module_init(alsa_ad1848_init)
1275 module_exit(alsa_ad1848_exit)