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[linux-2.6-omap-h63xx.git] / sound / isa / ad1848 / ad1848_lib.c
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3  *  Routines for control of AD1848/AD1847/CS4248
4  *
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  *   You should have received a copy of the GNU General Public License
17  *   along with this program; if not, write to the Free Software
18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19  *
20  */
21
22 #define SNDRV_MAIN_OBJECT_FILE
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/slab.h>
27 #include <linux/ioport.h>
28 #include <sound/core.h>
29 #include <sound/ad1848.h>
30 #include <sound/control.h>
31 #include <sound/tlv.h>
32 #include <sound/pcm_params.h>
33
34 #include <asm/io.h>
35 #include <asm/dma.h>
36
37 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
38 MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
39 MODULE_LICENSE("GPL");
40
41 #if 0
42 #define SNDRV_DEBUG_MCE
43 #endif
44
45 /*
46  *  Some variables
47  */
48
49 static unsigned char freq_bits[14] = {
50         /* 5510 */      0x00 | AD1848_XTAL2,
51         /* 6620 */      0x0E | AD1848_XTAL2,
52         /* 8000 */      0x00 | AD1848_XTAL1,
53         /* 9600 */      0x0E | AD1848_XTAL1,
54         /* 11025 */     0x02 | AD1848_XTAL2,
55         /* 16000 */     0x02 | AD1848_XTAL1,
56         /* 18900 */     0x04 | AD1848_XTAL2,
57         /* 22050 */     0x06 | AD1848_XTAL2,
58         /* 27042 */     0x04 | AD1848_XTAL1,
59         /* 32000 */     0x06 | AD1848_XTAL1,
60         /* 33075 */     0x0C | AD1848_XTAL2,
61         /* 37800 */     0x08 | AD1848_XTAL2,
62         /* 44100 */     0x0A | AD1848_XTAL2,
63         /* 48000 */     0x0C | AD1848_XTAL1
64 };
65
66 static unsigned int rates[14] = {
67         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
68         27042, 32000, 33075, 37800, 44100, 48000
69 };
70
71 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
72         .count = ARRAY_SIZE(rates),
73         .list = rates,
74         .mask = 0,
75 };
76
77 static unsigned char snd_ad1848_original_image[16] =
78 {
79         0x00,                   /* 00 - lic */
80         0x00,                   /* 01 - ric */
81         0x9f,                   /* 02 - la1ic */
82         0x9f,                   /* 03 - ra1ic */
83         0x9f,                   /* 04 - la2ic */
84         0x9f,                   /* 05 - ra2ic */
85         0xbf,                   /* 06 - loc */
86         0xbf,                   /* 07 - roc */
87         0x20,                   /* 08 - dfr */
88         AD1848_AUTOCALIB,       /* 09 - ic */
89         0x00,                   /* 0a - pc */
90         0x00,                   /* 0b - ti */
91         0x00,                   /* 0c - mi */
92         0x00,                   /* 0d - lbc */
93         0x00,                   /* 0e - dru */
94         0x00,                   /* 0f - drl */
95 };
96
97 /*
98  *  Basic I/O functions
99  */
100
101 static void snd_ad1848_wait(struct snd_wss *chip)
102 {
103         int timeout;
104
105         for (timeout = 250; timeout > 0; timeout--) {
106                 if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
107                         break;
108                 udelay(100);
109         }
110 }
111
112 void snd_ad1848_out(struct snd_wss *chip,
113                            unsigned char reg,
114                            unsigned char value)
115 {
116         snd_ad1848_wait(chip);
117 #ifdef CONFIG_SND_DEBUG
118         if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
119                 snd_printk(KERN_WARNING "auto calibration time out - "
120                            "reg = 0x%x, value = 0x%x\n", reg, value);
121 #endif
122         outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
123         outb(chip->image[reg] = value, AD1848P(chip, REG));
124         mb();
125         snd_printdd("codec out - reg 0x%x = 0x%x\n",
126                         chip->mce_bit | reg, value);
127 }
128
129 EXPORT_SYMBOL(snd_ad1848_out);
130
131 static void snd_ad1848_dout(struct snd_wss *chip,
132                             unsigned char reg, unsigned char value)
133 {
134         snd_ad1848_wait(chip);
135         outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
136         outb(value, AD1848P(chip, REG));
137         mb();
138 }
139
140 static unsigned char snd_ad1848_in(struct snd_wss *chip, unsigned char reg)
141 {
142         snd_ad1848_wait(chip);
143 #ifdef CONFIG_SND_DEBUG
144         if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
145                 snd_printk(KERN_WARNING "auto calibration time out - "
146                            "reg = 0x%x\n", reg);
147 #endif
148         outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
149         mb();
150         return inb(AD1848P(chip, REG));
151 }
152
153 #if 0
154
155 static void snd_ad1848_debug(struct snd_wss *chip)
156 {
157         printk("AD1848 REGS:      INDEX = 0x%02x  ", inb(AD1848P(chip, REGSEL)));
158         printk("                 STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
159         printk("  0x00: left input      = 0x%02x  ", snd_ad1848_in(chip, 0x00));
160         printk("  0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
161         printk("  0x01: right input     = 0x%02x  ", snd_ad1848_in(chip, 0x01));
162         printk("  0x09: iface (CFIG 1)  = 0x%02x\n", snd_ad1848_in(chip, 0x09));
163         printk("  0x02: AUXA left       = 0x%02x  ", snd_ad1848_in(chip, 0x02));
164         printk("  0x0a: pin control     = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
165         printk("  0x03: AUXA right      = 0x%02x  ", snd_ad1848_in(chip, 0x03));
166         printk("  0x0b: init & status   = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
167         printk("  0x04: AUXB left       = 0x%02x  ", snd_ad1848_in(chip, 0x04));
168         printk("  0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
169         printk("  0x05: AUXB right      = 0x%02x  ", snd_ad1848_in(chip, 0x05));
170         printk("  0x0d: loopback        = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
171         printk("  0x06: left output     = 0x%02x  ", snd_ad1848_in(chip, 0x06));
172         printk("  0x0e: data upr count  = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
173         printk("  0x07: right output    = 0x%02x  ", snd_ad1848_in(chip, 0x07));
174         printk("  0x0f: data lwr count  = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
175 }
176
177 #endif
178
179 /*
180  *  AD1848 detection / MCE routines
181  */
182
183 static void snd_ad1848_mce_up(struct snd_wss *chip)
184 {
185         unsigned long flags;
186         int timeout;
187
188         snd_ad1848_wait(chip);
189 #ifdef CONFIG_SND_DEBUG
190         if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
191                 snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
192 #endif
193         spin_lock_irqsave(&chip->reg_lock, flags);
194         chip->mce_bit |= AD1848_MCE;
195         timeout = inb(AD1848P(chip, REGSEL));
196         if (timeout == 0x80)
197                 snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
198         if (!(timeout & AD1848_MCE))
199                 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
200         spin_unlock_irqrestore(&chip->reg_lock, flags);
201 }
202
203 static void snd_ad1848_mce_down(struct snd_wss *chip)
204 {
205         unsigned long flags, timeout;
206         int reg;
207
208         spin_lock_irqsave(&chip->reg_lock, flags);
209         for (timeout = 5; timeout > 0; timeout--)
210                 inb(AD1848P(chip, REGSEL));
211         /* end of cleanup sequence */
212         for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
213                 udelay(100);
214
215         snd_printdd("(1) timeout = %ld\n", timeout);
216
217 #ifdef CONFIG_SND_DEBUG
218         if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
219                 snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
220 #endif
221
222         chip->mce_bit &= ~AD1848_MCE;
223         reg = inb(AD1848P(chip, REGSEL));
224         outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL));
225         if (reg == 0x80)
226                 snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
227         if ((reg & AD1848_MCE) == 0) {
228                 spin_unlock_irqrestore(&chip->reg_lock, flags);
229                 return;
230         }
231
232         /*
233          * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
234          * It may take up to 5 sample periods (at most 907 us @ 5.5125 kHz) for
235          * the process to _start_, so it is important to wait at least that long
236          * before checking.  Otherwise we might think AC has finished when it
237          * has in fact not begun.  It could take 128 (no AC) or 384 (AC) cycles
238          * for ACI to drop.  This gives a wait of at most 70 ms with a more
239          * typical value of 3-9 ms.
240          */
241         timeout = jiffies + msecs_to_jiffies(250);
242         do {
243                 spin_unlock_irqrestore(&chip->reg_lock, flags);
244                 msleep(1);
245                 spin_lock_irqsave(&chip->reg_lock, flags);
246                 reg = snd_ad1848_in(chip, AD1848_TEST_INIT) &
247                       AD1848_CALIB_IN_PROGRESS;
248         } while (reg && time_before(jiffies, timeout));
249         spin_unlock_irqrestore(&chip->reg_lock, flags);
250         if (reg)
251                 snd_printk(KERN_ERR
252                            "mce_down - auto calibration time out (2)\n");
253
254         snd_printdd("(4) jiffies = %lu\n", jiffies);
255         snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
256 }
257
258 static unsigned int snd_ad1848_get_count(unsigned char format,
259                                          unsigned int size)
260 {
261         switch (format & 0xe0) {
262         case AD1848_LINEAR_16:
263                 size >>= 1;
264                 break;
265         }
266         if (format & AD1848_STEREO)
267                 size >>= 1;
268         return size;
269 }
270
271 static int snd_ad1848_trigger(struct snd_wss *chip, unsigned char what,
272                               int channel, int cmd)
273 {
274         int result = 0;
275
276 #if 0
277         printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
278 #endif
279         spin_lock(&chip->reg_lock);
280         if (cmd == SNDRV_PCM_TRIGGER_START) {
281                 if (chip->image[AD1848_IFACE_CTRL] & what) {
282                         spin_unlock(&chip->reg_lock);
283                         return 0;
284                 }
285                 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
286         } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
287                 if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
288                         spin_unlock(&chip->reg_lock);
289                         return 0;
290                 }
291                 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
292         } else {
293                 result = -EINVAL;
294         }
295         spin_unlock(&chip->reg_lock);
296         return result;
297 }
298
299 /*
300  *  CODEC I/O
301  */
302
303 static unsigned char snd_ad1848_get_rate(unsigned int rate)
304 {
305         int i;
306
307         for (i = 0; i < ARRAY_SIZE(rates); i++)
308                 if (rate == rates[i])
309                         return freq_bits[i];
310         snd_BUG();
311         return freq_bits[ARRAY_SIZE(rates) - 1];
312 }
313
314 static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
315                             unsigned int cmd, void *arg)
316 {
317         return snd_pcm_lib_ioctl(substream, cmd, arg);
318 }
319
320 static unsigned char snd_ad1848_get_format(int format, int channels)
321 {
322         unsigned char rformat;
323
324         rformat = AD1848_LINEAR_8;
325         switch (format) {
326         case SNDRV_PCM_FORMAT_A_LAW:    rformat = AD1848_ALAW_8; break;
327         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = AD1848_ULAW_8; break;
328         case SNDRV_PCM_FORMAT_S16_LE:   rformat = AD1848_LINEAR_16; break;
329         }
330         if (channels > 1)
331                 rformat |= AD1848_STEREO;
332 #if 0
333         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
334 #endif
335         return rformat;
336 }
337
338 static void snd_ad1848_calibrate_mute(struct snd_wss *chip, int mute)
339 {
340         unsigned long flags;
341         
342         mute = mute ? 1 : 0;
343         spin_lock_irqsave(&chip->reg_lock, flags);
344         if (chip->calibrate_mute == mute) {
345                 spin_unlock_irqrestore(&chip->reg_lock, flags);
346                 return;
347         }
348         if (!mute) {
349                 snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
350                 snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
351         }
352         snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
353         snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
354         snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
355         snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
356         snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
357         snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
358         chip->calibrate_mute = mute;
359         spin_unlock_irqrestore(&chip->reg_lock, flags);
360 }
361
362 static void snd_ad1848_set_data_format(struct snd_wss *chip,
363                                        struct snd_pcm_hw_params *hw_params)
364 {
365         if (hw_params == NULL) {
366                 chip->image[AD1848_DATA_FORMAT] = 0x20;
367         } else {
368                 chip->image[AD1848_DATA_FORMAT] =
369                     snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
370                     snd_ad1848_get_rate(params_rate(hw_params));
371         }
372         // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
373 }
374
375 static int snd_ad1848_open(struct snd_wss *chip, unsigned int mode)
376 {
377         unsigned long flags;
378
379         if (chip->mode & WSS_MODE_OPEN)
380                 return -EAGAIN;
381
382         snd_ad1848_mce_down(chip);
383
384 #ifdef SNDRV_DEBUG_MCE
385         snd_printk("open: (1)\n");
386 #endif
387         snd_ad1848_mce_up(chip);
388         spin_lock_irqsave(&chip->reg_lock, flags);
389         chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
390                              AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
391                              AD1848_CALIB_MODE);
392         chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
393         snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
394         spin_unlock_irqrestore(&chip->reg_lock, flags);
395         snd_ad1848_mce_down(chip);
396
397 #ifdef SNDRV_DEBUG_MCE
398         snd_printk("open: (2)\n");
399 #endif
400
401         snd_ad1848_set_data_format(chip, NULL);
402
403         snd_ad1848_mce_up(chip);
404         spin_lock_irqsave(&chip->reg_lock, flags);
405         snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
406         spin_unlock_irqrestore(&chip->reg_lock, flags);
407         snd_ad1848_mce_down(chip);
408
409 #ifdef SNDRV_DEBUG_MCE
410         snd_printk("open: (3)\n");
411 #endif
412
413         /* ok. now enable and ack CODEC IRQ */
414         spin_lock_irqsave(&chip->reg_lock, flags);
415         outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
416         outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
417         chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
418         snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
419         spin_unlock_irqrestore(&chip->reg_lock, flags);
420
421         chip->mode = mode;
422
423         return 0;
424 }
425
426 static void snd_ad1848_close(struct snd_wss *chip)
427 {
428         unsigned long flags;
429
430         if (!chip->mode)
431                 return;
432         /* disable IRQ */
433         spin_lock_irqsave(&chip->reg_lock, flags);
434         outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
435         outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
436         chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
437         snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
438         spin_unlock_irqrestore(&chip->reg_lock, flags);
439
440         /* now disable capture & playback */
441
442         snd_ad1848_mce_up(chip);
443         spin_lock_irqsave(&chip->reg_lock, flags);
444         chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
445                              AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
446         snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
447         spin_unlock_irqrestore(&chip->reg_lock, flags);
448         snd_ad1848_mce_down(chip);
449
450         /* clear IRQ again */
451         spin_lock_irqsave(&chip->reg_lock, flags);
452         outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
453         outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
454         spin_unlock_irqrestore(&chip->reg_lock, flags);
455
456         chip->mode = 0;
457 }
458
459 /*
460  *  ok.. exported functions..
461  */
462
463 static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
464                                        int cmd)
465 {
466         struct snd_wss *chip = snd_pcm_substream_chip(substream);
467         return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
468 }
469
470 static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
471                                       int cmd)
472 {
473         struct snd_wss *chip = snd_pcm_substream_chip(substream);
474         return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
475 }
476
477 static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
478                                          struct snd_pcm_hw_params *hw_params)
479 {
480         struct snd_wss *chip = snd_pcm_substream_chip(substream);
481         unsigned long flags;
482         int err;
483
484         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
485                 return err;
486         snd_ad1848_calibrate_mute(chip, 1);
487         snd_ad1848_set_data_format(chip, hw_params);
488         snd_ad1848_mce_up(chip);
489         spin_lock_irqsave(&chip->reg_lock, flags);
490         snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
491         spin_unlock_irqrestore(&chip->reg_lock, flags);
492         snd_ad1848_mce_down(chip);
493         snd_ad1848_calibrate_mute(chip, 0);
494         return 0;
495 }
496
497 static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
498 {
499         return snd_pcm_lib_free_pages(substream);
500 }
501
502 static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
503 {
504         struct snd_wss *chip = snd_pcm_substream_chip(substream);
505         struct snd_pcm_runtime *runtime = substream->runtime;
506         unsigned long flags;
507         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
508         unsigned int count = snd_pcm_lib_period_bytes(substream);
509
510         chip->p_dma_size = size;
511         chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
512         snd_dma_program(chip->dma1, runtime->dma_addr, size,
513                         DMA_MODE_WRITE | DMA_AUTOINIT);
514         count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
515         spin_lock_irqsave(&chip->reg_lock, flags);
516         snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
517         snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
518         spin_unlock_irqrestore(&chip->reg_lock, flags);
519         return 0;
520 }
521
522 static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
523                                         struct snd_pcm_hw_params *hw_params)
524 {
525         struct snd_wss *chip = snd_pcm_substream_chip(substream);
526         unsigned long flags;
527         int err;
528
529         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
530                 return err;
531         snd_ad1848_calibrate_mute(chip, 1);
532         snd_ad1848_set_data_format(chip, hw_params);
533         snd_ad1848_mce_up(chip);
534         spin_lock_irqsave(&chip->reg_lock, flags);
535         snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
536         spin_unlock_irqrestore(&chip->reg_lock, flags);
537         snd_ad1848_mce_down(chip);
538         snd_ad1848_calibrate_mute(chip, 0);
539         return 0;
540 }
541
542 static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
543 {
544         return snd_pcm_lib_free_pages(substream);
545 }
546
547 static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
548 {
549         struct snd_wss *chip = snd_pcm_substream_chip(substream);
550         struct snd_pcm_runtime *runtime = substream->runtime;
551         unsigned long flags;
552         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
553         unsigned int count = snd_pcm_lib_period_bytes(substream);
554
555         chip->c_dma_size = size;
556         chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
557         snd_dma_program(chip->dma2, runtime->dma_addr, size,
558                         DMA_MODE_READ | DMA_AUTOINIT);
559         count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
560         spin_lock_irqsave(&chip->reg_lock, flags);
561         snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
562         snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
563         spin_unlock_irqrestore(&chip->reg_lock, flags);
564         return 0;
565 }
566
567 static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
568 {
569         struct snd_wss *chip = dev_id;
570
571         if ((chip->mode & WSS_MODE_PLAY) && chip->playback_substream)
572                 snd_pcm_period_elapsed(chip->playback_substream);
573         if ((chip->mode & WSS_MODE_RECORD) && chip->capture_substream)
574                 snd_pcm_period_elapsed(chip->capture_substream);
575         outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
576         return IRQ_HANDLED;
577 }
578
579 static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
580 {
581         struct snd_wss *chip = snd_pcm_substream_chip(substream);
582         size_t ptr;
583         
584         if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
585                 return 0;
586         ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
587         return bytes_to_frames(substream->runtime, ptr);
588 }
589
590 static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
591 {
592         struct snd_wss *chip = snd_pcm_substream_chip(substream);
593         size_t ptr;
594
595         if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
596                 return 0;
597         ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
598         return bytes_to_frames(substream->runtime, ptr);
599 }
600
601 /*
602
603  */
604
605 static void snd_ad1848_thinkpad_twiddle(struct snd_wss *chip, int on)
606 {
607         int tmp;
608
609         if (!chip->thinkpad_flag) return;
610
611         outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
612         tmp = inb(AD1848_THINKPAD_CTL_PORT2);
613
614         if (on)
615                 /* turn it on */
616                 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
617         else
618                 /* turn it off */
619                 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
620         
621         outb(tmp, AD1848_THINKPAD_CTL_PORT2);
622
623 }
624
625 #ifdef CONFIG_PM
626 static void snd_ad1848_suspend(struct snd_wss *chip)
627 {
628         snd_pcm_suspend_all(chip->pcm);
629         if (chip->thinkpad_flag)
630                 snd_ad1848_thinkpad_twiddle(chip, 0);
631 }
632
633 static void snd_ad1848_resume(struct snd_wss *chip)
634 {
635         int i;
636
637         if (chip->thinkpad_flag)
638                 snd_ad1848_thinkpad_twiddle(chip, 1);
639
640         /* clear any pendings IRQ */
641         inb(AD1848P(chip, STATUS));
642         outb(0, AD1848P(chip, STATUS));
643         mb();
644
645         snd_ad1848_mce_down(chip);
646         for (i = 0; i < 16; i++)
647                 snd_ad1848_out(chip, i, chip->image[i]);
648         snd_ad1848_mce_up(chip);
649         snd_ad1848_mce_down(chip);
650 }
651 #endif /* CONFIG_PM */
652
653 static int snd_ad1848_probe(struct snd_wss *chip)
654 {
655         unsigned long flags;
656         int i, id, rev, ad1847;
657         unsigned char *ptr;
658
659 #if 0
660         snd_ad1848_debug(chip);
661 #endif
662         id = ad1847 = 0;
663         for (i = 0; i < 1000; i++) {
664                 mb();
665                 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
666                         udelay(500);
667                 else {
668                         spin_lock_irqsave(&chip->reg_lock, flags);
669                         snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
670                         snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
671                         snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
672                         rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
673                         if (rev == 0x65) {
674                                 spin_unlock_irqrestore(&chip->reg_lock, flags);
675                                 id = 1;
676                                 ad1847 = 1;
677                                 break;
678                         }
679                         if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
680                                 spin_unlock_irqrestore(&chip->reg_lock, flags);
681                                 id = 1;
682                                 break;
683                         }
684                         spin_unlock_irqrestore(&chip->reg_lock, flags);
685                 }
686         }
687         if (id != 1)
688                 return -ENODEV; /* no valid device found */
689         if (chip->hardware == WSS_HW_DETECT) {
690                 if (ad1847) {
691                         chip->hardware = WSS_HW_AD1847;
692                 } else {
693                         chip->hardware = WSS_HW_AD1848;
694                         rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
695                         if (rev & 0x80) {
696                                 chip->hardware = WSS_HW_CS4248;
697                         } else if ((rev & 0x0f) == 0x0a) {
698                                 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
699                                 for (i = 0; i < 16; ++i) {
700                                         if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
701                                                 chip->hardware = WSS_HW_CMI8330;
702                                                 break;
703                                         }
704                                 }
705                                 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
706                         }
707                 }
708         }
709         spin_lock_irqsave(&chip->reg_lock, flags);
710         inb(AD1848P(chip, STATUS));     /* clear any pendings IRQ */
711         outb(0, AD1848P(chip, STATUS));
712         mb();
713         spin_unlock_irqrestore(&chip->reg_lock, flags);
714
715         chip->image[AD1848_MISC_INFO] = 0x00;
716         chip->image[AD1848_IFACE_CTRL] =
717             (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
718         ptr = (unsigned char *) &chip->image;
719         snd_ad1848_mce_down(chip);
720         spin_lock_irqsave(&chip->reg_lock, flags);
721         for (i = 0; i < 16; i++)        /* ok.. fill all AD1848 registers */
722                 snd_ad1848_out(chip, i, *ptr++);
723         spin_unlock_irqrestore(&chip->reg_lock, flags);
724         snd_ad1848_mce_up(chip);
725         snd_ad1848_mce_down(chip);
726         return 0;               /* all things are ok.. */
727 }
728
729 /*
730
731  */
732
733 static struct snd_pcm_hardware snd_ad1848_playback =
734 {
735         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
736                                  SNDRV_PCM_INFO_MMAP_VALID),
737         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
738                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
739         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
740         .rate_min =             5510,
741         .rate_max =             48000,
742         .channels_min =         1,
743         .channels_max =         2,
744         .buffer_bytes_max =     (128*1024),
745         .period_bytes_min =     64,
746         .period_bytes_max =     (128*1024),
747         .periods_min =          1,
748         .periods_max =          1024,
749         .fifo_size =            0,
750 };
751
752 static struct snd_pcm_hardware snd_ad1848_capture =
753 {
754         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
755                                  SNDRV_PCM_INFO_MMAP_VALID),
756         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
757                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
758         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
759         .rate_min =             5510,
760         .rate_max =             48000,
761         .channels_min =         1,
762         .channels_max =         2,
763         .buffer_bytes_max =     (128*1024),
764         .period_bytes_min =     64,
765         .period_bytes_max =     (128*1024),
766         .periods_min =          1,
767         .periods_max =          1024,
768         .fifo_size =            0,
769 };
770
771 /*
772
773  */
774
775 static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
776 {
777         struct snd_wss *chip = snd_pcm_substream_chip(substream);
778         struct snd_pcm_runtime *runtime = substream->runtime;
779         int err;
780
781         err = snd_ad1848_open(chip, WSS_MODE_PLAY);
782         if (err < 0)
783                 return err;
784         chip->playback_substream = substream;
785         runtime->hw = snd_ad1848_playback;
786         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
787         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
788         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
789         return 0;
790 }
791
792 static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
793 {
794         struct snd_wss *chip = snd_pcm_substream_chip(substream);
795         struct snd_pcm_runtime *runtime = substream->runtime;
796         int err;
797
798         err = snd_ad1848_open(chip, WSS_MODE_RECORD);
799         if (err < 0)
800                 return err;
801         chip->capture_substream = substream;
802         runtime->hw = snd_ad1848_capture;
803         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
804         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
805         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
806         return 0;
807 }
808
809 static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
810 {
811         struct snd_wss *chip = snd_pcm_substream_chip(substream);
812
813         chip->mode &= ~WSS_MODE_PLAY;
814         chip->playback_substream = NULL;
815         snd_ad1848_close(chip);
816         return 0;
817 }
818
819 static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
820 {
821         struct snd_wss *chip = snd_pcm_substream_chip(substream);
822
823         chip->mode &= ~WSS_MODE_RECORD;
824         chip->capture_substream = NULL;
825         snd_ad1848_close(chip);
826         return 0;
827 }
828
829 static int snd_ad1848_free(struct snd_wss *chip)
830 {
831         release_and_free_resource(chip->res_port);
832         if (chip->irq >= 0)
833                 free_irq(chip->irq, (void *) chip);
834         if (chip->dma1 >= 0) {
835                 snd_dma_disable(chip->dma1);
836                 free_dma(chip->dma1);
837         }
838         kfree(chip);
839         return 0;
840 }
841
842 static int snd_ad1848_dev_free(struct snd_device *device)
843 {
844         struct snd_wss *chip = device->device_data;
845         return snd_ad1848_free(chip);
846 }
847
848 static const char *snd_ad1848_chip_id(struct snd_wss *chip)
849 {
850         switch (chip->hardware) {
851         case AD1848_HW_AD1847:  return "AD1847";
852         case AD1848_HW_AD1848:  return "AD1848";
853         case AD1848_HW_CS4248:  return "CS4248";
854         case AD1848_HW_CMI8330: return "CMI8330/C3D";
855         default:                return "???";
856         }
857 }
858
859 int snd_ad1848_create(struct snd_card *card,
860                       unsigned long port,
861                       int irq, int dma,
862                       unsigned short hardware,
863                       struct snd_wss **rchip)
864 {
865         static struct snd_device_ops ops = {
866                 .dev_free =     snd_ad1848_dev_free,
867         };
868         struct snd_wss *chip;
869         int err;
870
871         *rchip = NULL;
872         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
873         if (chip == NULL)
874                 return -ENOMEM;
875         spin_lock_init(&chip->reg_lock);
876         chip->card = card;
877         chip->port = port;
878         chip->irq = -1;
879         chip->dma1 = -1;
880         chip->dma2 = -1;
881         chip->single_dma = 1;
882         chip->hardware = hardware;
883         memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
884         
885         if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
886                 snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
887                 snd_ad1848_free(chip);
888                 return -EBUSY;
889         }
890         if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
891                 snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
892                 snd_ad1848_free(chip);
893                 return -EBUSY;
894         }
895         chip->irq = irq;
896         if (request_dma(dma, "AD1848")) {
897                 snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
898                 snd_ad1848_free(chip);
899                 return -EBUSY;
900         }
901         chip->dma1 = dma;
902         chip->dma2 = dma;
903
904         if (hardware == WSS_HW_THINKPAD) {
905                 chip->thinkpad_flag = 1;
906                 chip->hardware = WSS_HW_DETECT; /* reset */
907                 snd_ad1848_thinkpad_twiddle(chip, 1);
908         }
909
910         if (snd_ad1848_probe(chip) < 0) {
911                 snd_ad1848_free(chip);
912                 return -ENODEV;
913         }
914
915         /* Register device */
916         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
917                 snd_ad1848_free(chip);
918                 return err;
919         }
920
921 #ifdef CONFIG_PM
922         chip->suspend = snd_ad1848_suspend;
923         chip->resume = snd_ad1848_resume;
924 #endif
925
926         *rchip = chip;
927         return 0;
928 }
929
930 EXPORT_SYMBOL(snd_ad1848_create);
931
932 static struct snd_pcm_ops snd_ad1848_playback_ops = {
933         .open =         snd_ad1848_playback_open,
934         .close =        snd_ad1848_playback_close,
935         .ioctl =        snd_ad1848_ioctl,
936         .hw_params =    snd_ad1848_playback_hw_params,
937         .hw_free =      snd_ad1848_playback_hw_free,
938         .prepare =      snd_ad1848_playback_prepare,
939         .trigger =      snd_ad1848_playback_trigger,
940         .pointer =      snd_ad1848_playback_pointer,
941 };
942
943 static struct snd_pcm_ops snd_ad1848_capture_ops = {
944         .open =         snd_ad1848_capture_open,
945         .close =        snd_ad1848_capture_close,
946         .ioctl =        snd_ad1848_ioctl,
947         .hw_params =    snd_ad1848_capture_hw_params,
948         .hw_free =      snd_ad1848_capture_hw_free,
949         .prepare =      snd_ad1848_capture_prepare,
950         .trigger =      snd_ad1848_capture_trigger,
951         .pointer =      snd_ad1848_capture_pointer,
952 };
953
954 int snd_ad1848_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm)
955 {
956         struct snd_pcm *pcm;
957         int err;
958
959         if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
960                 return err;
961
962         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
963         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
964
965         pcm->private_data = chip;
966         pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
967         strcpy(pcm->name, snd_ad1848_chip_id(chip));
968
969         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
970                                               snd_dma_isa_data(),
971                                               64 * 1024,
972                                               chip->dma1 > 3 ?
973                                                         128 * 1024 : 64 * 1024);
974
975         chip->pcm = pcm;
976         if (rpcm)
977                 *rpcm = pcm;
978         return 0;
979 }
980
981 EXPORT_SYMBOL(snd_ad1848_pcm);
982
983 const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
984 {
985         return direction == SNDRV_PCM_STREAM_PLAYBACK ?
986                 &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
987 }
988
989 EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
990
991 /*
992  *  MIXER part
993  */
994
995 static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
996 {
997         static char *texts[4] = {
998                 "Line", "Aux", "Mic", "Mix"
999         };
1000
1001         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1002         uinfo->count = 2;
1003         uinfo->value.enumerated.items = 4;
1004         if (uinfo->value.enumerated.item > 3)
1005                 uinfo->value.enumerated.item = 3;
1006         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1007         return 0;
1008 }
1009
1010 static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1011 {
1012         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1013         unsigned long flags;
1014         
1015         spin_lock_irqsave(&chip->reg_lock, flags);
1016         ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
1017         ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
1018         spin_unlock_irqrestore(&chip->reg_lock, flags);
1019         return 0;
1020 }
1021
1022 static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1023 {
1024         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1025         unsigned long flags;
1026         unsigned short left, right;
1027         int change;
1028         
1029         if (ucontrol->value.enumerated.item[0] > 3 ||
1030             ucontrol->value.enumerated.item[1] > 3)
1031                 return -EINVAL;
1032         left = ucontrol->value.enumerated.item[0] << 6;
1033         right = ucontrol->value.enumerated.item[1] << 6;
1034         spin_lock_irqsave(&chip->reg_lock, flags);
1035         left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
1036         right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
1037         change = left != chip->image[AD1848_LEFT_INPUT] ||
1038                  right != chip->image[AD1848_RIGHT_INPUT];
1039         snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
1040         snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
1041         spin_unlock_irqrestore(&chip->reg_lock, flags);
1042         return change;
1043 }
1044
1045 static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1046 {
1047         int mask = (kcontrol->private_value >> 16) & 0xff;
1048
1049         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1050         uinfo->count = 1;
1051         uinfo->value.integer.min = 0;
1052         uinfo->value.integer.max = mask;
1053         return 0;
1054 }
1055
1056 static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1057 {
1058         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1059         unsigned long flags;
1060         int reg = kcontrol->private_value & 0xff;
1061         int shift = (kcontrol->private_value >> 8) & 0xff;
1062         int mask = (kcontrol->private_value >> 16) & 0xff;
1063         int invert = (kcontrol->private_value >> 24) & 0xff;
1064         
1065         spin_lock_irqsave(&chip->reg_lock, flags);
1066         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1067         spin_unlock_irqrestore(&chip->reg_lock, flags);
1068         if (invert)
1069                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1070         return 0;
1071 }
1072
1073 static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1074 {
1075         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1076         unsigned long flags;
1077         int reg = kcontrol->private_value & 0xff;
1078         int shift = (kcontrol->private_value >> 8) & 0xff;
1079         int mask = (kcontrol->private_value >> 16) & 0xff;
1080         int invert = (kcontrol->private_value >> 24) & 0xff;
1081         int change;
1082         unsigned short val;
1083         
1084         val = (ucontrol->value.integer.value[0] & mask);
1085         if (invert)
1086                 val = mask - val;
1087         val <<= shift;
1088         spin_lock_irqsave(&chip->reg_lock, flags);
1089         val = (chip->image[reg] & ~(mask << shift)) | val;
1090         change = val != chip->image[reg];
1091         snd_ad1848_out(chip, reg, val);
1092         spin_unlock_irqrestore(&chip->reg_lock, flags);
1093         return change;
1094 }
1095
1096 static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1097 {
1098         int mask = (kcontrol->private_value >> 24) & 0xff;
1099
1100         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1101         uinfo->count = 2;
1102         uinfo->value.integer.min = 0;
1103         uinfo->value.integer.max = mask;
1104         return 0;
1105 }
1106
1107 static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1108 {
1109         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1110         unsigned long flags;
1111         int left_reg = kcontrol->private_value & 0xff;
1112         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1113         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1114         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1115         int mask = (kcontrol->private_value >> 24) & 0xff;
1116         int invert = (kcontrol->private_value >> 22) & 1;
1117         
1118         spin_lock_irqsave(&chip->reg_lock, flags);
1119         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1120         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1121         spin_unlock_irqrestore(&chip->reg_lock, flags);
1122         if (invert) {
1123                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1124                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1125         }
1126         return 0;
1127 }
1128
1129 static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1130 {
1131         struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1132         unsigned long flags;
1133         int left_reg = kcontrol->private_value & 0xff;
1134         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1135         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1136         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1137         int mask = (kcontrol->private_value >> 24) & 0xff;
1138         int invert = (kcontrol->private_value >> 22) & 1;
1139         int change;
1140         unsigned short val1, val2;
1141         
1142         val1 = ucontrol->value.integer.value[0] & mask;
1143         val2 = ucontrol->value.integer.value[1] & mask;
1144         if (invert) {
1145                 val1 = mask - val1;
1146                 val2 = mask - val2;
1147         }
1148         val1 <<= shift_left;
1149         val2 <<= shift_right;
1150         spin_lock_irqsave(&chip->reg_lock, flags);
1151         if (left_reg != right_reg) {
1152                 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1153                 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1154                 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1155                 snd_ad1848_out(chip, left_reg, val1);
1156                 snd_ad1848_out(chip, right_reg, val2);
1157         } else {
1158                 val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1159                 change = val1 != chip->image[left_reg];
1160                 snd_ad1848_out(chip, left_reg, val1);           
1161         }
1162         spin_unlock_irqrestore(&chip->reg_lock, flags);
1163         return change;
1164 }
1165
1166 /*
1167  */
1168 int snd_ad1848_add_ctl_elem(struct snd_wss *chip,
1169                             const struct ad1848_mix_elem *c)
1170 {
1171         static struct snd_kcontrol_new newctls[] = {
1172                 [AD1848_MIX_SINGLE] = {
1173                         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1174                         .info = snd_ad1848_info_single,
1175                         .get = snd_ad1848_get_single,
1176                         .put = snd_ad1848_put_single,
1177                 },
1178                 [AD1848_MIX_DOUBLE] = {
1179                         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1180                         .info = snd_ad1848_info_double,
1181                         .get = snd_ad1848_get_double,
1182                         .put = snd_ad1848_put_double,
1183                 },
1184                 [AD1848_MIX_CAPTURE] = {
1185                         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1186                         .info = snd_ad1848_info_mux,
1187                         .get = snd_ad1848_get_mux,
1188                         .put = snd_ad1848_put_mux,
1189                 },
1190         };
1191         struct snd_kcontrol *ctl;
1192         int err;
1193
1194         ctl = snd_ctl_new1(&newctls[c->type], chip);
1195         if (! ctl)
1196                 return -ENOMEM;
1197         strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
1198         ctl->id.index = c->index;
1199         ctl->private_value = c->private_value;
1200         if (c->tlv) {
1201                 ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1202                 ctl->tlv.p = c->tlv;
1203         }
1204         if ((err = snd_ctl_add(chip->card, ctl)) < 0)
1205                 return err;
1206         return 0;
1207 }
1208
1209 EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
1210
1211 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
1212 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
1213 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
1214
1215 #define AD1848_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1216 { .name = xname, \
1217   .index = xindex, \
1218   .type = AD1848_MIX_SINGLE, \
1219   .private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert), \
1220   .tlv = xtlv }
1221
1222 #define AD1848_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1223 { .name = xname, \
1224   .index = xindex, \
1225   .type = AD1848_MIX_DOUBLE, \
1226   .private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert), \
1227   .tlv = xtlv }
1228
1229 static struct ad1848_mix_elem snd_ad1848_controls[] = {
1230 AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
1231 AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
1232                   db_scale_6bit),
1233 AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1234 AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
1235                   db_scale_5bit_12db_max),
1236 AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1237 AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
1238                   db_scale_5bit_12db_max),
1239 AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
1240                   db_scale_rec_gain),
1241 {
1242         .name = "Capture Source",
1243         .type = AD1848_MIX_CAPTURE,
1244 },
1245 AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
1246 AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
1247                   db_scale_6bit),
1248 };
1249                                         
1250 int snd_ad1848_mixer(struct snd_wss *chip)
1251 {
1252         struct snd_card *card;
1253         struct snd_pcm *pcm;
1254         unsigned int idx;
1255         int err;
1256
1257         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1258
1259         pcm = chip->pcm;
1260         card = chip->card;
1261
1262         strcpy(card->mixername, pcm->name);
1263
1264         for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
1265                 if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
1266                         return err;
1267
1268         return 0;
1269 }
1270
1271 EXPORT_SYMBOL(snd_ad1848_mixer);
1272
1273 /*
1274  *  INIT part
1275  */
1276
1277 static int __init alsa_ad1848_init(void)
1278 {
1279         return 0;
1280 }
1281
1282 static void __exit alsa_ad1848_exit(void)
1283 {
1284 }
1285
1286 module_init(alsa_ad1848_init)
1287 module_exit(alsa_ad1848_exit)