2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
24 #include <asm/sizes.h>
26 #include <sound/driver.h>
27 #include <sound/core.h>
28 #include <sound/initval.h>
29 #include <sound/ac97_codec.h>
30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h>
36 #define DRIVER_NAME "aaci-pl041"
39 * PM support is not complete. Turn it off.
43 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
45 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
48 * Ensure that the slot 1/2 RX registers are empty.
50 v = readl(aaci->base + AACI_SLFR);
52 readl(aaci->base + AACI_SL2RX);
54 readl(aaci->base + AACI_SL1RX);
56 writel(maincr, aaci->base + AACI_MAINCR);
61 * The recommended use of programming the external codec through slot 1
62 * and slot 2 data is to use the channels during setup routines and the
63 * slot register at any other time. The data written into slot 1, slot 2
64 * and slot 12 registers is transmitted only when their corresponding
65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
68 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
70 struct aaci *aaci = ac97->private_data;
76 mutex_lock(&aaci->ac97_sem);
78 aaci_ac97_select_codec(aaci, ac97);
81 * P54: You must ensure that AACI_SL2TX is always written
82 * to, if required, before data is written to AACI_SL1TX.
84 writel(val << 4, aaci->base + AACI_SL2TX);
85 writel(reg << 12, aaci->base + AACI_SL1TX);
88 * Wait for the transmission of both slots to complete.
91 v = readl(aaci->base + AACI_SLFR);
92 } while (v & (SLFR_1TXB|SLFR_2TXB));
94 mutex_unlock(&aaci->ac97_sem);
98 * Read an AC'97 register.
100 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
102 struct aaci *aaci = ac97->private_data;
108 mutex_lock(&aaci->ac97_sem);
110 aaci_ac97_select_codec(aaci, ac97);
113 * Write the register address to slot 1.
115 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
118 * Wait for the transmission to complete.
121 v = readl(aaci->base + AACI_SLFR);
122 } while (v & SLFR_1TXB);
125 * Give the AC'97 codec more than enough time
126 * to respond. (42us = ~2 frames at 48kHz.)
131 * Wait for slot 2 to indicate data.
135 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
136 } while (v != (SLFR_1RXV|SLFR_2RXV));
138 v = readl(aaci->base + AACI_SL1RX) >> 12;
140 v = readl(aaci->base + AACI_SL2RX) >> 4;
142 dev_err(&aaci->dev->dev,
143 "wrong ac97 register read back (%x != %x)\n",
148 mutex_unlock(&aaci->ac97_sem);
152 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
158 val = readl(aacirun->base + AACI_SR);
159 } while (val & (SR_TXB|SR_RXB) && timeout--);
167 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
169 if (mask & ISR_ORINTR) {
170 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
171 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
174 if (mask & ISR_RXTOINTR) {
175 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
176 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
179 if (mask & ISR_RXINTR) {
180 struct aaci_runtime *aacirun = &aaci->capture;
183 if (!aacirun->substream || !aacirun->start) {
184 dev_warn(&aaci->dev->dev, "RX interrupt???");
185 writel(0, aacirun->base + AACI_IE);
191 unsigned int len = aacirun->fifosz;
194 if (aacirun->bytes <= 0) {
195 aacirun->bytes += aacirun->period;
197 spin_unlock(&aaci->lock);
198 snd_pcm_period_elapsed(aacirun->substream);
199 spin_lock(&aaci->lock);
201 if (!(aacirun->cr & CR_EN))
204 val = readl(aacirun->base + AACI_SR);
205 if (!(val & SR_RXHF))
207 if (!(val & SR_RXFF))
210 aacirun->bytes -= len;
212 /* reading 16 bytes at a time */
213 for( ; len > 0; len -= 16) {
215 "ldmia %1, {r0, r1, r2, r3}\n\t"
216 "stmia %0!, {r0, r1, r2, r3}"
218 : "r" (aacirun->fifo)
219 : "r0", "r1", "r2", "r3", "cc");
221 if (ptr >= aacirun->end)
222 ptr = aacirun->start;
228 if (mask & ISR_URINTR) {
229 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
230 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
233 if (mask & ISR_TXINTR) {
234 struct aaci_runtime *aacirun = &aaci->playback;
237 if (!aacirun->substream || !aacirun->start) {
238 dev_warn(&aaci->dev->dev, "TX interrupt???");
239 writel(0, aacirun->base + AACI_IE);
245 unsigned int len = aacirun->fifosz;
248 if (aacirun->bytes <= 0) {
249 aacirun->bytes += aacirun->period;
251 spin_unlock(&aaci->lock);
252 snd_pcm_period_elapsed(aacirun->substream);
253 spin_lock(&aaci->lock);
255 if (!(aacirun->cr & CR_EN))
258 val = readl(aacirun->base + AACI_SR);
259 if (!(val & SR_TXHE))
261 if (!(val & SR_TXFE))
264 aacirun->bytes -= len;
266 /* writing 16 bytes at a time */
267 for ( ; len > 0; len -= 16) {
269 "ldmia %0!, {r0, r1, r2, r3}\n\t"
270 "stmia %1, {r0, r1, r2, r3}"
272 : "r" (aacirun->fifo)
273 : "r0", "r1", "r2", "r3", "cc");
275 if (ptr >= aacirun->end)
276 ptr = aacirun->start;
284 static irqreturn_t aaci_irq(int irq, void *devid)
286 struct aaci *aaci = devid;
290 spin_lock(&aaci->lock);
291 mask = readl(aaci->base + AACI_ALLINTS);
294 for (i = 0; i < 4; i++, m >>= 7) {
296 aaci_fifo_irq(aaci, i, m);
300 spin_unlock(&aaci->lock);
302 return mask ? IRQ_HANDLED : IRQ_NONE;
312 unsigned char codec_idx;
313 unsigned char rate_idx;
316 static struct aaci_stream aaci_streams[] = {
319 .rate_idx = AC97_RATES_FRONT_DAC,
321 [ACSTREAM_SURROUND] = {
323 .rate_idx = AC97_RATES_SURR_DAC,
327 .rate_idx = AC97_RATES_LFE_DAC,
331 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
333 struct aaci_stream *s = aaci_streams + streamid;
334 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
337 static unsigned int rate_list[] = {
338 5512, 8000, 11025, 16000, 22050, 32000, 44100,
339 48000, 64000, 88200, 96000, 176400, 192000
343 * Double-rate rule: we can support double rate iff channels == 2
347 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
349 struct aaci *aaci = rule->private;
350 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
351 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
355 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
357 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
359 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
362 return snd_interval_list(hw_param_interval(p, rule->var),
363 ARRAY_SIZE(rate_list), rate_list,
367 static struct snd_pcm_hardware aaci_hw_info = {
368 .info = SNDRV_PCM_INFO_MMAP |
369 SNDRV_PCM_INFO_MMAP_VALID |
370 SNDRV_PCM_INFO_INTERLEAVED |
371 SNDRV_PCM_INFO_BLOCK_TRANSFER |
372 SNDRV_PCM_INFO_RESUME,
375 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
376 * words. It also doesn't support 12-bit at all.
378 .formats = SNDRV_PCM_FMTBIT_S16_LE,
380 /* should this be continuous or knot? */
381 .rates = SNDRV_PCM_RATE_CONTINUOUS,
386 .buffer_bytes_max = 64 * 1024,
387 .period_bytes_min = 256,
388 .period_bytes_max = PAGE_SIZE,
390 .periods_max = PAGE_SIZE / 16,
393 static int __aaci_pcm_open(struct aaci *aaci,
394 struct snd_pcm_substream *substream,
395 struct aaci_runtime *aacirun)
397 struct snd_pcm_runtime *runtime = substream->runtime;
400 aacirun->substream = substream;
401 runtime->private_data = aacirun;
402 runtime->hw = aaci_hw_info;
405 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
406 * mode, each 32-bit word contains one sample. If we're in
407 * compact mode, each 32-bit word contains two samples, effectively
408 * halving the FIFO size. However, we don't know for sure which
409 * we'll be using at this point. We set this to the lower limit.
411 runtime->hw.fifo_size = aaci->fifosize * 2;
414 * Add rule describing hardware rate dependency
415 * on the number of channels.
417 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
418 aaci_rule_rate_by_channels, aaci,
419 SNDRV_PCM_HW_PARAM_CHANNELS,
420 SNDRV_PCM_HW_PARAM_RATE, -1);
424 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
439 static int aaci_pcm_close(struct snd_pcm_substream *substream)
441 struct aaci *aaci = substream->private_data;
442 struct aaci_runtime *aacirun = substream->runtime->private_data;
444 WARN_ON(aacirun->cr & CR_EN);
446 aacirun->substream = NULL;
447 free_irq(aaci->dev->irq[0], aaci);
452 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
454 struct aaci_runtime *aacirun = substream->runtime->private_data;
457 * This must not be called with the device enabled.
459 WARN_ON(aacirun->cr & CR_EN);
461 if (aacirun->pcm_open)
462 snd_ac97_pcm_close(aacirun->pcm);
463 aacirun->pcm_open = 0;
466 * Clear out the DMA and any allocated buffers.
468 devdma_hw_free(NULL, substream);
473 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
474 struct aaci_runtime *aacirun,
475 struct snd_pcm_hw_params *params)
479 aaci_pcm_hw_free(substream);
481 err = devdma_hw_alloc(NULL, substream,
482 params_buffer_bytes(params));
486 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
487 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
488 params_channels(params),
489 aacirun->pcm->r[0].slots);
491 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
492 params_channels(params),
493 aacirun->pcm->r[1].slots);
498 aacirun->pcm_open = 1;
504 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
506 struct snd_pcm_runtime *runtime = substream->runtime;
507 struct aaci_runtime *aacirun = runtime->private_data;
509 aacirun->start = (void *)runtime->dma_area;
510 aacirun->end = aacirun->start + runtime->dma_bytes;
511 aacirun->ptr = aacirun->start;
513 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
518 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
520 struct snd_pcm_runtime *runtime = substream->runtime;
521 struct aaci_runtime *aacirun = runtime->private_data;
522 ssize_t bytes = aacirun->ptr - aacirun->start;
524 return bytes_to_frames(runtime, bytes);
527 static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma)
529 return devdma_mmap(NULL, substream, vma);
534 * Playback specific ALSA stuff
536 static const u32 channels_to_txmask[] = {
537 [2] = CR_SL3 | CR_SL4,
538 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
539 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
543 * We can support two and four channel audio. Unfortunately
544 * six channel audio requires a non-standard channel ordering:
546 * 4 -> FL(3), FR(4), SL(7), SR(8)
547 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
548 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
549 * This requires an ALSA configuration file to correct.
551 static unsigned int channel_list[] = { 2, 4, 6 };
554 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
556 struct aaci *aaci = rule->private;
557 unsigned int chan_mask = 1 << 0, slots;
560 * pcms[0] is the our 5.1 PCM instance.
562 slots = aaci->ac97_bus->pcms[0].r[0].slots;
563 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
565 if (slots & (1 << AC97_SLOT_LFE))
569 return snd_interval_list(hw_param_interval(p, rule->var),
570 ARRAY_SIZE(channel_list), channel_list,
574 static int aaci_pcm_open(struct snd_pcm_substream *substream)
576 struct aaci *aaci = substream->private_data;
580 * Add rule describing channel dependency.
582 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
583 SNDRV_PCM_HW_PARAM_CHANNELS,
584 aaci_rule_channels, aaci,
585 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
589 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
590 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
592 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
597 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
598 struct snd_pcm_hw_params *params)
600 struct aaci *aaci = substream->private_data;
601 struct aaci_runtime *aacirun = substream->runtime->private_data;
602 unsigned int channels = params_channels(params);
605 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
606 !channels_to_txmask[channels]);
608 ret = aaci_pcm_hw_params(substream, aacirun, params);
611 * Enable FIFO, compact mode, 16 bits per sample.
612 * FIXME: double rate slots?
615 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
616 aacirun->cr |= channels_to_txmask[channels];
618 aacirun->fifosz = aaci->fifosize * 4;
619 if (aacirun->cr & CR_COMPACT)
620 aacirun->fifosz >>= 1;
625 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
629 ie = readl(aacirun->base + AACI_IE);
630 ie &= ~(IE_URIE|IE_TXIE);
631 writel(ie, aacirun->base + AACI_IE);
632 aacirun->cr &= ~CR_EN;
633 aaci_chan_wait_ready(aacirun);
634 writel(aacirun->cr, aacirun->base + AACI_TXCR);
637 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
641 aaci_chan_wait_ready(aacirun);
642 aacirun->cr |= CR_EN;
644 ie = readl(aacirun->base + AACI_IE);
645 ie |= IE_URIE | IE_TXIE;
646 writel(ie, aacirun->base + AACI_IE);
647 writel(aacirun->cr, aacirun->base + AACI_TXCR);
650 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
652 struct aaci *aaci = substream->private_data;
653 struct aaci_runtime *aacirun = substream->runtime->private_data;
657 spin_lock_irqsave(&aaci->lock, flags);
659 case SNDRV_PCM_TRIGGER_START:
660 aaci_pcm_playback_start(aacirun);
663 case SNDRV_PCM_TRIGGER_RESUME:
664 aaci_pcm_playback_start(aacirun);
667 case SNDRV_PCM_TRIGGER_STOP:
668 aaci_pcm_playback_stop(aacirun);
671 case SNDRV_PCM_TRIGGER_SUSPEND:
672 aaci_pcm_playback_stop(aacirun);
675 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
678 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
684 spin_unlock_irqrestore(&aaci->lock, flags);
689 static struct snd_pcm_ops aaci_playback_ops = {
690 .open = aaci_pcm_open,
691 .close = aaci_pcm_close,
692 .ioctl = snd_pcm_lib_ioctl,
693 .hw_params = aaci_pcm_playback_hw_params,
694 .hw_free = aaci_pcm_hw_free,
695 .prepare = aaci_pcm_prepare,
696 .trigger = aaci_pcm_playback_trigger,
697 .pointer = aaci_pcm_pointer,
698 .mmap = aaci_pcm_mmap,
701 static int aaci_pcm_capture_hw_params(snd_pcm_substream_t *substream,
702 snd_pcm_hw_params_t *params)
704 struct aaci *aaci = substream->private_data;
705 struct aaci_runtime *aacirun = substream->runtime->private_data;
708 ret = aaci_pcm_hw_params(substream, aacirun, params);
711 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
713 /* Line in record: slot 3 and 4 */
714 aacirun->cr |= CR_SL3 | CR_SL4;
716 aacirun->fifosz = aaci->fifosize * 4;
718 if (aacirun->cr & CR_COMPACT)
719 aacirun->fifosz >>= 1;
724 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
728 aaci_chan_wait_ready(aacirun);
730 ie = readl(aacirun->base + AACI_IE);
731 ie &= ~(IE_ORIE | IE_RXIE);
732 writel(ie, aacirun->base+AACI_IE);
734 aacirun->cr &= ~CR_EN;
736 writel(aacirun->cr, aacirun->base + AACI_RXCR);
739 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
743 aaci_chan_wait_ready(aacirun);
746 /* RX Timeout value: bits 28:17 in RXCR */
747 aacirun->cr |= 0xf << 17;
750 aacirun->cr |= CR_EN;
751 writel(aacirun->cr, aacirun->base + AACI_RXCR);
753 ie = readl(aacirun->base + AACI_IE);
754 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
755 writel(ie, aacirun->base + AACI_IE);
758 static int aaci_pcm_capture_trigger(snd_pcm_substream_t *substream, int cmd){
760 struct aaci *aaci = substream->private_data;
761 struct aaci_runtime *aacirun = substream->runtime->private_data;
765 spin_lock_irqsave(&aaci->lock, flags);
768 case SNDRV_PCM_TRIGGER_START:
769 aaci_pcm_capture_start(aacirun);
772 case SNDRV_PCM_TRIGGER_RESUME:
773 aaci_pcm_capture_start(aacirun);
776 case SNDRV_PCM_TRIGGER_STOP:
777 aaci_pcm_capture_stop(aacirun);
780 case SNDRV_PCM_TRIGGER_SUSPEND:
781 aaci_pcm_capture_stop(aacirun);
784 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
787 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
794 spin_unlock_irqrestore(&aaci->lock, flags);
799 static int aaci_pcm_capture_prepare(snd_pcm_substream_t *substream)
801 struct snd_pcm_runtime *runtime = substream->runtime;
802 struct aaci *aaci = substream->private_data;
804 aaci_pcm_prepare(substream);
806 /* allow changing of sample rate */
807 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
808 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
809 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
811 /* Record select: Mic: 0, Aux: 3, Line: 4 */
812 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
817 static snd_pcm_ops_t aaci_capture_ops = {
818 .open = aaci_pcm_open,
819 .close = aaci_pcm_close,
820 .ioctl = snd_pcm_lib_ioctl,
821 .hw_params = aaci_pcm_capture_hw_params,
822 .hw_free = aaci_pcm_hw_free,
823 .prepare = aaci_pcm_capture_prepare,
824 .trigger = aaci_pcm_capture_trigger,
825 .pointer = aaci_pcm_pointer,
826 .mmap = aaci_pcm_mmap,
833 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
835 struct aaci *aaci = card->private_data;
836 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
837 snd_pcm_suspend_all(aaci->pcm);
841 static int aaci_do_resume(struct snd_card *card, unsigned int state)
843 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
847 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
849 struct snd_card *card = amba_get_drvdata(dev);
850 return card ? aaci_do_suspend(card) : 0;
853 static int aaci_resume(struct amba_device *dev)
855 struct snd_card *card = amba_get_drvdata(dev);
856 return card ? aaci_do_resume(card) : 0;
859 #define aaci_do_suspend NULL
860 #define aaci_do_resume NULL
861 #define aaci_suspend NULL
862 #define aaci_resume NULL
866 static struct ac97_pcm ac97_defs[] __devinitdata = {
867 [0] = { /* Front PCM */
871 .slots = (1 << AC97_SLOT_PCM_LEFT) |
872 (1 << AC97_SLOT_PCM_RIGHT) |
873 (1 << AC97_SLOT_PCM_CENTER) |
874 (1 << AC97_SLOT_PCM_SLEFT) |
875 (1 << AC97_SLOT_PCM_SRIGHT) |
876 (1 << AC97_SLOT_LFE),
885 .slots = (1 << AC97_SLOT_PCM_LEFT) |
886 (1 << AC97_SLOT_PCM_RIGHT),
895 .slots = (1 << AC97_SLOT_MIC),
901 static struct snd_ac97_bus_ops aaci_bus_ops = {
902 .write = aaci_ac97_write,
903 .read = aaci_ac97_read,
906 static int __devinit aaci_probe_ac97(struct aaci *aaci)
908 struct snd_ac97_template ac97_template;
909 struct snd_ac97_bus *ac97_bus;
910 struct snd_ac97 *ac97;
914 * Assert AACIRESET for 2us
916 writel(0, aaci->base + AACI_RESET);
918 writel(RESET_NRST, aaci->base + AACI_RESET);
921 * Give the AC'97 codec more than enough time
922 * to wake up. (42us = ~2 frames at 48kHz.)
926 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
930 ac97_bus->clock = 48000;
931 aaci->ac97_bus = ac97_bus;
933 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
934 ac97_template.private_data = aaci;
935 ac97_template.num = 0;
936 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
938 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
944 * Disable AC97 PC Beep input on audio codecs.
946 if (ac97_is_audio(ac97))
947 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
949 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
953 aaci->playback.pcm = &ac97_bus->pcms[0];
954 aaci->capture.pcm = &ac97_bus->pcms[1];
960 static void aaci_free_card(struct snd_card *card)
962 struct aaci *aaci = card->private_data;
967 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
970 struct snd_card *card;
972 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
973 THIS_MODULE, sizeof(struct aaci));
975 return ERR_PTR(-ENOMEM);
977 card->private_free = aaci_free_card;
979 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
980 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
981 snprintf(card->longname, sizeof(card->longname),
982 "%s at 0x%016llx, irq %d",
983 card->shortname, (unsigned long long)dev->res.start,
986 aaci = card->private_data;
987 mutex_init(&aaci->ac97_sem);
988 spin_lock_init(&aaci->lock);
992 /* Set MAINCR to allow slot 1 and 2 data IO */
993 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
994 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
999 static int __devinit aaci_init_pcm(struct aaci *aaci)
1001 struct snd_pcm *pcm;
1004 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
1007 pcm->private_data = aaci;
1008 pcm->info_flags = 0;
1010 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
1012 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
1013 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
1019 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
1021 struct aaci_runtime *aacirun = &aaci->playback;
1024 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
1026 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
1027 writel(0, aacirun->fifo);
1029 writel(0, aacirun->base + AACI_TXCR);
1032 * Re-initialise the AACI after the FIFO depth test, to
1033 * ensure that the FIFOs are empty. Unfortunately, merely
1034 * disabling the channel doesn't clear the FIFO.
1036 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
1037 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1040 * If we hit 4096, we failed. Go back to the specified
1049 static int __devinit aaci_probe(struct amba_device *dev, void *id)
1054 ret = amba_request_regions(dev, NULL);
1058 aaci = aaci_init_card(dev);
1060 ret = PTR_ERR(aaci);
1064 aaci->base = ioremap(dev->res.start, SZ_4K);
1071 * Playback uses AACI channel 0
1073 aaci->playback.base = aaci->base + AACI_CSCH1;
1074 aaci->playback.fifo = aaci->base + AACI_DR1;
1077 * Capture uses AACI channel 0
1079 aaci->capture.base = aaci->base + AACI_CSCH1;
1080 aaci->capture.fifo = aaci->base + AACI_DR1;
1082 for (i = 0; i < 4; i++) {
1083 void __iomem *base = aaci->base + i * 0x14;
1085 writel(0, base + AACI_IE);
1086 writel(0, base + AACI_TXCR);
1087 writel(0, base + AACI_RXCR);
1090 writel(0x1fff, aaci->base + AACI_INTCLR);
1091 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1093 ret = aaci_probe_ac97(aaci);
1098 * Size the FIFOs (must be multiple of 16).
1100 aaci->fifosize = aaci_size_fifo(aaci);
1101 if (aaci->fifosize & 15) {
1102 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1108 ret = aaci_init_pcm(aaci);
1112 snd_card_set_dev(aaci->card, &dev->dev);
1114 ret = snd_card_register(aaci->card);
1116 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1118 amba_set_drvdata(dev, aaci->card);
1124 snd_card_free(aaci->card);
1125 amba_release_regions(dev);
1129 static int __devexit aaci_remove(struct amba_device *dev)
1131 struct snd_card *card = amba_get_drvdata(dev);
1133 amba_set_drvdata(dev, NULL);
1136 struct aaci *aaci = card->private_data;
1137 writel(0, aaci->base + AACI_MAINCR);
1139 snd_card_free(card);
1140 amba_release_regions(dev);
1146 static struct amba_id aaci_ids[] = {
1154 static struct amba_driver aaci_driver = {
1156 .name = DRIVER_NAME,
1158 .probe = aaci_probe,
1159 .remove = __devexit_p(aaci_remove),
1160 .suspend = aaci_suspend,
1161 .resume = aaci_resume,
1162 .id_table = aaci_ids,
1165 static int __init aaci_init(void)
1167 return amba_driver_register(&aaci_driver);
1170 static void __exit aaci_exit(void)
1172 amba_driver_unregister(&aaci_driver);
1175 module_init(aaci_init);
1176 module_exit(aaci_exit);
1178 MODULE_LICENSE("GPL");
1179 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");