5 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
6 * Definitions for CS4231 & InterWave chips & compatible chips
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include "cs4231-regs.h"
31 /* defines for codec.mode */
33 #define WSS_MODE_NONE 0x0000
34 #define WSS_MODE_PLAY 0x0001
35 #define WSS_MODE_RECORD 0x0002
36 #define WSS_MODE_TIMER 0x0004
37 #define WSS_MODE_OPEN (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
39 /* defines for codec.hardware */
41 #define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
42 #define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
43 #define WSS_HW_TYPE_MASK 0xff00 /* type mask */
44 #define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
45 #define WSS_HW_CS4231 0x0100 /* CS4231 chip */
46 #define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
47 #define WSS_HW_AD1845 0x0102 /* AD1845 chip */
48 #define WSS_HW_CS4232_MASK 0x0200 /* CS4232 serie (has control ports) */
49 #define WSS_HW_CS4232 0x0200 /* CS4232 */
50 #define WSS_HW_CS4232A 0x0201 /* CS4232A */
51 #define WSS_HW_CS4236 0x0202 /* CS4236 */
52 #define WSS_HW_CS4236B_MASK 0x0400 /* CS4236B serie (has extended control regs) */
53 #define WSS_HW_CS4235 0x0400 /* CS4235 - Crystal Clear (tm) stereo enhancement */
54 #define WSS_HW_CS4236B 0x0401 /* CS4236B */
55 #define WSS_HW_CS4237B 0x0402 /* CS4237B - SRS 3D */
56 #define WSS_HW_CS4238B 0x0403 /* CS4238B - QSOUND 3D */
57 #define WSS_HW_CS4239 0x0404 /* CS4239 - Crystal Clear (tm) stereo enhancement */
58 #define WSS_HW_AD1848_MASK 0x0800 /* AD1848 serie (half duplex) */
59 #define WSS_HW_AD1847 0x0801 /* AD1847 chip */
60 #define WSS_HW_AD1848 0x0802 /* AD1848 chip */
61 #define WSS_HW_CS4248 0x0803 /* CS4248 chip */
62 #define WSS_HW_CMI8330 0x0804 /* CMI8330 chip */
63 #define WSS_HW_THINKPAD 0x0805 /* Thinkpad 360/750/755 */
64 /* compatible, but clones */
65 #define WSS_HW_INTERWAVE 0x1000 /* InterWave chip */
66 #define WSS_HW_OPL3SA2 0x1101 /* OPL3-SA2 chip, similar to cs4231 */
67 #define WSS_HW_OPTI93X 0x1102 /* Opti 930/931/933 */
69 /* defines for codec.hwshare */
70 #define WSS_HWSHARE_IRQ (1<<0)
71 #define WSS_HWSHARE_DMA1 (1<<1)
72 #define WSS_HWSHARE_DMA2 (1<<2)
75 unsigned long port; /* base i/o port */
76 struct resource *res_port;
77 unsigned long cport; /* control base i/o port (CS4236) */
78 struct resource *res_cport;
79 int irq; /* IRQ line */
80 int dma1; /* playback DMA */
81 int dma2; /* record DMA */
82 unsigned short version; /* version of CODEC chip */
83 unsigned short mode; /* see to WSS_MODE_XXXX */
84 unsigned short hardware; /* see to WSS_HW_XXXX */
85 unsigned short hwshare; /* shared resources */
86 unsigned short single_dma:1, /* forced single DMA mode (GUS 16-bit */
87 /* daughter board) or dma1 == dma2 */
88 ebus_flag:1, /* SPARC: EBUS present */
89 thinkpad_flag:1; /* Thinkpad CS4248 needs extra help */
91 struct snd_card *card;
93 struct snd_pcm_substream *playback_substream;
94 struct snd_pcm_substream *capture_substream;
95 struct snd_timer *timer;
97 unsigned char image[32]; /* registers image */
98 unsigned char eimage[32]; /* extended registers image */
99 unsigned char cimage[16]; /* control registers image */
103 unsigned int p_dma_size;
104 unsigned int c_dma_size;
107 struct mutex mce_mutex;
108 struct mutex open_mutex;
110 int (*rate_constraint) (struct snd_pcm_runtime *runtime);
111 void (*set_playback_format) (struct snd_wss *chip,
112 struct snd_pcm_hw_params *hw_params,
114 void (*set_capture_format) (struct snd_wss *chip,
115 struct snd_pcm_hw_params *hw_params,
117 void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
119 void (*suspend) (struct snd_wss *chip);
120 void (*resume) (struct snd_wss *chip);
122 void *dma_private_data;
123 int (*claim_dma) (struct snd_wss *chip,
124 void *dma_private_data, int dma);
125 int (*release_dma) (struct snd_wss *chip,
126 void *dma_private_data, int dma);
129 /* exported functions */
131 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
132 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
133 void snd_cs4236_ext_out(struct snd_wss *chip,
134 unsigned char reg, unsigned char val);
135 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
136 void snd_wss_mce_up(struct snd_wss *chip);
137 void snd_wss_mce_down(struct snd_wss *chip);
139 void snd_wss_overrange(struct snd_wss *chip);
141 irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
143 const char *snd_wss_chip_id(struct snd_wss *chip);
145 int snd_wss_create(struct snd_card *card,
148 int irq, int dma1, int dma2,
149 unsigned short hardware,
150 unsigned short hwshare,
151 struct snd_wss **rchip);
152 int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
153 int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer);
154 int snd_wss_mixer(struct snd_wss *chip);
156 int snd_cs4236_create(struct snd_card *card,
159 int irq, int dma1, int dma2,
160 unsigned short hardware,
161 unsigned short hwshare,
162 struct snd_wss **rchip);
163 int snd_cs4236_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
164 int snd_cs4236_mixer(struct snd_wss *chip);
170 #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
171 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
174 .info = snd_wss_info_single, \
175 .get = snd_wss_get_single, \
176 .put = snd_wss_put_single, \
177 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
179 int snd_wss_info_single(struct snd_kcontrol *kcontrol,
180 struct snd_ctl_elem_info *uinfo);
181 int snd_wss_get_single(struct snd_kcontrol *kcontrol,
182 struct snd_ctl_elem_value *ucontrol);
183 int snd_wss_put_single(struct snd_kcontrol *kcontrol,
184 struct snd_ctl_elem_value *ucontrol);
186 #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
187 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
190 .info = snd_wss_info_double, \
191 .get = snd_wss_get_double, \
192 .put = snd_wss_put_double, \
193 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
194 (shift_right << 19) | (mask << 24) | (invert << 22) }
196 #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
197 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
198 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
201 .info = snd_wss_info_single, \
202 .get = snd_wss_get_single, \
203 .put = snd_wss_put_single, \
204 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
205 .tlv = { .p = (xtlv) } }
207 #define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
208 shift_left, shift_right, mask, invert, xtlv) \
209 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
210 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
213 .info = snd_wss_info_double, \
214 .get = snd_wss_get_double, \
215 .put = snd_wss_put_double, \
216 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
217 (shift_right << 19) | (mask << 24) | (invert << 22), \
218 .tlv = { .p = (xtlv) } }
221 int snd_wss_info_double(struct snd_kcontrol *kcontrol,
222 struct snd_ctl_elem_info *uinfo);
223 int snd_wss_get_double(struct snd_kcontrol *kcontrol,
224 struct snd_ctl_elem_value *ucontrol);
225 int snd_wss_put_double(struct snd_kcontrol *kcontrol,
226 struct snd_ctl_elem_value *ucontrol);
228 #endif /* __SOUND_WSS_H */