4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
31 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33 #define PCI_FUNC(devfn) ((devfn) & 0x07)
35 /* Ioctls for /proc/bus/pci/X/Y nodes. */
36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
44 #include <linux/mod_devicetable.h>
46 #include <linux/types.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <asm/atomic.h>
52 #include <linux/device.h>
54 /* Include the ID list */
55 #include <linux/pci_ids.h>
57 /* File state for mmap()s on /proc/bus/pci/X/Y */
63 /* This defines the direction arg to the DMA mapping routines. */
64 #define PCI_DMA_BIDIRECTIONAL 0
65 #define PCI_DMA_TODEVICE 1
66 #define PCI_DMA_FROMDEVICE 2
67 #define PCI_DMA_NONE 3
69 #define DEVICE_COUNT_RESOURCE 12
71 typedef int __bitwise pci_power_t;
73 #define PCI_D0 ((pci_power_t __force) 0)
74 #define PCI_D1 ((pci_power_t __force) 1)
75 #define PCI_D2 ((pci_power_t __force) 2)
76 #define PCI_D3hot ((pci_power_t __force) 3)
77 #define PCI_D3cold ((pci_power_t __force) 4)
78 #define PCI_UNKNOWN ((pci_power_t __force) 5)
79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
81 /** The pci_channel state describes connectivity between the CPU and
82 * the pci device. If some PCI bus between here and the pci device
83 * has crashed or locked up, this info is reflected here.
85 typedef unsigned int __bitwise pci_channel_state_t;
87 enum pci_channel_state {
88 /* I/O channel is in normal state */
89 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91 /* I/O to channel is blocked */
92 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94 /* PCI card is dead */
95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
98 typedef unsigned int __bitwise pcie_reset_state_t;
100 enum pcie_reset_state {
101 /* Reset is NOT asserted (Use to deassert reset) */
102 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104 /* Use #PERST to reset PCI-E device */
105 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107 /* Use PCI-E Hot Reset to reset device */
108 pcie_hot_reset = (__force pcie_reset_state_t) 3
111 typedef unsigned short __bitwise pci_dev_flags_t;
113 /* INTX_DISABLE in PCI_COMMAND register disables MSI
116 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
119 typedef unsigned short __bitwise pci_bus_flags_t;
121 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
122 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
125 struct pci_cap_saved_state {
126 struct hlist_node next;
132 * The pci_dev structure is used to describe PCI devices.
135 struct list_head global_list; /* node in list of all PCI devices */
136 struct list_head bus_list; /* node in per-bus list */
137 struct pci_bus *bus; /* bus this device is on */
138 struct pci_bus *subordinate; /* bus this device bridges to */
140 void *sysdata; /* hook for sys-specific extension */
141 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
143 unsigned int devfn; /* encoded device & function index */
144 unsigned short vendor;
145 unsigned short device;
146 unsigned short subsystem_vendor;
147 unsigned short subsystem_device;
148 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
149 u8 revision; /* PCI revision, low byte of class word */
150 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
151 u8 pcie_type; /* PCI-E device/port type */
152 u8 rom_base_reg; /* which config register controls the ROM */
153 u8 pin; /* which interrupt pin this device uses */
155 struct pci_driver *driver; /* which driver has allocated this device */
156 u64 dma_mask; /* Mask of the bits of bus address this
157 device implements. Normally this is
158 0xffffffff. You only need to change
159 this if your device has broken DMA
160 or supports 64-bit transfers. */
162 struct device_dma_parameters dma_parms;
164 pci_power_t current_state; /* Current operating state. In ACPI-speak,
165 this is D0-D3, D0 being fully functional,
168 pci_channel_state_t error_state; /* current connectivity state */
169 struct device dev; /* Generic device interface */
171 int cfg_size; /* Size of configuration space */
174 * Instead of touching interrupt line and base address registers
175 * directly, use the values stored here. They might be different!
178 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
180 /* These fields are used by common fixups */
181 unsigned int transparent:1; /* Transparent PCI bridge */
182 unsigned int multifunction:1;/* Part of multi-function device */
183 /* keep track of device state */
184 unsigned int is_added:1;
185 unsigned int is_busmaster:1; /* device is busmaster */
186 unsigned int no_msi:1; /* device may not use msi */
187 unsigned int no_d1d2:1; /* only allow d0 or d3 */
188 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
189 unsigned int broken_parity_status:1; /* Device generates false positive parity */
190 unsigned int msi_enabled:1;
191 unsigned int msix_enabled:1;
192 unsigned int is_managed:1;
193 unsigned int is_pcie:1;
194 pci_dev_flags_t dev_flags;
195 atomic_t enable_cnt; /* pci_enable_device has been called */
197 u32 saved_config_space[16]; /* config space saved at suspend time */
198 struct hlist_head saved_cap_space;
199 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
200 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
201 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
202 #ifdef CONFIG_PCI_MSI
203 struct list_head msi_list;
207 extern struct pci_dev *alloc_pci_dev(void);
209 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
210 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
211 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
212 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
214 static inline int pci_channel_offline(struct pci_dev *pdev)
216 return (pdev->error_state != pci_channel_io_normal);
219 static inline struct pci_cap_saved_state *pci_find_saved_cap(
220 struct pci_dev *pci_dev, char cap)
222 struct pci_cap_saved_state *tmp;
223 struct hlist_node *pos;
225 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
226 if (tmp->cap_nr == cap)
232 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
233 struct pci_cap_saved_state *new_cap)
235 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
239 * For PCI devices, the region numbers are assigned this way:
241 * 0-5 standard PCI regions
243 * 7-10 bridges: address space assigned to buses behind the bridge
246 #define PCI_ROM_RESOURCE 6
247 #define PCI_BRIDGE_RESOURCES 7
248 #define PCI_NUM_RESOURCES 11
250 #ifndef PCI_BUS_NUM_RESOURCES
251 #define PCI_BUS_NUM_RESOURCES 8
254 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
257 struct list_head node; /* node in list of buses */
258 struct pci_bus *parent; /* parent bus this bridge is on */
259 struct list_head children; /* list of child buses */
260 struct list_head devices; /* list of devices on this bus */
261 struct pci_dev *self; /* bridge device as seen by parent */
262 struct resource *resource[PCI_BUS_NUM_RESOURCES];
263 /* address space routed to this bus */
265 struct pci_ops *ops; /* configuration access functions */
266 void *sysdata; /* hook for sys-specific extension */
267 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
269 unsigned char number; /* bus number */
270 unsigned char primary; /* number of primary bridge */
271 unsigned char secondary; /* number of secondary bridge */
272 unsigned char subordinate; /* max number of subordinate buses */
276 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
277 pci_bus_flags_t bus_flags; /* Inherited by child busses */
278 struct device *bridge;
280 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
281 struct bin_attribute *legacy_mem; /* legacy mem */
282 unsigned int is_added:1;
285 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
286 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
289 * Error values that may be returned by PCI functions.
291 #define PCIBIOS_SUCCESSFUL 0x00
292 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
293 #define PCIBIOS_BAD_VENDOR_ID 0x83
294 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
295 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
296 #define PCIBIOS_SET_FAILED 0x88
297 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
299 /* Low-level architecture-dependent routines */
302 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
303 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
307 * ACPI needs to be able to access PCI config space before we've done a
308 * PCI bus scan and created pci_bus structures.
310 extern int raw_pci_read(unsigned int domain, unsigned int bus,
311 unsigned int devfn, int reg, int len, u32 *val);
312 extern int raw_pci_write(unsigned int domain, unsigned int bus,
313 unsigned int devfn, int reg, int len, u32 val);
315 struct pci_bus_region {
316 resource_size_t start;
321 spinlock_t lock; /* protects list, index */
322 struct list_head list; /* for IDs added at runtime */
323 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
326 /* ---------------------------------------------------------------- */
327 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
328 * a set of callbacks in struct pci_error_handlers, then that device driver
329 * will be notified of PCI bus errors, and will be driven to recovery
330 * when an error occurs.
333 typedef unsigned int __bitwise pci_ers_result_t;
335 enum pci_ers_result {
336 /* no result/none/not supported in device driver */
337 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
339 /* Device driver can recover without slot reset */
340 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
342 /* Device driver wants slot to be reset. */
343 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
345 /* Device has completely failed, is unrecoverable */
346 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
348 /* Device driver is fully recovered and operational */
349 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
352 /* PCI bus error event callbacks */
353 struct pci_error_handlers {
354 /* PCI bus error detected on this device */
355 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
356 enum pci_channel_state error);
358 /* MMIO has been re-enabled, but not DMA */
359 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
361 /* PCI Express link has been reset */
362 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
364 /* PCI slot has been reset */
365 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
367 /* Device driver may resume normal operations */
368 void (*resume)(struct pci_dev *dev);
371 /* ---------------------------------------------------------------- */
375 struct list_head node;
377 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
378 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
379 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
380 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
381 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
382 int (*resume_early) (struct pci_dev *dev);
383 int (*resume) (struct pci_dev *dev); /* Device woken up */
384 void (*shutdown) (struct pci_dev *dev);
386 struct pci_error_handlers *err_handler;
387 struct device_driver driver;
388 struct pci_dynids dynids;
391 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
394 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
395 * @_table: device table name
397 * This macro is used to create a struct pci_device_id array (a device table)
398 * in a generic manner.
400 #define DEFINE_PCI_DEVICE_TABLE(_table) \
401 const struct pci_device_id _table[] __devinitconst
404 * PCI_DEVICE - macro used to describe a specific pci device
405 * @vend: the 16 bit PCI Vendor ID
406 * @dev: the 16 bit PCI Device ID
408 * This macro is used to create a struct pci_device_id that matches a
409 * specific device. The subvendor and subdevice fields will be set to
412 #define PCI_DEVICE(vend,dev) \
413 .vendor = (vend), .device = (dev), \
414 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
417 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
418 * @dev_class: the class, subclass, prog-if triple for this device
419 * @dev_class_mask: the class mask for this device
421 * This macro is used to create a struct pci_device_id that matches a
422 * specific PCI class. The vendor, device, subvendor, and subdevice
423 * fields will be set to PCI_ANY_ID.
425 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
426 .class = (dev_class), .class_mask = (dev_class_mask), \
427 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
428 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
431 * PCI_VDEVICE - macro used to describe a specific pci device in short form
432 * @vend: the vendor name
433 * @dev: the 16 bit PCI Device ID
435 * This macro is used to create a struct pci_device_id that matches a
436 * specific PCI device. The subvendor, and subdevice fields will be set
437 * to PCI_ANY_ID. The macro allows the next field to follow as the device
441 #define PCI_VDEVICE(vendor, device) \
442 PCI_VENDOR_ID_##vendor, (device), \
443 PCI_ANY_ID, PCI_ANY_ID, 0, 0
445 /* these external functions are only available when PCI support is enabled */
448 extern struct bus_type pci_bus_type;
450 /* Do NOT directly access these two variables, unless you are arch specific pci
451 * code, or pci core code. */
452 extern struct list_head pci_root_buses; /* list of all known PCI buses */
453 extern struct list_head pci_devices; /* list of all devices */
454 /* Some device drivers need know if pci is initiated */
455 extern int no_pci_devices(void);
457 void pcibios_fixup_bus(struct pci_bus *);
458 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
459 char *pcibios_setup(char *str);
461 /* Used only when drivers/pci/setup.c is used */
462 void pcibios_align_resource(void *, struct resource *, resource_size_t,
464 void pcibios_update_irq(struct pci_dev *, int irq);
466 /* Generic PCI functions used internally */
468 extern struct pci_bus *pci_find_bus(int domain, int busnr);
469 void pci_bus_add_devices(struct pci_bus *bus);
470 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
471 struct pci_ops *ops, void *sysdata);
472 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
475 struct pci_bus *root_bus;
476 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
478 pci_bus_add_devices(root_bus);
481 struct pci_bus *pci_create_bus(struct device *parent, int bus,
482 struct pci_ops *ops, void *sysdata);
483 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
485 int pci_scan_slot(struct pci_bus *bus, int devfn);
486 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
487 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
488 unsigned int pci_scan_child_bus(struct pci_bus *bus);
489 int __must_check pci_bus_add_device(struct pci_dev *dev);
490 void pci_read_bridge_bases(struct pci_bus *child);
491 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
492 struct resource *res);
493 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
494 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
495 extern void pci_dev_put(struct pci_dev *dev);
496 extern void pci_remove_bus(struct pci_bus *b);
497 extern void pci_remove_bus_device(struct pci_dev *dev);
498 extern void pci_stop_bus_device(struct pci_dev *dev);
499 void pci_setup_cardbus(struct pci_bus *bus);
500 extern void pci_sort_breadthfirst(void);
502 /* Generic PCI functions exported to card drivers */
504 #ifdef CONFIG_PCI_LEGACY
505 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
507 const struct pci_dev *from);
508 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
510 #endif /* CONFIG_PCI_LEGACY */
512 int pci_find_capability(struct pci_dev *dev, int cap);
513 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
514 int pci_find_ext_capability(struct pci_dev *dev, int cap);
515 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
516 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
517 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
519 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
520 struct pci_dev *from);
521 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
522 unsigned int ss_vendor, unsigned int ss_device,
523 const struct pci_dev *from);
524 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
525 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
526 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
527 int pci_dev_present(const struct pci_device_id *ids);
529 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
531 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
532 int where, u16 *val);
533 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
534 int where, u32 *val);
535 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
537 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
539 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
542 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
544 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
546 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
548 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
550 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
553 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
555 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
557 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
559 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
561 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
563 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
566 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
569 int __must_check pci_enable_device(struct pci_dev *dev);
570 int __must_check pci_enable_device_io(struct pci_dev *dev);
571 int __must_check pci_enable_device_mem(struct pci_dev *dev);
572 int __must_check pci_reenable_device(struct pci_dev *);
573 int __must_check pcim_enable_device(struct pci_dev *pdev);
574 void pcim_pin_device(struct pci_dev *pdev);
576 static inline int pci_is_managed(struct pci_dev *pdev)
578 return pdev->is_managed;
581 void pci_disable_device(struct pci_dev *dev);
582 void pci_set_master(struct pci_dev *dev);
583 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
584 #define HAVE_PCI_SET_MWI
585 int __must_check pci_set_mwi(struct pci_dev *dev);
586 int pci_try_set_mwi(struct pci_dev *dev);
587 void pci_clear_mwi(struct pci_dev *dev);
588 void pci_intx(struct pci_dev *dev, int enable);
589 void pci_msi_off(struct pci_dev *dev);
590 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
591 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
592 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
593 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
594 int pcix_get_max_mmrbc(struct pci_dev *dev);
595 int pcix_get_mmrbc(struct pci_dev *dev);
596 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
597 int pcie_get_readrq(struct pci_dev *dev);
598 int pcie_set_readrq(struct pci_dev *dev, int rq);
599 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
600 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
601 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
603 /* ROM control related routines */
604 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
605 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
606 size_t pci_get_rom_size(void __iomem *rom, size_t size);
608 /* Power management related routines */
609 int pci_save_state(struct pci_dev *dev);
610 int pci_restore_state(struct pci_dev *dev);
611 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
612 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
613 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
615 /* Functions for PCI Hotplug drivers to use */
616 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
618 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
619 void pci_bus_assign_resources(struct pci_bus *bus);
620 void pci_bus_size_bridges(struct pci_bus *bus);
621 int pci_claim_resource(struct pci_dev *, int);
622 void pci_assign_unassigned_resources(void);
623 void pdev_enable_device(struct pci_dev *);
624 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
625 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
626 int (*)(struct pci_dev *, u8, u8));
627 #define HAVE_PCI_REQ_REGIONS 2
628 int __must_check pci_request_regions(struct pci_dev *, const char *);
629 void pci_release_regions(struct pci_dev *);
630 int __must_check pci_request_region(struct pci_dev *, int, const char *);
631 void pci_release_region(struct pci_dev *, int);
632 int pci_request_selected_regions(struct pci_dev *, int, const char *);
633 void pci_release_selected_regions(struct pci_dev *, int);
635 /* drivers/pci/bus.c */
636 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
637 struct resource *res, resource_size_t size,
638 resource_size_t align, resource_size_t min,
639 unsigned int type_mask,
640 void (*alignf)(void *, struct resource *,
641 resource_size_t, resource_size_t),
643 void pci_enable_bridges(struct pci_bus *bus);
645 /* Proper probing supporting hot-pluggable devices */
646 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
647 const char *mod_name);
648 static inline int __must_check pci_register_driver(struct pci_driver *driver)
650 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
653 void pci_unregister_driver(struct pci_driver *dev);
654 void pci_remove_behind_bridge(struct pci_dev *dev);
655 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
656 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
657 struct pci_dev *dev);
658 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
661 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
663 int pci_cfg_space_size(struct pci_dev *dev);
664 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
666 /* kmem_cache style wrapper around pci_alloc_consistent() */
668 #include <linux/dmapool.h>
670 #define pci_pool dma_pool
671 #define pci_pool_create(name, pdev, size, align, allocation) \
672 dma_pool_create(name, &pdev->dev, size, align, allocation)
673 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
674 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
675 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
677 enum pci_dma_burst_strategy {
678 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
679 strategy_parameter is N/A */
680 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
682 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
683 strategy_parameter byte boundaries */
687 u16 vector; /* kernel uses to write allocated vector */
688 u16 entry; /* driver uses to specify entry, OS writes */
692 #ifndef CONFIG_PCI_MSI
693 static inline int pci_enable_msi(struct pci_dev *dev)
698 static inline void pci_disable_msi(struct pci_dev *dev)
701 static inline int pci_enable_msix(struct pci_dev *dev,
702 struct msix_entry *entries, int nvec)
707 static inline void pci_disable_msix(struct pci_dev *dev)
710 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
713 static inline void pci_restore_msi_state(struct pci_dev *dev)
716 extern int pci_enable_msi(struct pci_dev *dev);
717 extern void pci_disable_msi(struct pci_dev *dev);
718 extern int pci_enable_msix(struct pci_dev *dev,
719 struct msix_entry *entries, int nvec);
720 extern void pci_disable_msix(struct pci_dev *dev);
721 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
722 extern void pci_restore_msi_state(struct pci_dev *dev);
726 /* The functions a driver should call */
727 int ht_create_irq(struct pci_dev *dev, int idx);
728 void ht_destroy_irq(unsigned int irq);
729 #endif /* CONFIG_HT_IRQ */
731 extern void pci_block_user_cfg_access(struct pci_dev *dev);
732 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
735 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
736 * a PCI domain is defined to be a set of PCI busses which share
737 * configuration space.
739 #ifdef CONFIG_PCI_DOMAINS
740 extern int pci_domains_supported;
742 enum { pci_domains_supported = 0 };
743 static inline int pci_domain_nr(struct pci_bus *bus)
748 static inline int pci_proc_domain(struct pci_bus *bus)
752 #endif /* CONFIG_PCI_DOMAINS */
754 #else /* CONFIG_PCI is not enabled */
757 * If the system does not have PCI, clearly these return errors. Define
758 * these as simple inline functions to avoid hair in drivers.
761 #define _PCI_NOP(o, s, t) \
762 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
764 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
766 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
767 _PCI_NOP(o, word, u16 x) \
768 _PCI_NOP(o, dword, u32 x)
769 _PCI_NOP_ALL(read, *)
772 static inline struct pci_dev *pci_find_device(unsigned int vendor,
774 const struct pci_dev *from)
779 static inline struct pci_dev *pci_find_slot(unsigned int bus,
785 static inline struct pci_dev *pci_get_device(unsigned int vendor,
787 struct pci_dev *from)
792 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
794 unsigned int ss_vendor,
795 unsigned int ss_device,
796 const struct pci_dev *from)
801 static inline struct pci_dev *pci_get_class(unsigned int class,
802 struct pci_dev *from)
807 #define pci_dev_present(ids) (0)
808 #define no_pci_devices() (1)
809 #define pci_dev_put(dev) do { } while (0)
811 static inline void pci_set_master(struct pci_dev *dev)
814 static inline int pci_enable_device(struct pci_dev *dev)
819 static inline void pci_disable_device(struct pci_dev *dev)
822 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
827 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
833 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
839 static inline int pci_assign_resource(struct pci_dev *dev, int i)
844 static inline int __pci_register_driver(struct pci_driver *drv,
845 struct module *owner)
850 static inline int pci_register_driver(struct pci_driver *drv)
855 static inline void pci_unregister_driver(struct pci_driver *drv)
858 static inline int pci_find_capability(struct pci_dev *dev, int cap)
863 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
869 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
874 /* Power management related routines */
875 static inline int pci_save_state(struct pci_dev *dev)
880 static inline int pci_restore_state(struct pci_dev *dev)
885 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
890 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
896 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
902 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
907 static inline void pci_release_regions(struct pci_dev *dev)
910 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
912 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
915 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
918 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
921 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
925 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
929 #endif /* CONFIG_PCI */
931 /* Include architecture-dependent settings and functions */
935 /* these helpers provide future and backwards compatibility
936 * for accessing popular PCI BAR info */
937 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
938 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
939 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
940 #define pci_resource_len(dev,bar) \
941 ((pci_resource_start((dev), (bar)) == 0 && \
942 pci_resource_end((dev), (bar)) == \
943 pci_resource_start((dev), (bar))) ? 0 : \
945 (pci_resource_end((dev), (bar)) - \
946 pci_resource_start((dev), (bar)) + 1))
948 /* Similar to the helpers above, these manipulate per-pci_dev
949 * driver-specific data. They are really just a wrapper around
950 * the generic device structure functions of these calls.
952 static inline void *pci_get_drvdata(struct pci_dev *pdev)
954 return dev_get_drvdata(&pdev->dev);
957 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
959 dev_set_drvdata(&pdev->dev, data);
962 /* If you want to know what to call your pci_dev, ask this function.
963 * Again, it's a wrapper around the generic device.
965 static inline char *pci_name(struct pci_dev *pdev)
967 return pdev->dev.bus_id;
971 /* Some archs don't want to expose struct resource to userland as-is
974 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
975 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
976 const struct resource *rsrc, resource_size_t *start,
977 resource_size_t *end)
979 *start = rsrc->start;
982 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
986 * The world is not perfect and supplies us with broken PCI devices.
987 * For at least a part of these bugs we need a work-around, so both
988 * generic (drivers/pci/quirks.c) and per-architecture code can define
989 * fixup hooks to be called for particular buggy devices.
993 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
994 void (*hook)(struct pci_dev *dev);
997 enum pci_fixup_pass {
998 pci_fixup_early, /* Before probing BARs */
999 pci_fixup_header, /* After reading configuration header */
1000 pci_fixup_final, /* Final phase of device fixups */
1001 pci_fixup_enable, /* pci_enable_device() time */
1002 pci_fixup_resume, /* pci_enable_device() time */
1005 /* Anonymous variables would be nice... */
1006 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1007 static const struct pci_fixup __pci_fixup_##name __used \
1008 __attribute__((__section__(#section))) = { vendor, device, hook };
1009 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1010 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1011 vendor##device##hook, vendor, device, hook)
1012 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1013 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1014 vendor##device##hook, vendor, device, hook)
1015 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1016 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1017 vendor##device##hook, vendor, device, hook)
1018 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1019 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1020 vendor##device##hook, vendor, device, hook)
1021 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1022 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1023 resume##vendor##device##hook, vendor, device, hook)
1026 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1028 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1029 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1030 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1031 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1032 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1034 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1036 extern int pci_pci_problems;
1037 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1038 #define PCIPCI_TRITON 2
1039 #define PCIPCI_NATOMA 4
1040 #define PCIPCI_VIAETBF 8
1041 #define PCIPCI_VSFX 16
1042 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1043 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1045 extern unsigned long pci_cardbus_io_size;
1046 extern unsigned long pci_cardbus_mem_size;
1048 extern int pcibios_add_platform_entries(struct pci_dev *dev);
1050 #endif /* __KERNEL__ */
1051 #endif /* LINUX_PCI_H */