include/linux/i2c/twl4030-rtc.h

   1 /*
   2  * include/asm-arm/arch-omap/twl4030-rtc.h
   3  *
   4  * Copyright (C) 2006 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #ifndef __TWL4030_RTC_H__
  21 #define __TWL4030_RTC_H__
  22
  23 #define REG_SECONDS_REG                          (0x0)
  24 #define REG_MINUTES_REG                          (0x1)
  25 #define REG_HOURS_REG                            (0x2)
  26 #define REG_DAYS_REG                             (0x3)
  27 #define REG_MONTHS_REG                           (0x4)
  28 #define REG_YEARS_REG                            (0x5)
  29 #define REG_WEEKS_REG                            (0x6)
  30 #define REG_ALARM_SECONDS_REG                    (0x7)
  31 #define REG_ALARM_MINUTES_REG                    (0x8)
  32 #define REG_ALARM_HOURS_REG                      (0x9)
  33 #define REG_ALARM_DAYS_REG                       (0xA)
  34 #define REG_ALARM_MONTHS_REG                     (0xB)
  35 #define REG_ALARM_YEARS_REG                      (0xC)
  36 #define REG_RTC_CTRL_REG                         (0xD)
  37 #define REG_RTC_STATUS_REG                       (0xE)
  38 #define REG_RTC_INTERRUPTS_REG                   (0xF)
  39 #define REG_RTC_COMP_LSB_REG                     (0x10)
  40 #define REG_RTC_COMP_MSB_REG                     (0x11)
  41
  42 /* REVISIT: these TWL4030 power registers are only used
  43  * by rtc-twl4030 driver, move to an appropriate header
  44  * if other drivers need the registers
  45  */
  46 /* Power registers */
  47 #define REG_PWR_ISR1            0x00
  48 #define REG_PWR_IMR1            0x01
  49 #define REG_PWR_EDR1            0x05
  50
  51 #define PWR_RTC_IT_UNMASK        ~(0x08)
  52 #define PWR_RTC_INT_CLR          0x08
  53
  54 /**** BitField Definitions */
  55 /* SECONDS_REG Fields */
  56 #define BIT_SECONDS_REG_SEC0                     (0x000)
  57 #define BIT_SECONDS_REG_SEC0_M                   (0x0000000F)
  58 #define BIT_SECONDS_REG_SEC1                     (0x004)
  59 #define BIT_SECONDS_REG_SEC1_M                   (0x00000070)
  60 /* MINUTES_REG Fields */
  61 #define BIT_MINUTES_REG_MIN0                     (0x000)
  62 #define BIT_MINUTES_REG_MIN0_M                   (0x0000000F)
  63 #define BIT_MINUTES_REG_MIN1                     (0x004)
  64 #define BIT_MINUTES_REG_MIN1_M                   (0x00000070)
  65 /* HOURS_REG Fields */
  66 #define BIT_HOURS_REG_HOUR0                      (0x000)
  67 #define BIT_HOURS_REG_HOUR0_M                    (0x0000000F)
  68 #define BIT_HOURS_REG_HOUR1                      (0x004)
  69 #define BIT_HOURS_REG_HOUR1_M                    (0x00000030)
  70 #define BIT_HOURS_REG_PM_NAM                     (0x007)
  71 #define BIT_HOURS_REG_PM_NAM_M                   (0x00000080)
  72 /* DAYS_REG Fields */
  73 #define BIT_DAYS_REG_DAY0                        (0x000)
  74 #define BIT_DAYS_REG_DAY0_M                      (0x0000000F)
  75 #define BIT_DAYS_REG_DAY1                        (0x004)
  76 #define BIT_DAYS_REG_DAY1_M                      (0x00000030)
  77 /* MONTHS_REG Fields */
  78 #define BIT_MONTHS_REG_MONTH0                    (0x000)
  79 #define BIT_MONTHS_REG_MONTH0_M                  (0x0000000F)
  80 #define BIT_MONTHS_REG_MONTH1                    (0x004)
  81 #define BIT_MONTHS_REG_MONTH1_M                  (0x00000010)
  82 /* YEARS_REG Fields */
  83 #define BIT_YEARS_REG_YEAR0                      (0x000)
  84 #define BIT_YEARS_REG_YEAR0_M                    (0x0000000F)
  85 #define BIT_YEARS_REG_YEAR1                      (0x004)
  86 #define BIT_YEARS_REG_YEAR1_M                    (0x000000F0)
  87 /* WEEKS_REG Fields */
  88 #define BIT_WEEKS_REG_WEEK                       (0x000)
  89 #define BIT_WEEKS_REG_WEEK_M                     (0x00000007)
  90 /* ALARM_SECONDS_REG Fields */
  91 #define BIT_ALARM_SECONDS_REG_ALARM_SEC0         (0x000)
  92 #define BIT_ALARM_SECONDS_REG_ALARM_SEC0_M       (0x0000000F)
  93 #define BIT_ALARM_SECONDS_REG_ALARM_SEC1         (0x004)
  94 #define BIT_ALARM_SECONDS_REG_ALARM_SEC1_M       (0x00000070)
  95 /* ALARM_MINUTES_REG Fields */
  96 #define BIT_ALARM_MINUTES_REG_ALARM_MIN0         (0x000)
  97 #define BIT_ALARM_MINUTES_REG_ALARM_MIN0_M       (0x0000000F)
  98 #define BIT_ALARM_MINUTES_REG_ALARM_MIN1         (0x004)
  99 #define BIT_ALARM_MINUTES_REG_ALARM_MIN1_M       (0x00000070)
 100 /* ALARM_HOURS_REG Fields */
 101 #define BIT_ALARM_HOURS_REG_ALARM_HOUR0          (0x000)
 102 #define BIT_ALARM_HOURS_REG_ALARM_HOUR0_M        (0x0000000F)
 103 #define BIT_ALARM_HOURS_REG_ALARM_HOUR1          (0x004)
 104 #define BIT_ALARM_HOURS_REG_ALARM_HOUR1_M        (0x00000030)
 105 #define BIT_ALARM_HOURS_REG_ALARM_PM_NAM         (0x007)
 106 #define BIT_ALARM_HOURS_REG_ALARM_PM_NAM_M       (0x00000080)
 107 /* ALARM_DAYS_REG Fields */
 108 #define BIT_ALARM_DAYS_REG_ALARM_DAY0            (0x000)
 109 #define BIT_ALARM_DAYS_REG_ALARM_DAY0_M          (0x0000000F)
 110 #define BIT_ALARM_DAYS_REG_ALARM_DAY1            (0x004)
 111 #define BIT_ALARM_DAYS_REG_ALARM_DAY1_M          (0x00000030)
 112 /* ALARM_MONTHS_REG Fields */
 113 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH0        (0x000)
 114 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH0_M      (0x0000000F)
 115 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH1        (0x004)
 116 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH1_M      (0x00000010)
 117 /* ALARM_YEARS_REG Fields */
 118 #define BIT_ALARM_YEARS_REG_ALARM_YEAR0          (0x000)
 119 #define BIT_ALARM_YEARS_REG_ALARM_YEAR0_M        (0x0000000F)
 120 #define BIT_ALARM_YEARS_REG_ALARM_YEAR1          (0x004)
 121 #define BIT_ALARM_YEARS_REG_ALARM_YEAR1_M        (0x000000F0)
 122 /* RTC_CTRL_REG Fields */
 123 #define BIT_RTC_CTRL_REG_STOP_RTC                (0x000)
 124 #define BIT_RTC_CTRL_REG_STOP_RTC_M              (0x00000001)
 125 #define BIT_RTC_CTRL_REG_ROUND_30S               (0x001)
 126 #define BIT_RTC_CTRL_REG_ROUND_30S_M             (0x00000002)
 127 #define BIT_RTC_CTRL_REG_AUTO_COMP               (0x002)
 128 #define BIT_RTC_CTRL_REG_AUTO_COMP_M             (0x00000004)
 129 #define BIT_RTC_CTRL_REG_MODE_12_24              (0x003)
 130 #define BIT_RTC_CTRL_REG_MODE_12_24_M            (0x00000008)
 131 #define BIT_RTC_CTRL_REG_TEST_MODE               (0x004)
 132 #define BIT_RTC_CTRL_REG_TEST_MODE_M             (0x00000010)
 133 #define BIT_RTC_CTRL_REG_SET_32_COUNTER          (0x005)
 134 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M        (0x00000020)
 135 #define BIT_RTC_CTRL_REG_GET_TIME                (0x006)
 136 #define BIT_RTC_CTRL_REG_GET_TIME_M              (0x00000040)
 137 /* RTC_STATUS_REG Fields */
 138 #define BIT_RTC_STATUS_REG_RUN                   (0x001)
 139 #define BIT_RTC_STATUS_REG_RUN_M                 (0x00000002)
 140 #define BIT_RTC_STATUS_REG_1S_EVENT              (0x002)
 141 #define BIT_RTC_STATUS_REG_1S_EVENT_M            (0x00000004)
 142 #define BIT_RTC_STATUS_REG_1M_EVENT              (0x003)
 143 #define BIT_RTC_STATUS_REG_1M_EVENT_M            (0x00000008)
 144 #define BIT_RTC_STATUS_REG_1H_EVENT              (0x004)
 145 #define BIT_RTC_STATUS_REG_1H_EVENT_M            (0x00000010)
 146 #define BIT_RTC_STATUS_REG_1D_EVENT              (0x005)
 147 #define BIT_RTC_STATUS_REG_1D_EVENT_M            (0x00000020)
 148 #define BIT_RTC_STATUS_REG_ALARM                 (0x006)
 149 #define BIT_RTC_STATUS_REG_ALARM_M               (0x00000040)
 150 #define BIT_RTC_STATUS_REG_POWER_UP              (0x007)
 151 #define BIT_RTC_STATUS_REG_POWER_UP_M            (0x00000080)
 152
 153 /* RTC_INTERRUPTS_REG Fields */
 154 #define BIT_RTC_INTERRUPTS_REG_EVERY             (0x000)
 155 #define BIT_RTC_INTERRUPTS_REG_EVERY_M           (0x00000003)
 156 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER          (0x002)
 157 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M        (0x00000004)
 158 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM          (0x003)
 159 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M        (0x00000008)
 160 /* RTC_COMP_LSB_REG Fields */
 161 #define BIT_RTC_COMP_LSB_REG_RTC_COMP_LSB        (0x000)
 162 #define BIT_RTC_COMP_LSB_REG_RTC_COMP_LSB_M      (0x000000FF)
 163 /* RTC_COMP_MSB_REG Fields */
 164 #define BIT_RTC_COMP_MSB_REG_RTC_COMP_MSB        (0x000)
 165 #define BIT_RTC_COMP_MSB_REG_RTC_COMP_MSB_M      (0x000000FF)
 166
 167 /* ALARM_DAYS_REG Fields */
 168 #define BIT_ALARM_DAYS_REG_ALARM_DAY1            (0x004)
 169 #define BIT_ALARM_DAYS_REG_ALARM_DAY1_M          (0x00000030)
 170 /* ALARM_MONTHS_REG Fields */
 171 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH0        (0x000)
 172 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH0_M      (0x0000000F)
 173 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH1        (0x004)
 174 #define BIT_ALARM_MONTHS_REG_ALARM_MONTH1_M      (0x00000010)
 175 /* ALARM_YEARS_REG Fields */
 176 #define BIT_ALARM_YEARS_REG_ALARM_YEAR0          (0x000)
 177 #define BIT_ALARM_YEARS_REG_ALARM_YEAR0_M        (0x0000000F)
 178 #define BIT_ALARM_YEARS_REG_ALARM_YEAR1          (0x004)
 179 #define BIT_ALARM_YEARS_REG_ALARM_YEAR1_M        (0x000000F0)
 180 /* RTC_CTRL_REG Fields */
 181 #define BIT_RTC_CTRL_REG_STOP_RTC                (0x000)
 182 #define BIT_RTC_CTRL_REG_STOP_RTC_M              (0x00000001)
 183 #define BIT_RTC_CTRL_REG_ROUND_30S               (0x001)
 184 #define BIT_RTC_CTRL_REG_ROUND_30S_M             (0x00000002)
 185 #define BIT_RTC_CTRL_REG_AUTO_COMP               (0x002)
 186 #define BIT_RTC_CTRL_REG_AUTO_COMP_M             (0x00000004)
 187 #define BIT_RTC_CTRL_REG_MODE_12_24              (0x003)
 188 #define BIT_RTC_CTRL_REG_MODE_12_24_M            (0x00000008)
 189 #define BIT_RTC_CTRL_REG_TEST_MODE               (0x004)
 190 #define BIT_RTC_CTRL_REG_TEST_MODE_M             (0x00000010)
 191 #define BIT_RTC_CTRL_REG_SET_32_COUNTER          (0x005)
 192 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M        (0x00000020)
 193 #define BIT_RTC_CTRL_REG_GET_TIME                (0x006)
 194 #define BIT_RTC_CTRL_REG_GET_TIME_M              (0x00000040)
 195 /* RTC_STATUS_REG Fields */
 196 #define BIT_RTC_STATUS_REG_RUN                   (0x001)
 197 #define BIT_RTC_STATUS_REG_RUN_M                 (0x00000002)
 198 #define BIT_RTC_STATUS_REG_1S_EVENT              (0x002)
 199 #define BIT_RTC_STATUS_REG_1S_EVENT_M            (0x00000004)
 200 #define BIT_RTC_STATUS_REG_1M_EVENT              (0x003)
 201 #define BIT_RTC_STATUS_REG_1M_EVENT_M            (0x00000008)
 202 #define BIT_RTC_STATUS_REG_1H_EVENT              (0x004)
 203 #define BIT_RTC_STATUS_REG_1H_EVENT_M            (0x00000010)
 204 #define BIT_RTC_STATUS_REG_1D_EVENT              (0x005)
 205 #define BIT_RTC_STATUS_REG_1D_EVENT_M            (0x00000020)
 206 #define BIT_RTC_STATUS_REG_ALARM                 (0x006)
 207 #define BIT_RTC_STATUS_REG_ALARM_M               (0x00000040)
 208 #define BIT_RTC_STATUS_REG_POWER_UP              (0x007)
 209 #define BIT_RTC_STATUS_REG_POWER_UP_M            (0x00000080)
 210 /* RTC_INTERRUPTS_REG Fields */
 211 #define BIT_RTC_INTERRUPTS_REG_EVERY             (0x000)
 212 #define BIT_RTC_INTERRUPTS_REG_EVERY_M           (0x00000003)
 213 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER          (0x002)
 214 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M        (0x00000004)
 215 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM          (0x003)
 216 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M        (0x00000008)
 217 /* RTC_COMP_LSB_REG Fields */
 218 #define BIT_RTC_COMP_LSB_REG_RTC_COMP_LSB        (0x000)
 219 #define BIT_RTC_COMP_LSB_REG_RTC_COMP_LSB_M      (0x000000FF)
 220 /* RTC_COMP_MSB_REG Fields */
 221 #define BIT_RTC_COMP_MSB_REG_RTC_COMP_MSB        (0x000)
 222 #define BIT_RTC_COMP_MSB_REG_RTC_COMP_MSB_M      (0x000000FF)
 223
 224
 225 struct twl4030rtc_platform_data {
 226         int (*init)(void);
 227         void (*exit)(void);
 228 };
 229
 230 #endif                          /* End of __TWL4030_RTC_H__ */