include/asm-x86/paravirt.h

   1 #ifndef ASM_X86__PARAVIRT_H
   2 #define ASM_X86__PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/page.h>
   8 #include <asm/asm.h>
   9
  10 /* Bitmask of what can be clobbered: usually at least eax. */
  11 #define CLBR_NONE 0
  12 #define CLBR_EAX  (1 << 0)
  13 #define CLBR_ECX  (1 << 1)
  14 #define CLBR_EDX  (1 << 2)
  15
  16 #ifdef CONFIG_X86_64
  17 #define CLBR_RSI  (1 << 3)
  18 #define CLBR_RDI  (1 << 4)
  19 #define CLBR_R8   (1 << 5)
  20 #define CLBR_R9   (1 << 6)
  21 #define CLBR_R10  (1 << 7)
  22 #define CLBR_R11  (1 << 8)
  23 #define CLBR_ANY  ((1 << 9) - 1)
  24 #include <asm/desc_defs.h>
  25 #else
  26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
  27 #define CLBR_ANY  ((1 << 3) - 1)
  28 #endif /* X86_64 */
  29
  30 #ifndef __ASSEMBLY__
  31 #include <linux/types.h>
  32 #include <linux/cpumask.h>
  33 #include <asm/kmap_types.h>
  34 #include <asm/desc_defs.h>
  35
  36 struct page;
  37 struct thread_struct;
  38 struct desc_ptr;
  39 struct tss_struct;
  40 struct mm_struct;
  41 struct desc_struct;
  42
  43 /* general info */
  44 struct pv_info {
  45         unsigned int kernel_rpl;
  46         int shared_kernel_pmd;
  47         int paravirt_enabled;
  48         const char *name;
  49 };
  50
  51 struct pv_init_ops {
  52         /*
  53          * Patch may replace one of the defined code sequences with
  54          * arbitrary code, subject to the same register constraints.
  55          * This generally means the code is not free to clobber any
  56          * registers other than EAX.  The patch function should return
  57          * the number of bytes of code generated, as we nop pad the
  58          * rest in generic code.
  59          */
  60         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
  61                           unsigned long addr, unsigned len);
  62
  63         /* Basic arch-specific setup */
  64         void (*arch_setup)(void);
  65         char *(*memory_setup)(void);
  66         void (*post_allocator_init)(void);
  67
  68         /* Print a banner to identify the environment */
  69         void (*banner)(void);
  70 };
  71
  72
  73 struct pv_lazy_ops {
  74         /* Set deferred update mode, used for batching operations. */
  75         void (*enter)(void);
  76         void (*leave)(void);
  77 };
  78
  79 struct pv_time_ops {
  80         void (*time_init)(void);
  81
  82         /* Set and set time of day */
  83         unsigned long (*get_wallclock)(void);
  84         int (*set_wallclock)(unsigned long);
  85
  86         unsigned long long (*sched_clock)(void);
  87         unsigned long (*get_tsc_khz)(void);
  88 };
  89
  90 struct pv_cpu_ops {
  91         /* hooks for various privileged instructions */
  92         unsigned long (*get_debugreg)(int regno);
  93         void (*set_debugreg)(int regno, unsigned long value);
  94
  95         void (*clts)(void);
  96
  97         unsigned long (*read_cr0)(void);
  98         void (*write_cr0)(unsigned long);
  99
 100         unsigned long (*read_cr4_safe)(void);
 101         unsigned long (*read_cr4)(void);
 102         void (*write_cr4)(unsigned long);
 103
 104 #ifdef CONFIG_X86_64
 105         unsigned long (*read_cr8)(void);
 106         void (*write_cr8)(unsigned long);
 107 #endif
 108
 109         /* Segment descriptor handling */
 110         void (*load_tr_desc)(void);
 111         void (*load_gdt)(const struct desc_ptr *);
 112         void (*load_idt)(const struct desc_ptr *);
 113         void (*store_gdt)(struct desc_ptr *);
 114         void (*store_idt)(struct desc_ptr *);
 115         void (*set_ldt)(const void *desc, unsigned entries);
 116         unsigned long (*store_tr)(void);
 117         void (*load_tls)(struct thread_struct *t, unsigned int cpu);
 118 #ifdef CONFIG_X86_64
 119         void (*load_gs_index)(unsigned int idx);
 120 #endif
 121         void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
 122                                 const void *desc);
 123         void (*write_gdt_entry)(struct desc_struct *,
 124                                 int entrynum, const void *desc, int size);
 125         void (*write_idt_entry)(gate_desc *,
 126                                 int entrynum, const gate_desc *gate);
 127         void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
 128
 129         void (*set_iopl_mask)(unsigned mask);
 130
 131         void (*wbinvd)(void);
 132         void (*io_delay)(void);
 133
 134         /* cpuid emulation, mostly so that caps bits can be disabled */
 135         void (*cpuid)(unsigned int *eax, unsigned int *ebx,
 136                       unsigned int *ecx, unsigned int *edx);
 137
 138         /* MSR, PMC and TSR operations.
 139            err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
 140         u64 (*read_msr_amd)(unsigned int msr, int *err);
 141         u64 (*read_msr)(unsigned int msr, int *err);
 142         int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
 143
 144         u64 (*read_tsc)(void);
 145         u64 (*read_pmc)(int counter);
 146         unsigned long long (*read_tscp)(unsigned int *aux);
 147
 148         /*
 149          * Atomically enable interrupts and return to userspace.  This
 150          * is only ever used to return to 32-bit processes; in a
 151          * 64-bit kernel, it's used for 32-on-64 compat processes, but
 152          * never native 64-bit processes.  (Jump, not call.)
 153          */
 154         void (*irq_enable_sysexit)(void);
 155
 156         /*
 157          * Switch to usermode gs and return to 64-bit usermode using
 158          * sysret.  Only used in 64-bit kernels to return to 64-bit
 159          * processes.  Usermode register state, including %rsp, must
 160          * already be restored.
 161          */
 162         void (*usergs_sysret64)(void);
 163
 164         /*
 165          * Switch to usermode gs and return to 32-bit usermode using
 166          * sysret.  Used to return to 32-on-64 compat processes.
 167          * Other usermode register state, including %esp, must already
 168          * be restored.
 169          */
 170         void (*usergs_sysret32)(void);
 171
 172         /* Normal iret.  Jump to this with the standard iret stack
 173            frame set up. */
 174         void (*iret)(void);
 175
 176         void (*swapgs)(void);
 177
 178         struct pv_lazy_ops lazy_mode;
 179 };
 180
 181 struct pv_irq_ops {
 182         void (*init_IRQ)(void);
 183
 184         /*
 185          * Get/set interrupt state.  save_fl and restore_fl are only
 186          * expected to use X86_EFLAGS_IF; all other bits
 187          * returned from save_fl are undefined, and may be ignored by
 188          * restore_fl.
 189          */
 190         unsigned long (*save_fl)(void);
 191         void (*restore_fl)(unsigned long);
 192         void (*irq_disable)(void);
 193         void (*irq_enable)(void);
 194         void (*safe_halt)(void);
 195         void (*halt)(void);
 196
 197 #ifdef CONFIG_X86_64
 198         void (*adjust_exception_frame)(void);
 199 #endif
 200 };
 201
 202 struct pv_apic_ops {
 203 #ifdef CONFIG_X86_LOCAL_APIC
 204         void (*setup_boot_clock)(void);
 205         void (*setup_secondary_clock)(void);
 206
 207         void (*startup_ipi_hook)(int phys_apicid,
 208                                  unsigned long start_eip,
 209                                  unsigned long start_esp);
 210 #endif
 211 };
 212
 213 struct pv_mmu_ops {
 214         /*
 215          * Called before/after init_mm pagetable setup. setup_start
 216          * may reset %cr3, and may pre-install parts of the pagetable;
 217          * pagetable setup is expected to preserve any existing
 218          * mapping.
 219          */
 220         void (*pagetable_setup_start)(pgd_t *pgd_base);
 221         void (*pagetable_setup_done)(pgd_t *pgd_base);
 222
 223         unsigned long (*read_cr2)(void);
 224         void (*write_cr2)(unsigned long);
 225
 226         unsigned long (*read_cr3)(void);
 227         void (*write_cr3)(unsigned long);
 228
 229         /*
 230          * Hooks for intercepting the creation/use/destruction of an
 231          * mm_struct.
 232          */
 233         void (*activate_mm)(struct mm_struct *prev,
 234                             struct mm_struct *next);
 235         void (*dup_mmap)(struct mm_struct *oldmm,
 236                          struct mm_struct *mm);
 237         void (*exit_mmap)(struct mm_struct *mm);
 238
 239
 240         /* TLB operations */
 241         void (*flush_tlb_user)(void);
 242         void (*flush_tlb_kernel)(void);
 243         void (*flush_tlb_single)(unsigned long addr);
 244         void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
 245                                  unsigned long va);
 246
 247         /* Hooks for allocating and freeing a pagetable top-level */
 248         int  (*pgd_alloc)(struct mm_struct *mm);
 249         void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
 250
 251         /*
 252          * Hooks for allocating/releasing pagetable pages when they're
 253          * attached to a pagetable
 254          */
 255         void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
 256         void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
 257         void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
 258         void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
 259         void (*release_pte)(unsigned long pfn);
 260         void (*release_pmd)(unsigned long pfn);
 261         void (*release_pud)(unsigned long pfn);
 262
 263         /* Pagetable manipulation functions */
 264         void (*set_pte)(pte_t *ptep, pte_t pteval);
 265         void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
 266                            pte_t *ptep, pte_t pteval);
 267         void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
 268         void (*pte_update)(struct mm_struct *mm, unsigned long addr,
 269                            pte_t *ptep);
 270         void (*pte_update_defer)(struct mm_struct *mm,
 271                                  unsigned long addr, pte_t *ptep);
 272
 273         pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
 274                                         pte_t *ptep);
 275         void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
 276                                         pte_t *ptep, pte_t pte);
 277
 278         pteval_t (*pte_val)(pte_t);
 279         pteval_t (*pte_flags)(pte_t);
 280         pte_t (*make_pte)(pteval_t pte);
 281
 282         pgdval_t (*pgd_val)(pgd_t);
 283         pgd_t (*make_pgd)(pgdval_t pgd);
 284
 285 #if PAGETABLE_LEVELS >= 3
 286 #ifdef CONFIG_X86_PAE
 287         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
 288         void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
 289                                 pte_t *ptep, pte_t pte);
 290         void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
 291                           pte_t *ptep);
 292         void (*pmd_clear)(pmd_t *pmdp);
 293
 294 #endif  /* CONFIG_X86_PAE */
 295
 296         void (*set_pud)(pud_t *pudp, pud_t pudval);
 297
 298         pmdval_t (*pmd_val)(pmd_t);
 299         pmd_t (*make_pmd)(pmdval_t pmd);
 300
 301 #if PAGETABLE_LEVELS == 4
 302         pudval_t (*pud_val)(pud_t);
 303         pud_t (*make_pud)(pudval_t pud);
 304
 305         void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
 306 #endif  /* PAGETABLE_LEVELS == 4 */
 307 #endif  /* PAGETABLE_LEVELS >= 3 */
 308
 309 #ifdef CONFIG_HIGHPTE
 310         void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
 311 #endif
 312
 313         struct pv_lazy_ops lazy_mode;
 314
 315         /* dom0 ops */
 316
 317         /* Sometimes the physical address is a pfn, and sometimes its
 318            an mfn.  We can tell which is which from the index. */
 319         void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
 320                            unsigned long phys, pgprot_t flags);
 321 };
 322
 323 struct raw_spinlock;
 324 struct pv_lock_ops {
 325         int (*spin_is_locked)(struct raw_spinlock *lock);
 326         int (*spin_is_contended)(struct raw_spinlock *lock);
 327         void (*spin_lock)(struct raw_spinlock *lock);
 328         int (*spin_trylock)(struct raw_spinlock *lock);
 329         void (*spin_unlock)(struct raw_spinlock *lock);
 330 };
 331
 332 /* This contains all the paravirt structures: we get a convenient
 333  * number for each function using the offset which we use to indicate
 334  * what to patch. */
 335 struct paravirt_patch_template {
 336         struct pv_init_ops pv_init_ops;
 337         struct pv_time_ops pv_time_ops;
 338         struct pv_cpu_ops pv_cpu_ops;
 339         struct pv_irq_ops pv_irq_ops;
 340         struct pv_apic_ops pv_apic_ops;
 341         struct pv_mmu_ops pv_mmu_ops;
 342         struct pv_lock_ops pv_lock_ops;
 343 };
 344
 345 extern struct pv_info pv_info;
 346 extern struct pv_init_ops pv_init_ops;
 347 extern struct pv_time_ops pv_time_ops;
 348 extern struct pv_cpu_ops pv_cpu_ops;
 349 extern struct pv_irq_ops pv_irq_ops;
 350 extern struct pv_apic_ops pv_apic_ops;
 351 extern struct pv_mmu_ops pv_mmu_ops;
 352 extern struct pv_lock_ops pv_lock_ops;
 353
 354 #define PARAVIRT_PATCH(x)                                       \
 355         (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
 356
 357 #define paravirt_type(op)                               \
 358         [paravirt_typenum] "i" (PARAVIRT_PATCH(op)),    \
 359         [paravirt_opptr] "m" (op)
 360 #define paravirt_clobber(clobber)               \
 361         [paravirt_clobber] "i" (clobber)
 362
 363 /*
 364  * Generate some code, and mark it as patchable by the
 365  * apply_paravirt() alternate instruction patcher.
 366  */
 367 #define _paravirt_alt(insn_string, type, clobber)       \
 368         "771:\n\t" insn_string "\n" "772:\n"            \
 369         ".pushsection .parainstructions,\"a\"\n"        \
 370         _ASM_ALIGN "\n"                                 \
 371         _ASM_PTR " 771b\n"                              \
 372         "  .byte " type "\n"                            \
 373         "  .byte 772b-771b\n"                           \
 374         "  .short " clobber "\n"                        \
 375         ".popsection\n"
 376
 377 /* Generate patchable code, with the default asm parameters. */
 378 #define paravirt_alt(insn_string)                                       \
 379         _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
 380
 381 /* Simple instruction patching code. */
 382 #define DEF_NATIVE(ops, name, code)                                     \
 383         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
 384         asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
 385
 386 unsigned paravirt_patch_nop(void);
 387 unsigned paravirt_patch_ignore(unsigned len);
 388 unsigned paravirt_patch_call(void *insnbuf,
 389                              const void *target, u16 tgt_clobbers,
 390                              unsigned long addr, u16 site_clobbers,
 391                              unsigned len);
 392 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
 393                             unsigned long addr, unsigned len);
 394 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
 395                                 unsigned long addr, unsigned len);
 396
 397 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
 398                               const char *start, const char *end);
 399
 400 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 401                       unsigned long addr, unsigned len);
 402
 403 int paravirt_disable_iospace(void);
 404
 405 /*
 406  * This generates an indirect call based on the operation type number.
 407  * The type number, computed in PARAVIRT_PATCH, is derived from the
 408  * offset into the paravirt_patch_template structure, and can therefore be
 409  * freely converted back into a structure offset.
 410  */
 411 #define PARAVIRT_CALL   "call *%[paravirt_opptr];"
 412
 413 /*
 414  * These macros are intended to wrap calls through one of the paravirt
 415  * ops structs, so that they can be later identified and patched at
 416  * runtime.
 417  *
 418  * Normally, a call to a pv_op function is a simple indirect call:
 419  * (pv_op_struct.operations)(args...).
 420  *
 421  * Unfortunately, this is a relatively slow operation for modern CPUs,
 422  * because it cannot necessarily determine what the destination
 423  * address is.  In this case, the address is a runtime constant, so at
 424  * the very least we can patch the call to e a simple direct call, or
 425  * ideally, patch an inline implementation into the callsite.  (Direct
 426  * calls are essentially free, because the call and return addresses
 427  * are completely predictable.)
 428  *
 429  * For i386, these macros rely on the standard gcc "regparm(3)" calling
 430  * convention, in which the first three arguments are placed in %eax,
 431  * %edx, %ecx (in that order), and the remaining arguments are placed
 432  * on the stack.  All caller-save registers (eax,edx,ecx) are expected
 433  * to be modified (either clobbered or used for return values).
 434  * X86_64, on the other hand, already specifies a register-based calling
 435  * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
 436  * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
 437  * special handling for dealing with 4 arguments, unlike i386.
 438  * However, x86_64 also have to clobber all caller saved registers, which
 439  * unfortunately, are quite a bit (r8 - r11)
 440  *
 441  * The call instruction itself is marked by placing its start address
 442  * and size into the .parainstructions section, so that
 443  * apply_paravirt() in arch/i386/kernel/alternative.c can do the
 444  * appropriate patching under the control of the backend pv_init_ops
 445  * implementation.
 446  *
 447  * Unfortunately there's no way to get gcc to generate the args setup
 448  * for the call, and then allow the call itself to be generated by an
 449  * inline asm.  Because of this, we must do the complete arg setup and
 450  * return value handling from within these macros.  This is fairly
 451  * cumbersome.
 452  *
 453  * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
 454  * It could be extended to more arguments, but there would be little
 455  * to be gained from that.  For each number of arguments, there are
 456  * the two VCALL and CALL variants for void and non-void functions.
 457  *
 458  * When there is a return value, the invoker of the macro must specify
 459  * the return type.  The macro then uses sizeof() on that type to
 460  * determine whether its a 32 or 64 bit value, and places the return
 461  * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
 462  * 64-bit). For x86_64 machines, it just returns at %rax regardless of
 463  * the return value size.
 464  *
 465  * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
 466  * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
 467  * in low,high order
 468  *
 469  * Small structures are passed and returned in registers.  The macro
 470  * calling convention can't directly deal with this, so the wrapper
 471  * functions must do this.
 472  *
 473  * These PVOP_* macros are only defined within this header.  This
 474  * means that all uses must be wrapped in inline functions.  This also
 475  * makes sure the incoming and outgoing types are always correct.
 476  */
 477 #ifdef CONFIG_X86_32
 478 #define PVOP_VCALL_ARGS                 unsigned long __eax, __edx, __ecx
 479 #define PVOP_CALL_ARGS                  PVOP_VCALL_ARGS
 480 #define PVOP_VCALL_CLOBBERS             "=a" (__eax), "=d" (__edx),     \
 481                                         "=c" (__ecx)
 482 #define PVOP_CALL_CLOBBERS              PVOP_VCALL_CLOBBERS
 483 #define EXTRA_CLOBBERS
 484 #define VEXTRA_CLOBBERS
 485 #else
 486 #define PVOP_VCALL_ARGS         unsigned long __edi, __esi, __edx, __ecx
 487 #define PVOP_CALL_ARGS          PVOP_VCALL_ARGS, __eax
 488 #define PVOP_VCALL_CLOBBERS     "=D" (__edi),                           \
 489                                 "=S" (__esi), "=d" (__edx),             \
 490                                 "=c" (__ecx)
 491
 492 #define PVOP_CALL_CLOBBERS      PVOP_VCALL_CLOBBERS, "=a" (__eax)
 493
 494 #define EXTRA_CLOBBERS   , "r8", "r9", "r10", "r11"
 495 #define VEXTRA_CLOBBERS  , "rax", "r8", "r9", "r10", "r11"
 496 #endif
 497
 498 #ifdef CONFIG_PARAVIRT_DEBUG
 499 #define PVOP_TEST_NULL(op)      BUG_ON(op == NULL)
 500 #else
 501 #define PVOP_TEST_NULL(op)      ((void)op)
 502 #endif
 503
 504 #define __PVOP_CALL(rettype, op, pre, post, ...)                        \
 505         ({                                                              \
 506                 rettype __ret;                                          \
 507                 PVOP_CALL_ARGS;                                 \
 508                 PVOP_TEST_NULL(op);                                     \
 509                 /* This is 32-bit specific, but is okay in 64-bit */    \
 510                 /* since this condition will never hold */              \
 511                 if (sizeof(rettype) > sizeof(unsigned long)) {          \
 512                         asm volatile(pre                                \
 513                                      paravirt_alt(PARAVIRT_CALL)        \
 514                                      post                               \
 515                                      : PVOP_CALL_CLOBBERS               \
 516                                      : paravirt_type(op),               \
 517                                        paravirt_clobber(CLBR_ANY),      \
 518                                        ##__VA_ARGS__                    \
 519                                      : "memory", "cc" EXTRA_CLOBBERS);  \
 520                         __ret = (rettype)((((u64)__edx) << 32) | __eax); \
 521                 } else {                                                \
 522                         asm volatile(pre                                \
 523                                      paravirt_alt(PARAVIRT_CALL)        \
 524                                      post                               \
 525                                      : PVOP_CALL_CLOBBERS               \
 526                                      : paravirt_type(op),               \
 527                                        paravirt_clobber(CLBR_ANY),      \
 528                                        ##__VA_ARGS__                    \
 529                                      : "memory", "cc" EXTRA_CLOBBERS);  \
 530                         __ret = (rettype)__eax;                         \
 531                 }                                                       \
 532                 __ret;                                                  \
 533         })
 534 #define __PVOP_VCALL(op, pre, post, ...)                                \
 535         ({                                                              \
 536                 PVOP_VCALL_ARGS;                                        \
 537                 PVOP_TEST_NULL(op);                                     \
 538                 asm volatile(pre                                        \
 539                              paravirt_alt(PARAVIRT_CALL)                \
 540                              post                                       \
 541                              : PVOP_VCALL_CLOBBERS                      \
 542                              : paravirt_type(op),                       \
 543                                paravirt_clobber(CLBR_ANY),              \
 544                                ##__VA_ARGS__                            \
 545                              : "memory", "cc" VEXTRA_CLOBBERS);         \
 546         })
 547
 548 #define PVOP_CALL0(rettype, op)                                         \
 549         __PVOP_CALL(rettype, op, "", "")
 550 #define PVOP_VCALL0(op)                                                 \
 551         __PVOP_VCALL(op, "", "")
 552
 553 #define PVOP_CALL1(rettype, op, arg1)                                   \
 554         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
 555 #define PVOP_VCALL1(op, arg1)                                           \
 556         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
 557
 558 #define PVOP_CALL2(rettype, op, arg1, arg2)                             \
 559         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 560         "1" ((unsigned long)(arg2)))
 561 #define PVOP_VCALL2(op, arg1, arg2)                                     \
 562         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 563         "1" ((unsigned long)(arg2)))
 564
 565 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
 566         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 567         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
 568 #define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
 569         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 570         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
 571
 572 /* This is the only difference in x86_64. We can make it much simpler */
 573 #ifdef CONFIG_X86_32
 574 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 575         __PVOP_CALL(rettype, op,                                        \
 576                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 577                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 578                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 579 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 580         __PVOP_VCALL(op,                                                \
 581                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 582                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 583                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 584 #else
 585 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 586         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 587         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
 588         "3"((unsigned long)(arg4)))
 589 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 590         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 591         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
 592         "3"((unsigned long)(arg4)))
 593 #endif
 594
 595 static inline int paravirt_enabled(void)
 596 {
 597         return pv_info.paravirt_enabled;
 598 }
 599
 600 static inline void load_sp0(struct tss_struct *tss,
 601                              struct thread_struct *thread)
 602 {
 603         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 604 }
 605
 606 #define ARCH_SETUP                      pv_init_ops.arch_setup();
 607 static inline unsigned long get_wallclock(void)
 608 {
 609         return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
 610 }
 611
 612 static inline int set_wallclock(unsigned long nowtime)
 613 {
 614         return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
 615 }
 616
 617 static inline void (*choose_time_init(void))(void)
 618 {
 619         return pv_time_ops.time_init;
 620 }
 621
 622 /* The paravirtualized CPUID instruction. */
 623 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
 624                            unsigned int *ecx, unsigned int *edx)
 625 {
 626         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
 627 }
 628
 629 /*
 630  * These special macros can be used to get or set a debugging register
 631  */
 632 static inline unsigned long paravirt_get_debugreg(int reg)
 633 {
 634         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
 635 }
 636 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
 637 static inline void set_debugreg(unsigned long val, int reg)
 638 {
 639         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 640 }
 641
 642 static inline void clts(void)
 643 {
 644         PVOP_VCALL0(pv_cpu_ops.clts);
 645 }
 646
 647 static inline unsigned long read_cr0(void)
 648 {
 649         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
 650 }
 651
 652 static inline void write_cr0(unsigned long x)
 653 {
 654         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
 655 }
 656
 657 static inline unsigned long read_cr2(void)
 658 {
 659         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
 660 }
 661
 662 static inline void write_cr2(unsigned long x)
 663 {
 664         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
 665 }
 666
 667 static inline unsigned long read_cr3(void)
 668 {
 669         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
 670 }
 671
 672 static inline void write_cr3(unsigned long x)
 673 {
 674         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
 675 }
 676
 677 static inline unsigned long read_cr4(void)
 678 {
 679         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
 680 }
 681 static inline unsigned long read_cr4_safe(void)
 682 {
 683         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
 684 }
 685
 686 static inline void write_cr4(unsigned long x)
 687 {
 688         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 689 }
 690
 691 #ifdef CONFIG_X86_64
 692 static inline unsigned long read_cr8(void)
 693 {
 694         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 695 }
 696
 697 static inline void write_cr8(unsigned long x)
 698 {
 699         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 700 }
 701 #endif
 702
 703 static inline void raw_safe_halt(void)
 704 {
 705         PVOP_VCALL0(pv_irq_ops.safe_halt);
 706 }
 707
 708 static inline void halt(void)
 709 {
 710         PVOP_VCALL0(pv_irq_ops.safe_halt);
 711 }
 712
 713 static inline void wbinvd(void)
 714 {
 715         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 716 }
 717
 718 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 719
 720 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 721 {
 722         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 723 }
 724 static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
 725 {
 726         return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
 727 }
 728 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 729 {
 730         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 731 }
 732
 733 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 734 #define rdmsr(msr, val1, val2)                  \
 735 do {                                            \
 736         int _err;                               \
 737         u64 _l = paravirt_read_msr(msr, &_err); \
 738         val1 = (u32)_l;                         \
 739         val2 = _l >> 32;                        \
 740 } while (0)
 741
 742 #define wrmsr(msr, val1, val2)                  \
 743 do {                                            \
 744         paravirt_write_msr(msr, val1, val2);    \
 745 } while (0)
 746
 747 #define rdmsrl(msr, val)                        \
 748 do {                                            \
 749         int _err;                               \
 750         val = paravirt_read_msr(msr, &_err);    \
 751 } while (0)
 752
 753 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 754 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 755
 756 /* rdmsr with exception handling */
 757 #define rdmsr_safe(msr, a, b)                   \
 758 ({                                              \
 759         int _err;                               \
 760         u64 _l = paravirt_read_msr(msr, &_err); \
 761         (*a) = (u32)_l;                         \
 762         (*b) = _l >> 32;                        \
 763         _err;                                   \
 764 })
 765
 766 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 767 {
 768         int err;
 769
 770         *p = paravirt_read_msr(msr, &err);
 771         return err;
 772 }
 773 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 774 {
 775         int err;
 776
 777         *p = paravirt_read_msr_amd(msr, &err);
 778         return err;
 779 }
 780
 781 static inline u64 paravirt_read_tsc(void)
 782 {
 783         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 784 }
 785
 786 #define rdtscl(low)                             \
 787 do {                                            \
 788         u64 _l = paravirt_read_tsc();           \
 789         low = (int)_l;                          \
 790 } while (0)
 791
 792 #define rdtscll(val) (val = paravirt_read_tsc())
 793
 794 static inline unsigned long long paravirt_sched_clock(void)
 795 {
 796         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 797 }
 798 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 799
 800 static inline unsigned long long paravirt_read_pmc(int counter)
 801 {
 802         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 803 }
 804
 805 #define rdpmc(counter, low, high)               \
 806 do {                                            \
 807         u64 _l = paravirt_read_pmc(counter);    \
 808         low = (u32)_l;                          \
 809         high = _l >> 32;                        \
 810 } while (0)
 811
 812 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 813 {
 814         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 815 }
 816
 817 #define rdtscp(low, high, aux)                          \
 818 do {                                                    \
 819         int __aux;                                      \
 820         unsigned long __val = paravirt_rdtscp(&__aux);  \
 821         (low) = (u32)__val;                             \
 822         (high) = (u32)(__val >> 32);                    \
 823         (aux) = __aux;                                  \
 824 } while (0)
 825
 826 #define rdtscpll(val, aux)                              \
 827 do {                                                    \
 828         unsigned long __aux;                            \
 829         val = paravirt_rdtscp(&__aux);                  \
 830         (aux) = __aux;                                  \
 831 } while (0)
 832
 833 static inline void load_TR_desc(void)
 834 {
 835         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 836 }
 837 static inline void load_gdt(const struct desc_ptr *dtr)
 838 {
 839         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 840 }
 841 static inline void load_idt(const struct desc_ptr *dtr)
 842 {
 843         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 844 }
 845 static inline void set_ldt(const void *addr, unsigned entries)
 846 {
 847         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 848 }
 849 static inline void store_gdt(struct desc_ptr *dtr)
 850 {
 851         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 852 }
 853 static inline void store_idt(struct desc_ptr *dtr)
 854 {
 855         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 856 }
 857 static inline unsigned long paravirt_store_tr(void)
 858 {
 859         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 860 }
 861 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 862 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 863 {
 864         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 865 }
 866
 867 #ifdef CONFIG_X86_64
 868 static inline void load_gs_index(unsigned int gs)
 869 {
 870         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 871 }
 872 #endif
 873
 874 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 875                                    const void *desc)
 876 {
 877         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 878 }
 879
 880 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 881                                    void *desc, int type)
 882 {
 883         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 884 }
 885
 886 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 887 {
 888         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 889 }
 890 static inline void set_iopl_mask(unsigned mask)
 891 {
 892         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 893 }
 894
 895 /* The paravirtualized I/O functions */
 896 static inline void slow_down_io(void)
 897 {
 898         pv_cpu_ops.io_delay();
 899 #ifdef REALLY_SLOW_IO
 900         pv_cpu_ops.io_delay();
 901         pv_cpu_ops.io_delay();
 902         pv_cpu_ops.io_delay();
 903 #endif
 904 }
 905
 906 #ifdef CONFIG_X86_LOCAL_APIC
 907 static inline void setup_boot_clock(void)
 908 {
 909         PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
 910 }
 911
 912 static inline void setup_secondary_clock(void)
 913 {
 914         PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
 915 }
 916 #endif
 917
 918 static inline void paravirt_post_allocator_init(void)
 919 {
 920         if (pv_init_ops.post_allocator_init)
 921                 (*pv_init_ops.post_allocator_init)();
 922 }
 923
 924 static inline void paravirt_pagetable_setup_start(pgd_t *base)
 925 {
 926         (*pv_mmu_ops.pagetable_setup_start)(base);
 927 }
 928
 929 static inline void paravirt_pagetable_setup_done(pgd_t *base)
 930 {
 931         (*pv_mmu_ops.pagetable_setup_done)(base);
 932 }
 933
 934 #ifdef CONFIG_SMP
 935 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 936                                     unsigned long start_esp)
 937 {
 938         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
 939                     phys_apicid, start_eip, start_esp);
 940 }
 941 #endif
 942
 943 static inline void paravirt_activate_mm(struct mm_struct *prev,
 944                                         struct mm_struct *next)
 945 {
 946         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 947 }
 948
 949 static inline void arch_dup_mmap(struct mm_struct *oldmm,
 950                                  struct mm_struct *mm)
 951 {
 952         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 953 }
 954
 955 static inline void arch_exit_mmap(struct mm_struct *mm)
 956 {
 957         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 958 }
 959
 960 static inline void __flush_tlb(void)
 961 {
 962         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 963 }
 964 static inline void __flush_tlb_global(void)
 965 {
 966         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 967 }
 968 static inline void __flush_tlb_single(unsigned long addr)
 969 {
 970         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 971 }
 972
 973 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
 974                                     unsigned long va)
 975 {
 976         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
 977 }
 978
 979 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 980 {
 981         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 982 }
 983
 984 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 985 {
 986         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 987 }
 988
 989 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 990 {
 991         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 992 }
 993 static inline void paravirt_release_pte(unsigned long pfn)
 994 {
 995         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 996 }
 997
 998 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 999 {
1000         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1001 }
1002
1003 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
1004                                             unsigned long start, unsigned long count)
1005 {
1006         PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1007 }
1008 static inline void paravirt_release_pmd(unsigned long pfn)
1009 {
1010         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1011 }
1012
1013 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1014 {
1015         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1016 }
1017 static inline void paravirt_release_pud(unsigned long pfn)
1018 {
1019         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1020 }
1021
1022 #ifdef CONFIG_HIGHPTE
1023 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1024 {
1025         unsigned long ret;
1026         ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1027         return (void *)ret;
1028 }
1029 #endif
1030
1031 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1032                               pte_t *ptep)
1033 {
1034         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1035 }
1036
1037 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1038                                     pte_t *ptep)
1039 {
1040         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1041 }
1042
1043 static inline pte_t __pte(pteval_t val)
1044 {
1045         pteval_t ret;
1046
1047         if (sizeof(pteval_t) > sizeof(long))
1048                 ret = PVOP_CALL2(pteval_t,
1049                                  pv_mmu_ops.make_pte,
1050                                  val, (u64)val >> 32);
1051         else
1052                 ret = PVOP_CALL1(pteval_t,
1053                                  pv_mmu_ops.make_pte,
1054                                  val);
1055
1056         return (pte_t) { .pte = ret };
1057 }
1058
1059 static inline pteval_t pte_val(pte_t pte)
1060 {
1061         pteval_t ret;
1062
1063         if (sizeof(pteval_t) > sizeof(long))
1064                 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1065                                  pte.pte, (u64)pte.pte >> 32);
1066         else
1067                 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1068                                  pte.pte);
1069
1070         return ret;
1071 }
1072
1073 static inline pteval_t pte_flags(pte_t pte)
1074 {
1075         pteval_t ret;
1076
1077         if (sizeof(pteval_t) > sizeof(long))
1078                 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1079                                  pte.pte, (u64)pte.pte >> 32);
1080         else
1081                 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1082                                  pte.pte);
1083
1084 #ifdef CONFIG_PARAVIRT_DEBUG
1085         BUG_ON(ret & PTE_PFN_MASK);
1086 #endif
1087         return ret;
1088 }
1089
1090 static inline pgd_t __pgd(pgdval_t val)
1091 {
1092         pgdval_t ret;
1093
1094         if (sizeof(pgdval_t) > sizeof(long))
1095                 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1096                                  val, (u64)val >> 32);
1097         else
1098                 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1099                                  val);
1100
1101         return (pgd_t) { ret };
1102 }
1103
1104 static inline pgdval_t pgd_val(pgd_t pgd)
1105 {
1106         pgdval_t ret;
1107
1108         if (sizeof(pgdval_t) > sizeof(long))
1109                 ret =  PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1110                                   pgd.pgd, (u64)pgd.pgd >> 32);
1111         else
1112                 ret =  PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1113                                   pgd.pgd);
1114
1115         return ret;
1116 }
1117
1118 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1119 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1120                                            pte_t *ptep)
1121 {
1122         pteval_t ret;
1123
1124         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1125                          mm, addr, ptep);
1126
1127         return (pte_t) { .pte = ret };
1128 }
1129
1130 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1131                                            pte_t *ptep, pte_t pte)
1132 {
1133         if (sizeof(pteval_t) > sizeof(long))
1134                 /* 5 arg words */
1135                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1136         else
1137                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1138                             mm, addr, ptep, pte.pte);
1139 }
1140
1141 static inline void set_pte(pte_t *ptep, pte_t pte)
1142 {
1143         if (sizeof(pteval_t) > sizeof(long))
1144                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1145                             pte.pte, (u64)pte.pte >> 32);
1146         else
1147                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1148                             pte.pte);
1149 }
1150
1151 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1152                               pte_t *ptep, pte_t pte)
1153 {
1154         if (sizeof(pteval_t) > sizeof(long))
1155                 /* 5 arg words */
1156                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1157         else
1158                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1159 }
1160
1161 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1162 {
1163         pmdval_t val = native_pmd_val(pmd);
1164
1165         if (sizeof(pmdval_t) > sizeof(long))
1166                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1167         else
1168                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1169 }
1170
1171 #if PAGETABLE_LEVELS >= 3
1172 static inline pmd_t __pmd(pmdval_t val)
1173 {
1174         pmdval_t ret;
1175
1176         if (sizeof(pmdval_t) > sizeof(long))
1177                 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1178                                  val, (u64)val >> 32);
1179         else
1180                 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1181                                  val);
1182
1183         return (pmd_t) { ret };
1184 }
1185
1186 static inline pmdval_t pmd_val(pmd_t pmd)
1187 {
1188         pmdval_t ret;
1189
1190         if (sizeof(pmdval_t) > sizeof(long))
1191                 ret =  PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1192                                   pmd.pmd, (u64)pmd.pmd >> 32);
1193         else
1194                 ret =  PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1195                                   pmd.pmd);
1196
1197         return ret;
1198 }
1199
1200 static inline void set_pud(pud_t *pudp, pud_t pud)
1201 {
1202         pudval_t val = native_pud_val(pud);
1203
1204         if (sizeof(pudval_t) > sizeof(long))
1205                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1206                             val, (u64)val >> 32);
1207         else
1208                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1209                             val);
1210 }
1211 #if PAGETABLE_LEVELS == 4
1212 static inline pud_t __pud(pudval_t val)
1213 {
1214         pudval_t ret;
1215
1216         if (sizeof(pudval_t) > sizeof(long))
1217                 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1218                                  val, (u64)val >> 32);
1219         else
1220                 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1221                                  val);
1222
1223         return (pud_t) { ret };
1224 }
1225
1226 static inline pudval_t pud_val(pud_t pud)
1227 {
1228         pudval_t ret;
1229
1230         if (sizeof(pudval_t) > sizeof(long))
1231                 ret =  PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1232                                   pud.pud, (u64)pud.pud >> 32);
1233         else
1234                 ret =  PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1235                                   pud.pud);
1236
1237         return ret;
1238 }
1239
1240 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1241 {
1242         pgdval_t val = native_pgd_val(pgd);
1243
1244         if (sizeof(pgdval_t) > sizeof(long))
1245                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1246                             val, (u64)val >> 32);
1247         else
1248                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1249                             val);
1250 }
1251
1252 static inline void pgd_clear(pgd_t *pgdp)
1253 {
1254         set_pgd(pgdp, __pgd(0));
1255 }
1256
1257 static inline void pud_clear(pud_t *pudp)
1258 {
1259         set_pud(pudp, __pud(0));
1260 }
1261
1262 #endif  /* PAGETABLE_LEVELS == 4 */
1263
1264 #endif  /* PAGETABLE_LEVELS >= 3 */
1265
1266 #ifdef CONFIG_X86_PAE
1267 /* Special-case pte-setting operations for PAE, which can't update a
1268    64-bit pte atomically */
1269 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1270 {
1271         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1272                     pte.pte, pte.pte >> 32);
1273 }
1274
1275 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1276                                    pte_t *ptep, pte_t pte)
1277 {
1278         /* 5 arg words */
1279         pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1280 }
1281
1282 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1283                              pte_t *ptep)
1284 {
1285         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1286 }
1287
1288 static inline void pmd_clear(pmd_t *pmdp)
1289 {
1290         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1291 }
1292 #else  /* !CONFIG_X86_PAE */
1293 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1294 {
1295         set_pte(ptep, pte);
1296 }
1297
1298 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1299                                    pte_t *ptep, pte_t pte)
1300 {
1301         set_pte(ptep, pte);
1302 }
1303
1304 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1305                              pte_t *ptep)
1306 {
1307         set_pte_at(mm, addr, ptep, __pte(0));
1308 }
1309
1310 static inline void pmd_clear(pmd_t *pmdp)
1311 {
1312         set_pmd(pmdp, __pmd(0));
1313 }
1314 #endif  /* CONFIG_X86_PAE */
1315
1316 /* Lazy mode for batching updates / context switch */
1317 enum paravirt_lazy_mode {
1318         PARAVIRT_LAZY_NONE,
1319         PARAVIRT_LAZY_MMU,
1320         PARAVIRT_LAZY_CPU,
1321 };
1322
1323 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1324 void paravirt_enter_lazy_cpu(void);
1325 void paravirt_leave_lazy_cpu(void);
1326 void paravirt_enter_lazy_mmu(void);
1327 void paravirt_leave_lazy_mmu(void);
1328 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1329
1330 #define  __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1331 static inline void arch_enter_lazy_cpu_mode(void)
1332 {
1333         PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1334 }
1335
1336 static inline void arch_leave_lazy_cpu_mode(void)
1337 {
1338         PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1339 }
1340
1341 static inline void arch_flush_lazy_cpu_mode(void)
1342 {
1343         if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1344                 arch_leave_lazy_cpu_mode();
1345                 arch_enter_lazy_cpu_mode();
1346         }
1347 }
1348
1349
1350 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1351 static inline void arch_enter_lazy_mmu_mode(void)
1352 {
1353         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1354 }
1355
1356 static inline void arch_leave_lazy_mmu_mode(void)
1357 {
1358         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1359 }
1360
1361 static inline void arch_flush_lazy_mmu_mode(void)
1362 {
1363         if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1364                 arch_leave_lazy_mmu_mode();
1365                 arch_enter_lazy_mmu_mode();
1366         }
1367 }
1368
1369 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1370                                 unsigned long phys, pgprot_t flags)
1371 {
1372         pv_mmu_ops.set_fixmap(idx, phys, flags);
1373 }
1374
1375 void _paravirt_nop(void);
1376 #define paravirt_nop    ((void *)_paravirt_nop)
1377
1378 void paravirt_use_bytelocks(void);
1379
1380 #ifdef CONFIG_SMP
1381
1382 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1383 {
1384         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1385 }
1386
1387 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1388 {
1389         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1390 }
1391
1392 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1393 {
1394         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1395 }
1396
1397 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1398 {
1399         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1400 }
1401
1402 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1403 {
1404         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1405 }
1406
1407 #endif
1408
1409 /* These all sit in the .parainstructions section to tell us what to patch. */
1410 struct paravirt_patch_site {
1411         u8 *instr;              /* original instructions */
1412         u8 instrtype;           /* type of this instruction */
1413         u8 len;                 /* length of original instruction */
1414         u16 clobbers;           /* what registers you may clobber */
1415 };
1416
1417 extern struct paravirt_patch_site __parainstructions[],
1418         __parainstructions_end[];
1419
1420 #ifdef CONFIG_X86_32
1421 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1422 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1423 #define PV_FLAGS_ARG "0"
1424 #define PV_EXTRA_CLOBBERS
1425 #define PV_VEXTRA_CLOBBERS
1426 #else
1427 /* We save some registers, but all of them, that's too much. We clobber all
1428  * caller saved registers but the argument parameter */
1429 #define PV_SAVE_REGS "pushq %%rdi;"
1430 #define PV_RESTORE_REGS "popq %%rdi;"
1431 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1432 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1433 #define PV_FLAGS_ARG "D"
1434 #endif
1435
1436 static inline unsigned long __raw_local_save_flags(void)
1437 {
1438         unsigned long f;
1439
1440         asm volatile(paravirt_alt(PV_SAVE_REGS
1441                                   PARAVIRT_CALL
1442                                   PV_RESTORE_REGS)
1443                      : "=a"(f)
1444                      : paravirt_type(pv_irq_ops.save_fl),
1445                        paravirt_clobber(CLBR_EAX)
1446                      : "memory", "cc" PV_VEXTRA_CLOBBERS);
1447         return f;
1448 }
1449
1450 static inline void raw_local_irq_restore(unsigned long f)
1451 {
1452         asm volatile(paravirt_alt(PV_SAVE_REGS
1453                                   PARAVIRT_CALL
1454                                   PV_RESTORE_REGS)
1455                      : "=a"(f)
1456                      : PV_FLAGS_ARG(f),
1457                        paravirt_type(pv_irq_ops.restore_fl),
1458                        paravirt_clobber(CLBR_EAX)
1459                      : "memory", "cc" PV_EXTRA_CLOBBERS);
1460 }
1461
1462 static inline void raw_local_irq_disable(void)
1463 {
1464         asm volatile(paravirt_alt(PV_SAVE_REGS
1465                                   PARAVIRT_CALL
1466                                   PV_RESTORE_REGS)
1467                      :
1468                      : paravirt_type(pv_irq_ops.irq_disable),
1469                        paravirt_clobber(CLBR_EAX)
1470                      : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1471 }
1472
1473 static inline void raw_local_irq_enable(void)
1474 {
1475         asm volatile(paravirt_alt(PV_SAVE_REGS
1476                                   PARAVIRT_CALL
1477                                   PV_RESTORE_REGS)
1478                      :
1479                      : paravirt_type(pv_irq_ops.irq_enable),
1480                        paravirt_clobber(CLBR_EAX)
1481                      : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1482 }
1483
1484 static inline unsigned long __raw_local_irq_save(void)
1485 {
1486         unsigned long f;
1487
1488         f = __raw_local_save_flags();
1489         raw_local_irq_disable();
1490         return f;
1491 }
1492
1493
1494 /* Make sure as little as possible of this mess escapes. */
1495 #undef PARAVIRT_CALL
1496 #undef __PVOP_CALL
1497 #undef __PVOP_VCALL
1498 #undef PVOP_VCALL0
1499 #undef PVOP_CALL0
1500 #undef PVOP_VCALL1
1501 #undef PVOP_CALL1
1502 #undef PVOP_VCALL2
1503 #undef PVOP_CALL2
1504 #undef PVOP_VCALL3
1505 #undef PVOP_CALL3
1506 #undef PVOP_VCALL4
1507 #undef PVOP_CALL4
1508
1509 #else  /* __ASSEMBLY__ */
1510
1511 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
1512 771:;                                           \
1513         ops;                                    \
1514 772:;                                           \
1515         .pushsection .parainstructions,"a";     \
1516          .align algn;                           \
1517          word 771b;                             \
1518          .byte ptype;                           \
1519          .byte 772b-771b;                       \
1520          .short clobbers;                       \
1521         .popsection
1522
1523
1524 #ifdef CONFIG_X86_64
1525 #define PV_SAVE_REGS                            \
1526         push %rax;                              \
1527         push %rcx;                              \
1528         push %rdx;                              \
1529         push %rsi;                              \
1530         push %rdi;                              \
1531         push %r8;                               \
1532         push %r9;                               \
1533         push %r10;                              \
1534         push %r11
1535 #define PV_RESTORE_REGS                         \
1536         pop %r11;                               \
1537         pop %r10;                               \
1538         pop %r9;                                \
1539         pop %r8;                                \
1540         pop %rdi;                               \
1541         pop %rsi;                               \
1542         pop %rdx;                               \
1543         pop %rcx;                               \
1544         pop %rax
1545 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
1546 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1547 #define PARA_INDIRECT(addr)     *addr(%rip)
1548 #else
1549 #define PV_SAVE_REGS   pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1550 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1551 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
1552 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1553 #define PARA_INDIRECT(addr)     *%cs:addr
1554 #endif
1555
1556 #define INTERRUPT_RETURN                                                \
1557         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
1558                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1559
1560 #define DISABLE_INTERRUPTS(clobbers)                                    \
1561         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1562                   PV_SAVE_REGS;                                         \
1563                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
1564                   PV_RESTORE_REGS;)                     \
1565
1566 #define ENABLE_INTERRUPTS(clobbers)                                     \
1567         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
1568                   PV_SAVE_REGS;                                         \
1569                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
1570                   PV_RESTORE_REGS;)
1571
1572 #define USERGS_SYSRET32                                                 \
1573         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
1574                   CLBR_NONE,                                            \
1575                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1576
1577 #ifdef CONFIG_X86_32
1578 #define GET_CR0_INTO_EAX                                \
1579         push %ecx; push %edx;                           \
1580         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1581         pop %edx; pop %ecx
1582
1583 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
1584         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1585                   CLBR_NONE,                                            \
1586                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1587
1588
1589 #else   /* !CONFIG_X86_32 */
1590
1591 /*
1592  * If swapgs is used while the userspace stack is still current,
1593  * there's no way to call a pvop.  The PV replacement *must* be
1594  * inlined, or the swapgs instruction must be trapped and emulated.
1595  */
1596 #define SWAPGS_UNSAFE_STACK                                             \
1597         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1598                   swapgs)
1599
1600 #define SWAPGS                                                          \
1601         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1602                   PV_SAVE_REGS;                                         \
1603                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs);         \
1604                   PV_RESTORE_REGS                                       \
1605                  )
1606
1607 #define GET_CR2_INTO_RCX                                \
1608         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1609         movq %rax, %rcx;                                \
1610         xorq %rax, %rax;
1611
1612 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1613         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1614                   CLBR_NONE,                                            \
1615                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1616
1617 #define USERGS_SYSRET64                                                 \
1618         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1619                   CLBR_NONE,                                            \
1620                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1621
1622 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1623         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1624                   CLBR_NONE,                                            \
1625                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1626 #endif  /* CONFIG_X86_32 */
1627
1628 #endif /* __ASSEMBLY__ */
1629 #endif /* CONFIG_PARAVIRT */
1630 #endif /* ASM_X86__PARAVIRT_H */