1 #ifndef ASM_X86__PARAVIRT_H
2 #define ASM_X86__PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_tsc_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
119 void (*load_gs_index)(unsigned int idx);
121 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
123 void (*write_gdt_entry)(struct desc_struct *,
124 int entrynum, const void *desc, int size);
125 void (*write_idt_entry)(gate_desc *,
126 int entrynum, const gate_desc *gate);
127 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
129 void (*set_iopl_mask)(unsigned mask);
131 void (*wbinvd)(void);
132 void (*io_delay)(void);
134 /* cpuid emulation, mostly so that caps bits can be disabled */
135 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
136 unsigned int *ecx, unsigned int *edx);
138 /* MSR, PMC and TSR operations.
139 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
140 u64 (*read_msr_amd)(unsigned int msr, int *err);
141 u64 (*read_msr)(unsigned int msr, int *err);
142 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
144 u64 (*read_tsc)(void);
145 u64 (*read_pmc)(int counter);
146 unsigned long long (*read_tscp)(unsigned int *aux);
149 * Atomically enable interrupts and return to userspace. This
150 * is only ever used to return to 32-bit processes; in a
151 * 64-bit kernel, it's used for 32-on-64 compat processes, but
152 * never native 64-bit processes. (Jump, not call.)
154 void (*irq_enable_sysexit)(void);
157 * Switch to usermode gs and return to 64-bit usermode using
158 * sysret. Only used in 64-bit kernels to return to 64-bit
159 * processes. Usermode register state, including %rsp, must
160 * already be restored.
162 void (*usergs_sysret64)(void);
165 * Switch to usermode gs and return to 32-bit usermode using
166 * sysret. Used to return to 32-on-64 compat processes.
167 * Other usermode register state, including %esp, must already
170 void (*usergs_sysret32)(void);
172 /* Normal iret. Jump to this with the standard iret stack
176 void (*swapgs)(void);
178 struct pv_lazy_ops lazy_mode;
182 void (*init_IRQ)(void);
185 * Get/set interrupt state. save_fl and restore_fl are only
186 * expected to use X86_EFLAGS_IF; all other bits
187 * returned from save_fl are undefined, and may be ignored by
190 unsigned long (*save_fl)(void);
191 void (*restore_fl)(unsigned long);
192 void (*irq_disable)(void);
193 void (*irq_enable)(void);
194 void (*safe_halt)(void);
198 void (*adjust_exception_frame)(void);
203 #ifdef CONFIG_X86_LOCAL_APIC
204 void (*setup_boot_clock)(void);
205 void (*setup_secondary_clock)(void);
207 void (*startup_ipi_hook)(int phys_apicid,
208 unsigned long start_eip,
209 unsigned long start_esp);
215 * Called before/after init_mm pagetable setup. setup_start
216 * may reset %cr3, and may pre-install parts of the pagetable;
217 * pagetable setup is expected to preserve any existing
220 void (*pagetable_setup_start)(pgd_t *pgd_base);
221 void (*pagetable_setup_done)(pgd_t *pgd_base);
223 unsigned long (*read_cr2)(void);
224 void (*write_cr2)(unsigned long);
226 unsigned long (*read_cr3)(void);
227 void (*write_cr3)(unsigned long);
230 * Hooks for intercepting the creation/use/destruction of an
233 void (*activate_mm)(struct mm_struct *prev,
234 struct mm_struct *next);
235 void (*dup_mmap)(struct mm_struct *oldmm,
236 struct mm_struct *mm);
237 void (*exit_mmap)(struct mm_struct *mm);
241 void (*flush_tlb_user)(void);
242 void (*flush_tlb_kernel)(void);
243 void (*flush_tlb_single)(unsigned long addr);
244 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
247 /* Hooks for allocating and freeing a pagetable top-level */
248 int (*pgd_alloc)(struct mm_struct *mm);
249 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
252 * Hooks for allocating/releasing pagetable pages when they're
253 * attached to a pagetable
255 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
256 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
257 void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
258 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
259 void (*release_pte)(unsigned long pfn);
260 void (*release_pmd)(unsigned long pfn);
261 void (*release_pud)(unsigned long pfn);
263 /* Pagetable manipulation functions */
264 void (*set_pte)(pte_t *ptep, pte_t pteval);
265 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
266 pte_t *ptep, pte_t pteval);
267 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
268 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
270 void (*pte_update_defer)(struct mm_struct *mm,
271 unsigned long addr, pte_t *ptep);
273 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
275 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
276 pte_t *ptep, pte_t pte);
278 pteval_t (*pte_val)(pte_t);
279 pteval_t (*pte_flags)(pte_t);
280 pte_t (*make_pte)(pteval_t pte);
282 pgdval_t (*pgd_val)(pgd_t);
283 pgd_t (*make_pgd)(pgdval_t pgd);
285 #if PAGETABLE_LEVELS >= 3
286 #ifdef CONFIG_X86_PAE
287 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
288 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
289 pte_t *ptep, pte_t pte);
290 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
292 void (*pmd_clear)(pmd_t *pmdp);
294 #endif /* CONFIG_X86_PAE */
296 void (*set_pud)(pud_t *pudp, pud_t pudval);
298 pmdval_t (*pmd_val)(pmd_t);
299 pmd_t (*make_pmd)(pmdval_t pmd);
301 #if PAGETABLE_LEVELS == 4
302 pudval_t (*pud_val)(pud_t);
303 pud_t (*make_pud)(pudval_t pud);
305 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
306 #endif /* PAGETABLE_LEVELS == 4 */
307 #endif /* PAGETABLE_LEVELS >= 3 */
309 #ifdef CONFIG_HIGHPTE
310 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
313 struct pv_lazy_ops lazy_mode;
317 /* Sometimes the physical address is a pfn, and sometimes its
318 an mfn. We can tell which is which from the index. */
319 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
320 unsigned long phys, pgprot_t flags);
325 int (*spin_is_locked)(struct raw_spinlock *lock);
326 int (*spin_is_contended)(struct raw_spinlock *lock);
327 void (*spin_lock)(struct raw_spinlock *lock);
328 int (*spin_trylock)(struct raw_spinlock *lock);
329 void (*spin_unlock)(struct raw_spinlock *lock);
332 /* This contains all the paravirt structures: we get a convenient
333 * number for each function using the offset which we use to indicate
335 struct paravirt_patch_template {
336 struct pv_init_ops pv_init_ops;
337 struct pv_time_ops pv_time_ops;
338 struct pv_cpu_ops pv_cpu_ops;
339 struct pv_irq_ops pv_irq_ops;
340 struct pv_apic_ops pv_apic_ops;
341 struct pv_mmu_ops pv_mmu_ops;
342 struct pv_lock_ops pv_lock_ops;
345 extern struct pv_info pv_info;
346 extern struct pv_init_ops pv_init_ops;
347 extern struct pv_time_ops pv_time_ops;
348 extern struct pv_cpu_ops pv_cpu_ops;
349 extern struct pv_irq_ops pv_irq_ops;
350 extern struct pv_apic_ops pv_apic_ops;
351 extern struct pv_mmu_ops pv_mmu_ops;
352 extern struct pv_lock_ops pv_lock_ops;
354 #define PARAVIRT_PATCH(x) \
355 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
357 #define paravirt_type(op) \
358 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
359 [paravirt_opptr] "m" (op)
360 #define paravirt_clobber(clobber) \
361 [paravirt_clobber] "i" (clobber)
364 * Generate some code, and mark it as patchable by the
365 * apply_paravirt() alternate instruction patcher.
367 #define _paravirt_alt(insn_string, type, clobber) \
368 "771:\n\t" insn_string "\n" "772:\n" \
369 ".pushsection .parainstructions,\"a\"\n" \
372 " .byte " type "\n" \
373 " .byte 772b-771b\n" \
374 " .short " clobber "\n" \
377 /* Generate patchable code, with the default asm parameters. */
378 #define paravirt_alt(insn_string) \
379 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
381 /* Simple instruction patching code. */
382 #define DEF_NATIVE(ops, name, code) \
383 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
384 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
386 unsigned paravirt_patch_nop(void);
387 unsigned paravirt_patch_ignore(unsigned len);
388 unsigned paravirt_patch_call(void *insnbuf,
389 const void *target, u16 tgt_clobbers,
390 unsigned long addr, u16 site_clobbers,
392 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
393 unsigned long addr, unsigned len);
394 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
395 unsigned long addr, unsigned len);
397 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
398 const char *start, const char *end);
400 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
401 unsigned long addr, unsigned len);
403 int paravirt_disable_iospace(void);
406 * This generates an indirect call based on the operation type number.
407 * The type number, computed in PARAVIRT_PATCH, is derived from the
408 * offset into the paravirt_patch_template structure, and can therefore be
409 * freely converted back into a structure offset.
411 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
414 * These macros are intended to wrap calls through one of the paravirt
415 * ops structs, so that they can be later identified and patched at
418 * Normally, a call to a pv_op function is a simple indirect call:
419 * (pv_op_struct.operations)(args...).
421 * Unfortunately, this is a relatively slow operation for modern CPUs,
422 * because it cannot necessarily determine what the destination
423 * address is. In this case, the address is a runtime constant, so at
424 * the very least we can patch the call to e a simple direct call, or
425 * ideally, patch an inline implementation into the callsite. (Direct
426 * calls are essentially free, because the call and return addresses
427 * are completely predictable.)
429 * For i386, these macros rely on the standard gcc "regparm(3)" calling
430 * convention, in which the first three arguments are placed in %eax,
431 * %edx, %ecx (in that order), and the remaining arguments are placed
432 * on the stack. All caller-save registers (eax,edx,ecx) are expected
433 * to be modified (either clobbered or used for return values).
434 * X86_64, on the other hand, already specifies a register-based calling
435 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
436 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
437 * special handling for dealing with 4 arguments, unlike i386.
438 * However, x86_64 also have to clobber all caller saved registers, which
439 * unfortunately, are quite a bit (r8 - r11)
441 * The call instruction itself is marked by placing its start address
442 * and size into the .parainstructions section, so that
443 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
444 * appropriate patching under the control of the backend pv_init_ops
447 * Unfortunately there's no way to get gcc to generate the args setup
448 * for the call, and then allow the call itself to be generated by an
449 * inline asm. Because of this, we must do the complete arg setup and
450 * return value handling from within these macros. This is fairly
453 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
454 * It could be extended to more arguments, but there would be little
455 * to be gained from that. For each number of arguments, there are
456 * the two VCALL and CALL variants for void and non-void functions.
458 * When there is a return value, the invoker of the macro must specify
459 * the return type. The macro then uses sizeof() on that type to
460 * determine whether its a 32 or 64 bit value, and places the return
461 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
462 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
463 * the return value size.
465 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
466 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
469 * Small structures are passed and returned in registers. The macro
470 * calling convention can't directly deal with this, so the wrapper
471 * functions must do this.
473 * These PVOP_* macros are only defined within this header. This
474 * means that all uses must be wrapped in inline functions. This also
475 * makes sure the incoming and outgoing types are always correct.
478 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
479 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
480 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
482 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
483 #define EXTRA_CLOBBERS
484 #define VEXTRA_CLOBBERS
486 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
487 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
488 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
489 "=S" (__esi), "=d" (__edx), \
492 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
494 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
495 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
498 #ifdef CONFIG_PARAVIRT_DEBUG
499 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
501 #define PVOP_TEST_NULL(op) ((void)op)
504 #define __PVOP_CALL(rettype, op, pre, post, ...) \
508 PVOP_TEST_NULL(op); \
509 /* This is 32-bit specific, but is okay in 64-bit */ \
510 /* since this condition will never hold */ \
511 if (sizeof(rettype) > sizeof(unsigned long)) { \
513 paravirt_alt(PARAVIRT_CALL) \
515 : PVOP_CALL_CLOBBERS \
516 : paravirt_type(op), \
517 paravirt_clobber(CLBR_ANY), \
519 : "memory", "cc" EXTRA_CLOBBERS); \
520 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
523 paravirt_alt(PARAVIRT_CALL) \
525 : PVOP_CALL_CLOBBERS \
526 : paravirt_type(op), \
527 paravirt_clobber(CLBR_ANY), \
529 : "memory", "cc" EXTRA_CLOBBERS); \
530 __ret = (rettype)__eax; \
534 #define __PVOP_VCALL(op, pre, post, ...) \
537 PVOP_TEST_NULL(op); \
539 paravirt_alt(PARAVIRT_CALL) \
541 : PVOP_VCALL_CLOBBERS \
542 : paravirt_type(op), \
543 paravirt_clobber(CLBR_ANY), \
545 : "memory", "cc" VEXTRA_CLOBBERS); \
548 #define PVOP_CALL0(rettype, op) \
549 __PVOP_CALL(rettype, op, "", "")
550 #define PVOP_VCALL0(op) \
551 __PVOP_VCALL(op, "", "")
553 #define PVOP_CALL1(rettype, op, arg1) \
554 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
555 #define PVOP_VCALL1(op, arg1) \
556 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
558 #define PVOP_CALL2(rettype, op, arg1, arg2) \
559 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
560 "1" ((unsigned long)(arg2)))
561 #define PVOP_VCALL2(op, arg1, arg2) \
562 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
563 "1" ((unsigned long)(arg2)))
565 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
566 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
567 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
568 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
569 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
570 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
572 /* This is the only difference in x86_64. We can make it much simpler */
574 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
575 __PVOP_CALL(rettype, op, \
576 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
577 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
578 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
579 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
581 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
582 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
583 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
585 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
586 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
587 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
588 "3"((unsigned long)(arg4)))
589 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
590 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
591 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
592 "3"((unsigned long)(arg4)))
595 static inline int paravirt_enabled(void)
597 return pv_info.paravirt_enabled;
600 static inline void load_sp0(struct tss_struct *tss,
601 struct thread_struct *thread)
603 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
606 #define ARCH_SETUP pv_init_ops.arch_setup();
607 static inline unsigned long get_wallclock(void)
609 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
612 static inline int set_wallclock(unsigned long nowtime)
614 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
617 static inline void (*choose_time_init(void))(void)
619 return pv_time_ops.time_init;
622 /* The paravirtualized CPUID instruction. */
623 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
624 unsigned int *ecx, unsigned int *edx)
626 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
630 * These special macros can be used to get or set a debugging register
632 static inline unsigned long paravirt_get_debugreg(int reg)
634 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
636 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
637 static inline void set_debugreg(unsigned long val, int reg)
639 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
642 static inline void clts(void)
644 PVOP_VCALL0(pv_cpu_ops.clts);
647 static inline unsigned long read_cr0(void)
649 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
652 static inline void write_cr0(unsigned long x)
654 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
657 static inline unsigned long read_cr2(void)
659 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
662 static inline void write_cr2(unsigned long x)
664 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
667 static inline unsigned long read_cr3(void)
669 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
672 static inline void write_cr3(unsigned long x)
674 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
677 static inline unsigned long read_cr4(void)
679 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
681 static inline unsigned long read_cr4_safe(void)
683 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
686 static inline void write_cr4(unsigned long x)
688 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
692 static inline unsigned long read_cr8(void)
694 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
697 static inline void write_cr8(unsigned long x)
699 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
703 static inline void raw_safe_halt(void)
705 PVOP_VCALL0(pv_irq_ops.safe_halt);
708 static inline void halt(void)
710 PVOP_VCALL0(pv_irq_ops.safe_halt);
713 static inline void wbinvd(void)
715 PVOP_VCALL0(pv_cpu_ops.wbinvd);
718 #define get_kernel_rpl() (pv_info.kernel_rpl)
720 static inline u64 paravirt_read_msr(unsigned msr, int *err)
722 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
724 static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
726 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
728 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
730 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
733 /* These should all do BUG_ON(_err), but our headers are too tangled. */
734 #define rdmsr(msr, val1, val2) \
737 u64 _l = paravirt_read_msr(msr, &_err); \
742 #define wrmsr(msr, val1, val2) \
744 paravirt_write_msr(msr, val1, val2); \
747 #define rdmsrl(msr, val) \
750 val = paravirt_read_msr(msr, &_err); \
753 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
754 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
756 /* rdmsr with exception handling */
757 #define rdmsr_safe(msr, a, b) \
760 u64 _l = paravirt_read_msr(msr, &_err); \
766 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
770 *p = paravirt_read_msr(msr, &err);
773 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
777 *p = paravirt_read_msr_amd(msr, &err);
781 static inline u64 paravirt_read_tsc(void)
783 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
786 #define rdtscl(low) \
788 u64 _l = paravirt_read_tsc(); \
792 #define rdtscll(val) (val = paravirt_read_tsc())
794 static inline unsigned long long paravirt_sched_clock(void)
796 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
798 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
800 static inline unsigned long long paravirt_read_pmc(int counter)
802 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
805 #define rdpmc(counter, low, high) \
807 u64 _l = paravirt_read_pmc(counter); \
812 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
814 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
817 #define rdtscp(low, high, aux) \
820 unsigned long __val = paravirt_rdtscp(&__aux); \
821 (low) = (u32)__val; \
822 (high) = (u32)(__val >> 32); \
826 #define rdtscpll(val, aux) \
828 unsigned long __aux; \
829 val = paravirt_rdtscp(&__aux); \
833 static inline void load_TR_desc(void)
835 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
837 static inline void load_gdt(const struct desc_ptr *dtr)
839 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
841 static inline void load_idt(const struct desc_ptr *dtr)
843 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
845 static inline void set_ldt(const void *addr, unsigned entries)
847 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
849 static inline void store_gdt(struct desc_ptr *dtr)
851 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
853 static inline void store_idt(struct desc_ptr *dtr)
855 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
857 static inline unsigned long paravirt_store_tr(void)
859 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
861 #define store_tr(tr) ((tr) = paravirt_store_tr())
862 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
864 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
868 static inline void load_gs_index(unsigned int gs)
870 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
874 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
877 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
880 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
881 void *desc, int type)
883 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
886 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
888 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
890 static inline void set_iopl_mask(unsigned mask)
892 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
895 /* The paravirtualized I/O functions */
896 static inline void slow_down_io(void)
898 pv_cpu_ops.io_delay();
899 #ifdef REALLY_SLOW_IO
900 pv_cpu_ops.io_delay();
901 pv_cpu_ops.io_delay();
902 pv_cpu_ops.io_delay();
906 #ifdef CONFIG_X86_LOCAL_APIC
907 static inline void setup_boot_clock(void)
909 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
912 static inline void setup_secondary_clock(void)
914 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
918 static inline void paravirt_post_allocator_init(void)
920 if (pv_init_ops.post_allocator_init)
921 (*pv_init_ops.post_allocator_init)();
924 static inline void paravirt_pagetable_setup_start(pgd_t *base)
926 (*pv_mmu_ops.pagetable_setup_start)(base);
929 static inline void paravirt_pagetable_setup_done(pgd_t *base)
931 (*pv_mmu_ops.pagetable_setup_done)(base);
935 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
936 unsigned long start_esp)
938 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
939 phys_apicid, start_eip, start_esp);
943 static inline void paravirt_activate_mm(struct mm_struct *prev,
944 struct mm_struct *next)
946 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
949 static inline void arch_dup_mmap(struct mm_struct *oldmm,
950 struct mm_struct *mm)
952 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
955 static inline void arch_exit_mmap(struct mm_struct *mm)
957 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
960 static inline void __flush_tlb(void)
962 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
964 static inline void __flush_tlb_global(void)
966 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
968 static inline void __flush_tlb_single(unsigned long addr)
970 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
973 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
976 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
979 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
981 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
984 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
986 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
989 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
991 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
993 static inline void paravirt_release_pte(unsigned long pfn)
995 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
998 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1000 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1003 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
1004 unsigned long start, unsigned long count)
1006 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1008 static inline void paravirt_release_pmd(unsigned long pfn)
1010 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1013 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1015 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1017 static inline void paravirt_release_pud(unsigned long pfn)
1019 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1022 #ifdef CONFIG_HIGHPTE
1023 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1026 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1031 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1034 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1037 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1040 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1043 static inline pte_t __pte(pteval_t val)
1047 if (sizeof(pteval_t) > sizeof(long))
1048 ret = PVOP_CALL2(pteval_t,
1049 pv_mmu_ops.make_pte,
1050 val, (u64)val >> 32);
1052 ret = PVOP_CALL1(pteval_t,
1053 pv_mmu_ops.make_pte,
1056 return (pte_t) { .pte = ret };
1059 static inline pteval_t pte_val(pte_t pte)
1063 if (sizeof(pteval_t) > sizeof(long))
1064 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1065 pte.pte, (u64)pte.pte >> 32);
1067 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1073 static inline pteval_t pte_flags(pte_t pte)
1077 if (sizeof(pteval_t) > sizeof(long))
1078 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1079 pte.pte, (u64)pte.pte >> 32);
1081 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1084 #ifdef CONFIG_PARAVIRT_DEBUG
1085 BUG_ON(ret & PTE_PFN_MASK);
1090 static inline pgd_t __pgd(pgdval_t val)
1094 if (sizeof(pgdval_t) > sizeof(long))
1095 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1096 val, (u64)val >> 32);
1098 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1101 return (pgd_t) { ret };
1104 static inline pgdval_t pgd_val(pgd_t pgd)
1108 if (sizeof(pgdval_t) > sizeof(long))
1109 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1110 pgd.pgd, (u64)pgd.pgd >> 32);
1112 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1118 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1119 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1124 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1127 return (pte_t) { .pte = ret };
1130 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1131 pte_t *ptep, pte_t pte)
1133 if (sizeof(pteval_t) > sizeof(long))
1135 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1137 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1138 mm, addr, ptep, pte.pte);
1141 static inline void set_pte(pte_t *ptep, pte_t pte)
1143 if (sizeof(pteval_t) > sizeof(long))
1144 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1145 pte.pte, (u64)pte.pte >> 32);
1147 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1151 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1152 pte_t *ptep, pte_t pte)
1154 if (sizeof(pteval_t) > sizeof(long))
1156 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1158 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1161 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1163 pmdval_t val = native_pmd_val(pmd);
1165 if (sizeof(pmdval_t) > sizeof(long))
1166 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1168 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1171 #if PAGETABLE_LEVELS >= 3
1172 static inline pmd_t __pmd(pmdval_t val)
1176 if (sizeof(pmdval_t) > sizeof(long))
1177 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1178 val, (u64)val >> 32);
1180 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1183 return (pmd_t) { ret };
1186 static inline pmdval_t pmd_val(pmd_t pmd)
1190 if (sizeof(pmdval_t) > sizeof(long))
1191 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1192 pmd.pmd, (u64)pmd.pmd >> 32);
1194 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1200 static inline void set_pud(pud_t *pudp, pud_t pud)
1202 pudval_t val = native_pud_val(pud);
1204 if (sizeof(pudval_t) > sizeof(long))
1205 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1206 val, (u64)val >> 32);
1208 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1211 #if PAGETABLE_LEVELS == 4
1212 static inline pud_t __pud(pudval_t val)
1216 if (sizeof(pudval_t) > sizeof(long))
1217 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1218 val, (u64)val >> 32);
1220 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1223 return (pud_t) { ret };
1226 static inline pudval_t pud_val(pud_t pud)
1230 if (sizeof(pudval_t) > sizeof(long))
1231 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1232 pud.pud, (u64)pud.pud >> 32);
1234 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1240 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1242 pgdval_t val = native_pgd_val(pgd);
1244 if (sizeof(pgdval_t) > sizeof(long))
1245 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1246 val, (u64)val >> 32);
1248 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1252 static inline void pgd_clear(pgd_t *pgdp)
1254 set_pgd(pgdp, __pgd(0));
1257 static inline void pud_clear(pud_t *pudp)
1259 set_pud(pudp, __pud(0));
1262 #endif /* PAGETABLE_LEVELS == 4 */
1264 #endif /* PAGETABLE_LEVELS >= 3 */
1266 #ifdef CONFIG_X86_PAE
1267 /* Special-case pte-setting operations for PAE, which can't update a
1268 64-bit pte atomically */
1269 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1271 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1272 pte.pte, pte.pte >> 32);
1275 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1276 pte_t *ptep, pte_t pte)
1279 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1282 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1285 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1288 static inline void pmd_clear(pmd_t *pmdp)
1290 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1292 #else /* !CONFIG_X86_PAE */
1293 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1298 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1299 pte_t *ptep, pte_t pte)
1304 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1307 set_pte_at(mm, addr, ptep, __pte(0));
1310 static inline void pmd_clear(pmd_t *pmdp)
1312 set_pmd(pmdp, __pmd(0));
1314 #endif /* CONFIG_X86_PAE */
1316 /* Lazy mode for batching updates / context switch */
1317 enum paravirt_lazy_mode {
1323 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1324 void paravirt_enter_lazy_cpu(void);
1325 void paravirt_leave_lazy_cpu(void);
1326 void paravirt_enter_lazy_mmu(void);
1327 void paravirt_leave_lazy_mmu(void);
1328 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1330 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1331 static inline void arch_enter_lazy_cpu_mode(void)
1333 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1336 static inline void arch_leave_lazy_cpu_mode(void)
1338 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1341 static inline void arch_flush_lazy_cpu_mode(void)
1343 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1344 arch_leave_lazy_cpu_mode();
1345 arch_enter_lazy_cpu_mode();
1350 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1351 static inline void arch_enter_lazy_mmu_mode(void)
1353 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1356 static inline void arch_leave_lazy_mmu_mode(void)
1358 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1361 static inline void arch_flush_lazy_mmu_mode(void)
1363 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1364 arch_leave_lazy_mmu_mode();
1365 arch_enter_lazy_mmu_mode();
1369 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1370 unsigned long phys, pgprot_t flags)
1372 pv_mmu_ops.set_fixmap(idx, phys, flags);
1375 void _paravirt_nop(void);
1376 #define paravirt_nop ((void *)_paravirt_nop)
1378 void paravirt_use_bytelocks(void);
1382 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1384 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1387 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1389 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1392 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1394 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1397 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1399 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1402 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1404 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1409 /* These all sit in the .parainstructions section to tell us what to patch. */
1410 struct paravirt_patch_site {
1411 u8 *instr; /* original instructions */
1412 u8 instrtype; /* type of this instruction */
1413 u8 len; /* length of original instruction */
1414 u16 clobbers; /* what registers you may clobber */
1417 extern struct paravirt_patch_site __parainstructions[],
1418 __parainstructions_end[];
1420 #ifdef CONFIG_X86_32
1421 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1422 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1423 #define PV_FLAGS_ARG "0"
1424 #define PV_EXTRA_CLOBBERS
1425 #define PV_VEXTRA_CLOBBERS
1427 /* We save some registers, but all of them, that's too much. We clobber all
1428 * caller saved registers but the argument parameter */
1429 #define PV_SAVE_REGS "pushq %%rdi;"
1430 #define PV_RESTORE_REGS "popq %%rdi;"
1431 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1432 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1433 #define PV_FLAGS_ARG "D"
1436 static inline unsigned long __raw_local_save_flags(void)
1440 asm volatile(paravirt_alt(PV_SAVE_REGS
1444 : paravirt_type(pv_irq_ops.save_fl),
1445 paravirt_clobber(CLBR_EAX)
1446 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1450 static inline void raw_local_irq_restore(unsigned long f)
1452 asm volatile(paravirt_alt(PV_SAVE_REGS
1457 paravirt_type(pv_irq_ops.restore_fl),
1458 paravirt_clobber(CLBR_EAX)
1459 : "memory", "cc" PV_EXTRA_CLOBBERS);
1462 static inline void raw_local_irq_disable(void)
1464 asm volatile(paravirt_alt(PV_SAVE_REGS
1468 : paravirt_type(pv_irq_ops.irq_disable),
1469 paravirt_clobber(CLBR_EAX)
1470 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1473 static inline void raw_local_irq_enable(void)
1475 asm volatile(paravirt_alt(PV_SAVE_REGS
1479 : paravirt_type(pv_irq_ops.irq_enable),
1480 paravirt_clobber(CLBR_EAX)
1481 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1484 static inline unsigned long __raw_local_irq_save(void)
1488 f = __raw_local_save_flags();
1489 raw_local_irq_disable();
1494 /* Make sure as little as possible of this mess escapes. */
1495 #undef PARAVIRT_CALL
1509 #else /* __ASSEMBLY__ */
1511 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1515 .pushsection .parainstructions,"a"; \
1524 #ifdef CONFIG_X86_64
1525 #define PV_SAVE_REGS \
1535 #define PV_RESTORE_REGS \
1545 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1546 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1547 #define PARA_INDIRECT(addr) *addr(%rip)
1549 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1550 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1551 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1552 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1553 #define PARA_INDIRECT(addr) *%cs:addr
1556 #define INTERRUPT_RETURN \
1557 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1558 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1560 #define DISABLE_INTERRUPTS(clobbers) \
1561 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1563 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1566 #define ENABLE_INTERRUPTS(clobbers) \
1567 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1569 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1572 #define USERGS_SYSRET32 \
1573 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1575 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1577 #ifdef CONFIG_X86_32
1578 #define GET_CR0_INTO_EAX \
1579 push %ecx; push %edx; \
1580 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1583 #define ENABLE_INTERRUPTS_SYSEXIT \
1584 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1586 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1589 #else /* !CONFIG_X86_32 */
1592 * If swapgs is used while the userspace stack is still current,
1593 * there's no way to call a pvop. The PV replacement *must* be
1594 * inlined, or the swapgs instruction must be trapped and emulated.
1596 #define SWAPGS_UNSAFE_STACK \
1597 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1601 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1603 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1607 #define GET_CR2_INTO_RCX \
1608 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1612 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1613 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1615 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1617 #define USERGS_SYSRET64 \
1618 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1620 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1622 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1623 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1625 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1626 #endif /* CONFIG_X86_32 */
1628 #endif /* __ASSEMBLY__ */
1629 #endif /* CONFIG_PARAVIRT */
1630 #endif /* ASM_X86__PARAVIRT_H */