1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_tsc_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
119 void (*load_gs_index)(unsigned int idx);
121 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
123 void (*write_gdt_entry)(struct desc_struct *,
124 int entrynum, const void *desc, int size);
125 void (*write_idt_entry)(gate_desc *,
126 int entrynum, const gate_desc *gate);
127 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
129 void (*set_iopl_mask)(unsigned mask);
131 void (*wbinvd)(void);
132 void (*io_delay)(void);
134 /* cpuid emulation, mostly so that caps bits can be disabled */
135 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
136 unsigned int *ecx, unsigned int *edx);
138 /* MSR, PMC and TSR operations.
139 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
140 u64 (*read_msr)(unsigned int msr, int *err);
141 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
143 u64 (*read_tsc)(void);
144 u64 (*read_pmc)(int counter);
145 unsigned long long (*read_tscp)(unsigned int *aux);
148 * Atomically enable interrupts and return to userspace. This
149 * is only ever used to return to 32-bit processes; in a
150 * 64-bit kernel, it's used for 32-on-64 compat processes, but
151 * never native 64-bit processes. (Jump, not call.)
153 void (*irq_enable_sysexit)(void);
156 * Switch to usermode gs and return to 64-bit usermode using
157 * sysret. Only used in 64-bit kernels to return to 64-bit
158 * processes. Usermode register state, including %rsp, must
159 * already be restored.
161 void (*usergs_sysret64)(void);
164 * Switch to usermode gs and return to 32-bit usermode using
165 * sysret. Used to return to 32-on-64 compat processes.
166 * Other usermode register state, including %esp, must already
169 void (*usergs_sysret32)(void);
171 /* Normal iret. Jump to this with the standard iret stack
175 void (*swapgs)(void);
177 struct pv_lazy_ops lazy_mode;
181 void (*init_IRQ)(void);
184 * Get/set interrupt state. save_fl and restore_fl are only
185 * expected to use X86_EFLAGS_IF; all other bits
186 * returned from save_fl are undefined, and may be ignored by
189 unsigned long (*save_fl)(void);
190 void (*restore_fl)(unsigned long);
191 void (*irq_disable)(void);
192 void (*irq_enable)(void);
193 void (*safe_halt)(void);
197 void (*adjust_exception_frame)(void);
202 #ifdef CONFIG_X86_LOCAL_APIC
203 #ifndef CONFIG_X86_64
205 * Direct APIC operations, principally for VMI. Ideally
206 * these shouldn't be in this interface.
208 void (*apic_write)(u32 reg, u32 v);
209 void (*apic_write_atomic)(u32 reg, u32 v);
210 u32 (*apic_read)(u32 reg);
212 void (*setup_boot_clock)(void);
213 void (*setup_secondary_clock)(void);
215 void (*startup_ipi_hook)(int phys_apicid,
216 unsigned long start_eip,
217 unsigned long start_esp);
223 * Called before/after init_mm pagetable setup. setup_start
224 * may reset %cr3, and may pre-install parts of the pagetable;
225 * pagetable setup is expected to preserve any existing
228 void (*pagetable_setup_start)(pgd_t *pgd_base);
229 void (*pagetable_setup_done)(pgd_t *pgd_base);
231 unsigned long (*read_cr2)(void);
232 void (*write_cr2)(unsigned long);
234 unsigned long (*read_cr3)(void);
235 void (*write_cr3)(unsigned long);
238 * Hooks for intercepting the creation/use/destruction of an
241 void (*activate_mm)(struct mm_struct *prev,
242 struct mm_struct *next);
243 void (*dup_mmap)(struct mm_struct *oldmm,
244 struct mm_struct *mm);
245 void (*exit_mmap)(struct mm_struct *mm);
249 void (*flush_tlb_user)(void);
250 void (*flush_tlb_kernel)(void);
251 void (*flush_tlb_single)(unsigned long addr);
252 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
255 /* Hooks for allocating and freeing a pagetable top-level */
256 int (*pgd_alloc)(struct mm_struct *mm);
257 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
260 * Hooks for allocating/releasing pagetable pages when they're
261 * attached to a pagetable
263 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
264 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
265 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
266 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
267 void (*release_pte)(u32 pfn);
268 void (*release_pmd)(u32 pfn);
269 void (*release_pud)(u32 pfn);
271 /* Pagetable manipulation functions */
272 void (*set_pte)(pte_t *ptep, pte_t pteval);
273 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
274 pte_t *ptep, pte_t pteval);
275 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
276 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
278 void (*pte_update_defer)(struct mm_struct *mm,
279 unsigned long addr, pte_t *ptep);
281 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
283 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
284 pte_t *ptep, pte_t pte);
286 pteval_t (*pte_val)(pte_t);
287 pteval_t (*pte_flags)(pte_t);
288 pte_t (*make_pte)(pteval_t pte);
290 pgdval_t (*pgd_val)(pgd_t);
291 pgd_t (*make_pgd)(pgdval_t pgd);
293 #if PAGETABLE_LEVELS >= 3
294 #ifdef CONFIG_X86_PAE
295 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
296 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
297 pte_t *ptep, pte_t pte);
298 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
300 void (*pmd_clear)(pmd_t *pmdp);
302 #endif /* CONFIG_X86_PAE */
304 void (*set_pud)(pud_t *pudp, pud_t pudval);
306 pmdval_t (*pmd_val)(pmd_t);
307 pmd_t (*make_pmd)(pmdval_t pmd);
309 #if PAGETABLE_LEVELS == 4
310 pudval_t (*pud_val)(pud_t);
311 pud_t (*make_pud)(pudval_t pud);
313 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
314 #endif /* PAGETABLE_LEVELS == 4 */
315 #endif /* PAGETABLE_LEVELS >= 3 */
317 #ifdef CONFIG_HIGHPTE
318 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
321 struct pv_lazy_ops lazy_mode;
325 /* Sometimes the physical address is a pfn, and sometimes its
326 an mfn. We can tell which is which from the index. */
327 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
328 unsigned long phys, pgprot_t flags);
331 /* This contains all the paravirt structures: we get a convenient
332 * number for each function using the offset which we use to indicate
334 struct paravirt_patch_template {
335 struct pv_init_ops pv_init_ops;
336 struct pv_time_ops pv_time_ops;
337 struct pv_cpu_ops pv_cpu_ops;
338 struct pv_irq_ops pv_irq_ops;
339 struct pv_apic_ops pv_apic_ops;
340 struct pv_mmu_ops pv_mmu_ops;
343 extern struct pv_info pv_info;
344 extern struct pv_init_ops pv_init_ops;
345 extern struct pv_time_ops pv_time_ops;
346 extern struct pv_cpu_ops pv_cpu_ops;
347 extern struct pv_irq_ops pv_irq_ops;
348 extern struct pv_apic_ops pv_apic_ops;
349 extern struct pv_mmu_ops pv_mmu_ops;
351 #define PARAVIRT_PATCH(x) \
352 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
354 #define paravirt_type(op) \
355 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
356 [paravirt_opptr] "m" (op)
357 #define paravirt_clobber(clobber) \
358 [paravirt_clobber] "i" (clobber)
361 * Generate some code, and mark it as patchable by the
362 * apply_paravirt() alternate instruction patcher.
364 #define _paravirt_alt(insn_string, type, clobber) \
365 "771:\n\t" insn_string "\n" "772:\n" \
366 ".pushsection .parainstructions,\"a\"\n" \
369 " .byte " type "\n" \
370 " .byte 772b-771b\n" \
371 " .short " clobber "\n" \
374 /* Generate patchable code, with the default asm parameters. */
375 #define paravirt_alt(insn_string) \
376 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
378 /* Simple instruction patching code. */
379 #define DEF_NATIVE(ops, name, code) \
380 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
381 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
383 unsigned paravirt_patch_nop(void);
384 unsigned paravirt_patch_ignore(unsigned len);
385 unsigned paravirt_patch_call(void *insnbuf,
386 const void *target, u16 tgt_clobbers,
387 unsigned long addr, u16 site_clobbers,
389 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
390 unsigned long addr, unsigned len);
391 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
392 unsigned long addr, unsigned len);
394 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
395 const char *start, const char *end);
397 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
398 unsigned long addr, unsigned len);
400 int paravirt_disable_iospace(void);
403 * This generates an indirect call based on the operation type number.
404 * The type number, computed in PARAVIRT_PATCH, is derived from the
405 * offset into the paravirt_patch_template structure, and can therefore be
406 * freely converted back into a structure offset.
408 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
411 * These macros are intended to wrap calls through one of the paravirt
412 * ops structs, so that they can be later identified and patched at
415 * Normally, a call to a pv_op function is a simple indirect call:
416 * (pv_op_struct.operations)(args...).
418 * Unfortunately, this is a relatively slow operation for modern CPUs,
419 * because it cannot necessarily determine what the destination
420 * address is. In this case, the address is a runtime constant, so at
421 * the very least we can patch the call to e a simple direct call, or
422 * ideally, patch an inline implementation into the callsite. (Direct
423 * calls are essentially free, because the call and return addresses
424 * are completely predictable.)
426 * For i386, these macros rely on the standard gcc "regparm(3)" calling
427 * convention, in which the first three arguments are placed in %eax,
428 * %edx, %ecx (in that order), and the remaining arguments are placed
429 * on the stack. All caller-save registers (eax,edx,ecx) are expected
430 * to be modified (either clobbered or used for return values).
431 * X86_64, on the other hand, already specifies a register-based calling
432 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
433 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
434 * special handling for dealing with 4 arguments, unlike i386.
435 * However, x86_64 also have to clobber all caller saved registers, which
436 * unfortunately, are quite a bit (r8 - r11)
438 * The call instruction itself is marked by placing its start address
439 * and size into the .parainstructions section, so that
440 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
441 * appropriate patching under the control of the backend pv_init_ops
444 * Unfortunately there's no way to get gcc to generate the args setup
445 * for the call, and then allow the call itself to be generated by an
446 * inline asm. Because of this, we must do the complete arg setup and
447 * return value handling from within these macros. This is fairly
450 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
451 * It could be extended to more arguments, but there would be little
452 * to be gained from that. For each number of arguments, there are
453 * the two VCALL and CALL variants for void and non-void functions.
455 * When there is a return value, the invoker of the macro must specify
456 * the return type. The macro then uses sizeof() on that type to
457 * determine whether its a 32 or 64 bit value, and places the return
458 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
459 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
460 * the return value size.
462 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
463 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
466 * Small structures are passed and returned in registers. The macro
467 * calling convention can't directly deal with this, so the wrapper
468 * functions must do this.
470 * These PVOP_* macros are only defined within this header. This
471 * means that all uses must be wrapped in inline functions. This also
472 * makes sure the incoming and outgoing types are always correct.
475 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
476 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
477 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
479 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
480 #define EXTRA_CLOBBERS
481 #define VEXTRA_CLOBBERS
483 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
484 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
485 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
486 "=S" (__esi), "=d" (__edx), \
489 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
491 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
492 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
495 #ifdef CONFIG_PARAVIRT_DEBUG
496 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
498 #define PVOP_TEST_NULL(op) ((void)op)
501 #define __PVOP_CALL(rettype, op, pre, post, ...) \
505 PVOP_TEST_NULL(op); \
506 /* This is 32-bit specific, but is okay in 64-bit */ \
507 /* since this condition will never hold */ \
508 if (sizeof(rettype) > sizeof(unsigned long)) { \
510 paravirt_alt(PARAVIRT_CALL) \
512 : PVOP_CALL_CLOBBERS \
513 : paravirt_type(op), \
514 paravirt_clobber(CLBR_ANY), \
516 : "memory", "cc" EXTRA_CLOBBERS); \
517 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
520 paravirt_alt(PARAVIRT_CALL) \
522 : PVOP_CALL_CLOBBERS \
523 : paravirt_type(op), \
524 paravirt_clobber(CLBR_ANY), \
526 : "memory", "cc" EXTRA_CLOBBERS); \
527 __ret = (rettype)__eax; \
531 #define __PVOP_VCALL(op, pre, post, ...) \
534 PVOP_TEST_NULL(op); \
536 paravirt_alt(PARAVIRT_CALL) \
538 : PVOP_VCALL_CLOBBERS \
539 : paravirt_type(op), \
540 paravirt_clobber(CLBR_ANY), \
542 : "memory", "cc" VEXTRA_CLOBBERS); \
545 #define PVOP_CALL0(rettype, op) \
546 __PVOP_CALL(rettype, op, "", "")
547 #define PVOP_VCALL0(op) \
548 __PVOP_VCALL(op, "", "")
550 #define PVOP_CALL1(rettype, op, arg1) \
551 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
552 #define PVOP_VCALL1(op, arg1) \
553 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
555 #define PVOP_CALL2(rettype, op, arg1, arg2) \
556 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
557 "1" ((unsigned long)(arg2)))
558 #define PVOP_VCALL2(op, arg1, arg2) \
559 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
560 "1" ((unsigned long)(arg2)))
562 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
563 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
564 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
565 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
566 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
567 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
569 /* This is the only difference in x86_64. We can make it much simpler */
571 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
572 __PVOP_CALL(rettype, op, \
573 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
574 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
575 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
576 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
578 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
579 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
580 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
582 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
583 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
584 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
585 "3"((unsigned long)(arg4)))
586 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
587 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
588 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
589 "3"((unsigned long)(arg4)))
592 static inline int paravirt_enabled(void)
594 return pv_info.paravirt_enabled;
597 static inline void load_sp0(struct tss_struct *tss,
598 struct thread_struct *thread)
600 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
603 #define ARCH_SETUP pv_init_ops.arch_setup();
604 static inline unsigned long get_wallclock(void)
606 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
609 static inline int set_wallclock(unsigned long nowtime)
611 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
614 static inline void (*choose_time_init(void))(void)
616 return pv_time_ops.time_init;
619 /* The paravirtualized CPUID instruction. */
620 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
621 unsigned int *ecx, unsigned int *edx)
623 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
627 * These special macros can be used to get or set a debugging register
629 static inline unsigned long paravirt_get_debugreg(int reg)
631 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
633 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
634 static inline void set_debugreg(unsigned long val, int reg)
636 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
639 static inline void clts(void)
641 PVOP_VCALL0(pv_cpu_ops.clts);
644 static inline unsigned long read_cr0(void)
646 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
649 static inline void write_cr0(unsigned long x)
651 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
654 static inline unsigned long read_cr2(void)
656 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
659 static inline void write_cr2(unsigned long x)
661 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
664 static inline unsigned long read_cr3(void)
666 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
669 static inline void write_cr3(unsigned long x)
671 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
674 static inline unsigned long read_cr4(void)
676 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
678 static inline unsigned long read_cr4_safe(void)
680 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
683 static inline void write_cr4(unsigned long x)
685 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
689 static inline unsigned long read_cr8(void)
691 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
694 static inline void write_cr8(unsigned long x)
696 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
700 static inline void raw_safe_halt(void)
702 PVOP_VCALL0(pv_irq_ops.safe_halt);
705 static inline void halt(void)
707 PVOP_VCALL0(pv_irq_ops.safe_halt);
710 static inline void wbinvd(void)
712 PVOP_VCALL0(pv_cpu_ops.wbinvd);
715 #define get_kernel_rpl() (pv_info.kernel_rpl)
717 static inline u64 paravirt_read_msr(unsigned msr, int *err)
719 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
721 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
723 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
726 /* These should all do BUG_ON(_err), but our headers are too tangled. */
727 #define rdmsr(msr, val1, val2) \
730 u64 _l = paravirt_read_msr(msr, &_err); \
735 #define wrmsr(msr, val1, val2) \
737 paravirt_write_msr(msr, val1, val2); \
740 #define rdmsrl(msr, val) \
743 val = paravirt_read_msr(msr, &_err); \
746 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
747 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
749 /* rdmsr with exception handling */
750 #define rdmsr_safe(msr, a, b) \
753 u64 _l = paravirt_read_msr(msr, &_err); \
759 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
763 *p = paravirt_read_msr(msr, &err);
767 static inline u64 paravirt_read_tsc(void)
769 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
772 #define rdtscl(low) \
774 u64 _l = paravirt_read_tsc(); \
778 #define rdtscll(val) (val = paravirt_read_tsc())
780 static inline unsigned long long paravirt_sched_clock(void)
782 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
784 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
786 static inline unsigned long long paravirt_read_pmc(int counter)
788 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
791 #define rdpmc(counter, low, high) \
793 u64 _l = paravirt_read_pmc(counter); \
798 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
800 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
803 #define rdtscp(low, high, aux) \
806 unsigned long __val = paravirt_rdtscp(&__aux); \
807 (low) = (u32)__val; \
808 (high) = (u32)(__val >> 32); \
812 #define rdtscpll(val, aux) \
814 unsigned long __aux; \
815 val = paravirt_rdtscp(&__aux); \
819 static inline void load_TR_desc(void)
821 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
823 static inline void load_gdt(const struct desc_ptr *dtr)
825 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
827 static inline void load_idt(const struct desc_ptr *dtr)
829 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
831 static inline void set_ldt(const void *addr, unsigned entries)
833 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
835 static inline void store_gdt(struct desc_ptr *dtr)
837 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
839 static inline void store_idt(struct desc_ptr *dtr)
841 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
843 static inline unsigned long paravirt_store_tr(void)
845 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
847 #define store_tr(tr) ((tr) = paravirt_store_tr())
848 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
850 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
854 static inline void load_gs_index(unsigned int gs)
856 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
860 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
863 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
866 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
867 void *desc, int type)
869 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
872 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
874 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
876 static inline void set_iopl_mask(unsigned mask)
878 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
881 /* The paravirtualized I/O functions */
882 static inline void slow_down_io(void)
884 pv_cpu_ops.io_delay();
885 #ifdef REALLY_SLOW_IO
886 pv_cpu_ops.io_delay();
887 pv_cpu_ops.io_delay();
888 pv_cpu_ops.io_delay();
892 #ifdef CONFIG_X86_LOCAL_APIC
894 * Basic functions accessing APICs.
896 #ifndef CONFIG_X86_64
897 static inline void apic_write(u32 reg, u32 v)
899 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
902 static inline void apic_write_atomic(u32 reg, u32 v)
904 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
907 static inline u32 apic_read(u32 reg)
909 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
913 static inline void setup_boot_clock(void)
915 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
918 static inline void setup_secondary_clock(void)
920 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
924 static inline void paravirt_post_allocator_init(void)
926 if (pv_init_ops.post_allocator_init)
927 (*pv_init_ops.post_allocator_init)();
930 static inline void paravirt_pagetable_setup_start(pgd_t *base)
932 (*pv_mmu_ops.pagetable_setup_start)(base);
935 static inline void paravirt_pagetable_setup_done(pgd_t *base)
937 (*pv_mmu_ops.pagetable_setup_done)(base);
941 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
942 unsigned long start_esp)
944 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
945 phys_apicid, start_eip, start_esp);
949 static inline void paravirt_activate_mm(struct mm_struct *prev,
950 struct mm_struct *next)
952 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
955 static inline void arch_dup_mmap(struct mm_struct *oldmm,
956 struct mm_struct *mm)
958 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
961 static inline void arch_exit_mmap(struct mm_struct *mm)
963 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
966 static inline void __flush_tlb(void)
968 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
970 static inline void __flush_tlb_global(void)
972 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
974 static inline void __flush_tlb_single(unsigned long addr)
976 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
979 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
982 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
985 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
987 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
990 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
992 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
995 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
997 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
999 static inline void paravirt_release_pte(unsigned pfn)
1001 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1004 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
1006 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1009 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
1010 unsigned start, unsigned count)
1012 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1014 static inline void paravirt_release_pmd(unsigned pfn)
1016 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1019 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
1021 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1023 static inline void paravirt_release_pud(unsigned pfn)
1025 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1028 #ifdef CONFIG_HIGHPTE
1029 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1032 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1037 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1040 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1043 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1046 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1049 static inline pte_t __pte(pteval_t val)
1053 if (sizeof(pteval_t) > sizeof(long))
1054 ret = PVOP_CALL2(pteval_t,
1055 pv_mmu_ops.make_pte,
1056 val, (u64)val >> 32);
1058 ret = PVOP_CALL1(pteval_t,
1059 pv_mmu_ops.make_pte,
1062 return (pte_t) { .pte = ret };
1065 static inline pteval_t pte_val(pte_t pte)
1069 if (sizeof(pteval_t) > sizeof(long))
1070 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1071 pte.pte, (u64)pte.pte >> 32);
1073 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1079 static inline pteval_t pte_flags(pte_t pte)
1083 if (sizeof(pteval_t) > sizeof(long))
1084 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1085 pte.pte, (u64)pte.pte >> 32);
1087 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1093 static inline pgd_t __pgd(pgdval_t val)
1097 if (sizeof(pgdval_t) > sizeof(long))
1098 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1099 val, (u64)val >> 32);
1101 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1104 return (pgd_t) { ret };
1107 static inline pgdval_t pgd_val(pgd_t pgd)
1111 if (sizeof(pgdval_t) > sizeof(long))
1112 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1113 pgd.pgd, (u64)pgd.pgd >> 32);
1115 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1121 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1122 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1127 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1130 return (pte_t) { .pte = ret };
1133 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1134 pte_t *ptep, pte_t pte)
1136 if (sizeof(pteval_t) > sizeof(long))
1138 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1140 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1141 mm, addr, ptep, pte.pte);
1144 static inline void set_pte(pte_t *ptep, pte_t pte)
1146 if (sizeof(pteval_t) > sizeof(long))
1147 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1148 pte.pte, (u64)pte.pte >> 32);
1150 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1154 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1155 pte_t *ptep, pte_t pte)
1157 if (sizeof(pteval_t) > sizeof(long))
1159 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1161 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1164 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1166 pmdval_t val = native_pmd_val(pmd);
1168 if (sizeof(pmdval_t) > sizeof(long))
1169 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1171 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1174 #if PAGETABLE_LEVELS >= 3
1175 static inline pmd_t __pmd(pmdval_t val)
1179 if (sizeof(pmdval_t) > sizeof(long))
1180 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1181 val, (u64)val >> 32);
1183 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1186 return (pmd_t) { ret };
1189 static inline pmdval_t pmd_val(pmd_t pmd)
1193 if (sizeof(pmdval_t) > sizeof(long))
1194 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1195 pmd.pmd, (u64)pmd.pmd >> 32);
1197 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1203 static inline void set_pud(pud_t *pudp, pud_t pud)
1205 pudval_t val = native_pud_val(pud);
1207 if (sizeof(pudval_t) > sizeof(long))
1208 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1209 val, (u64)val >> 32);
1211 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1214 #if PAGETABLE_LEVELS == 4
1215 static inline pud_t __pud(pudval_t val)
1219 if (sizeof(pudval_t) > sizeof(long))
1220 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1221 val, (u64)val >> 32);
1223 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1226 return (pud_t) { ret };
1229 static inline pudval_t pud_val(pud_t pud)
1233 if (sizeof(pudval_t) > sizeof(long))
1234 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1235 pud.pud, (u64)pud.pud >> 32);
1237 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1243 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1245 pgdval_t val = native_pgd_val(pgd);
1247 if (sizeof(pgdval_t) > sizeof(long))
1248 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1249 val, (u64)val >> 32);
1251 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1255 static inline void pgd_clear(pgd_t *pgdp)
1257 set_pgd(pgdp, __pgd(0));
1260 static inline void pud_clear(pud_t *pudp)
1262 set_pud(pudp, __pud(0));
1265 #endif /* PAGETABLE_LEVELS == 4 */
1267 #endif /* PAGETABLE_LEVELS >= 3 */
1269 #ifdef CONFIG_X86_PAE
1270 /* Special-case pte-setting operations for PAE, which can't update a
1271 64-bit pte atomically */
1272 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1274 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1275 pte.pte, pte.pte >> 32);
1278 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1279 pte_t *ptep, pte_t pte)
1282 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1285 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1288 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1291 static inline void pmd_clear(pmd_t *pmdp)
1293 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1295 #else /* !CONFIG_X86_PAE */
1296 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1301 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1302 pte_t *ptep, pte_t pte)
1307 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1310 set_pte_at(mm, addr, ptep, __pte(0));
1313 static inline void pmd_clear(pmd_t *pmdp)
1315 set_pmd(pmdp, __pmd(0));
1317 #endif /* CONFIG_X86_PAE */
1319 /* Lazy mode for batching updates / context switch */
1320 enum paravirt_lazy_mode {
1326 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1327 void paravirt_enter_lazy_cpu(void);
1328 void paravirt_leave_lazy_cpu(void);
1329 void paravirt_enter_lazy_mmu(void);
1330 void paravirt_leave_lazy_mmu(void);
1331 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1333 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1334 static inline void arch_enter_lazy_cpu_mode(void)
1336 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1339 static inline void arch_leave_lazy_cpu_mode(void)
1341 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1344 static inline void arch_flush_lazy_cpu_mode(void)
1346 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1347 arch_leave_lazy_cpu_mode();
1348 arch_enter_lazy_cpu_mode();
1353 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1354 static inline void arch_enter_lazy_mmu_mode(void)
1356 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1359 static inline void arch_leave_lazy_mmu_mode(void)
1361 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1364 static inline void arch_flush_lazy_mmu_mode(void)
1366 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1367 arch_leave_lazy_mmu_mode();
1368 arch_enter_lazy_mmu_mode();
1372 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1373 unsigned long phys, pgprot_t flags)
1375 pv_mmu_ops.set_fixmap(idx, phys, flags);
1378 void _paravirt_nop(void);
1379 #define paravirt_nop ((void *)_paravirt_nop)
1381 /* These all sit in the .parainstructions section to tell us what to patch. */
1382 struct paravirt_patch_site {
1383 u8 *instr; /* original instructions */
1384 u8 instrtype; /* type of this instruction */
1385 u8 len; /* length of original instruction */
1386 u16 clobbers; /* what registers you may clobber */
1389 extern struct paravirt_patch_site __parainstructions[],
1390 __parainstructions_end[];
1392 #ifdef CONFIG_X86_32
1393 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1394 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1395 #define PV_FLAGS_ARG "0"
1396 #define PV_EXTRA_CLOBBERS
1397 #define PV_VEXTRA_CLOBBERS
1399 /* We save some registers, but all of them, that's too much. We clobber all
1400 * caller saved registers but the argument parameter */
1401 #define PV_SAVE_REGS "pushq %%rdi;"
1402 #define PV_RESTORE_REGS "popq %%rdi;"
1403 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1404 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1405 #define PV_FLAGS_ARG "D"
1408 static inline unsigned long __raw_local_save_flags(void)
1412 asm volatile(paravirt_alt(PV_SAVE_REGS
1416 : paravirt_type(pv_irq_ops.save_fl),
1417 paravirt_clobber(CLBR_EAX)
1418 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1422 static inline void raw_local_irq_restore(unsigned long f)
1424 asm volatile(paravirt_alt(PV_SAVE_REGS
1429 paravirt_type(pv_irq_ops.restore_fl),
1430 paravirt_clobber(CLBR_EAX)
1431 : "memory", "cc" PV_EXTRA_CLOBBERS);
1434 static inline void raw_local_irq_disable(void)
1436 asm volatile(paravirt_alt(PV_SAVE_REGS
1440 : paravirt_type(pv_irq_ops.irq_disable),
1441 paravirt_clobber(CLBR_EAX)
1442 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1445 static inline void raw_local_irq_enable(void)
1447 asm volatile(paravirt_alt(PV_SAVE_REGS
1451 : paravirt_type(pv_irq_ops.irq_enable),
1452 paravirt_clobber(CLBR_EAX)
1453 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1456 static inline unsigned long __raw_local_irq_save(void)
1460 f = __raw_local_save_flags();
1461 raw_local_irq_disable();
1465 /* Make sure as little as possible of this mess escapes. */
1466 #undef PARAVIRT_CALL
1480 #else /* __ASSEMBLY__ */
1482 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1486 .pushsection .parainstructions,"a"; \
1495 #ifdef CONFIG_X86_64
1496 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1497 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1498 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1499 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1500 #define PARA_INDIRECT(addr) *addr(%rip)
1502 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1503 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1504 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1505 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1506 #define PARA_INDIRECT(addr) *%cs:addr
1509 #define INTERRUPT_RETURN \
1510 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1511 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1513 #define DISABLE_INTERRUPTS(clobbers) \
1514 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1516 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1519 #define ENABLE_INTERRUPTS(clobbers) \
1520 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1522 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1525 #define USERGS_SYSRET32 \
1526 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1528 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1530 #ifdef CONFIG_X86_32
1531 #define GET_CR0_INTO_EAX \
1532 push %ecx; push %edx; \
1533 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1536 #define ENABLE_INTERRUPTS_SYSEXIT \
1537 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1539 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1542 #else /* !CONFIG_X86_32 */
1545 * If swapgs is used while the userspace stack is still current,
1546 * there's no way to call a pvop. The PV replacement *must* be
1547 * inlined, or the swapgs instruction must be trapped and emulated.
1549 #define SWAPGS_UNSAFE_STACK \
1550 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1554 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1556 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1560 #define GET_CR2_INTO_RCX \
1561 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1565 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1566 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1568 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1570 #define USERGS_SYSRET64 \
1571 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1573 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1575 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1576 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1578 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1579 #endif /* CONFIG_X86_32 */
1581 #endif /* __ASSEMBLY__ */
1582 #endif /* CONFIG_PARAVIRT */
1583 #endif /* __ASM_PARAVIRT_H */