2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef ASM_X86__I387_H
11 #define ASM_X86__I387_H
13 #include <linux/sched.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/regset.h>
16 #include <linux/hardirq.h>
18 #include <asm/processor.h>
19 #include <asm/sigcontext.h>
21 #include <asm/uaccess.h>
22 #include <asm/xsave.h>
24 extern unsigned int sig_xstate_size;
25 extern void fpu_init(void);
26 extern void mxcsr_feature_mask_init(void);
27 extern int init_fpu(struct task_struct *child);
28 extern asmlinkage void math_state_restore(void);
29 extern void init_thread_xstate(void);
31 extern user_regset_active_fn fpregs_active, xfpregs_active;
32 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
33 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
35 extern struct _fpx_sw_bytes fx_sw_reserved;
36 #ifdef CONFIG_IA32_EMULATION
37 extern unsigned int sig_xstate_ia32_size;
38 extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
41 extern int save_i387_xstate_ia32(void __user *buf);
42 extern int restore_i387_xstate_ia32(void __user *buf);
45 #define X87_FSW_ES (1 << 7) /* Exception Summary */
49 /* Ignore delayed exceptions from user space */
50 static inline void tolerant_fwait(void)
52 asm volatile("1: fwait\n"
54 _ASM_EXTABLE(1b, 2b));
57 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
61 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
63 ".section .fixup,\"ax\"\n"
64 "3: movl $-1,%[err]\n"
69 #if 0 /* See comment in __save_init_fpu() below. */
70 : [fx] "r" (fx), "m" (*fx), "0" (0));
72 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
77 static inline int restore_fpu_checking(struct task_struct *tsk)
79 if (task_thread_info(tsk)->status & TS_XSAVE)
80 return xrstor_checking(&tsk->thread.xstate->xsave);
82 return fxrstor_checking(&tsk->thread.xstate->fxsave);
85 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
86 is pending. Clear the x87 state here by setting it to fixed
87 values. The kernel data segment can be sometimes 0 and sometimes
88 new user value. Both should be ok.
89 Use the PDA as safe address because it should be already in L1. */
90 static inline void clear_fpu_state(struct task_struct *tsk)
92 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
93 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
96 * xsave header may indicate the init state of the FP.
98 if ((task_thread_info(tsk)->status & TS_XSAVE) &&
99 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
102 if (unlikely(fx->swd & X87_FSW_ES))
103 asm volatile("fnclex");
104 alternative_input(ASM_NOP8 ASM_NOP2,
105 " emms\n" /* clear stack tags */
106 " fildl %%gs:0", /* load to clear state */
107 X86_FEATURE_FXSAVE_LEAK);
110 static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
114 asm volatile("1: rex64/fxsave (%[fx])\n\t"
116 ".section .fixup,\"ax\"\n"
117 "3: movl $-1,%[err]\n"
121 : [err] "=r" (err), "=m" (*fx)
122 #if 0 /* See comment in __fxsave_clear() below. */
123 : [fx] "r" (fx), "0" (0));
125 : [fx] "cdaSDb" (fx), "0" (0));
128 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
130 /* No need to clear here because the caller clears USED_MATH */
134 static inline void fxsave(struct task_struct *tsk)
136 /* Using "rex64; fxsave %0" is broken because, if the memory operand
137 uses any extended registers for addressing, a second REX prefix
138 will be generated (to the assembler, rex64 followed by semicolon
139 is a separate instruction), and hence the 64-bitness is lost. */
141 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
142 starting with gas 2.16. */
143 __asm__ __volatile__("fxsaveq %0"
144 : "=m" (tsk->thread.xstate->fxsave));
146 /* Using, as a workaround, the properly prefixed form below isn't
147 accepted by any binutils version so far released, complaining that
148 the same type of prefix is used twice if an extended register is
149 needed for addressing (fix submitted to mainline 2005-11-21). */
150 __asm__ __volatile__("rex64/fxsave %0"
151 : "=m" (tsk->thread.xstate->fxsave));
153 /* This, however, we can work around by forcing the compiler to select
154 an addressing mode that doesn't require extended registers. */
155 __asm__ __volatile__("rex64/fxsave (%1)"
156 : "=m" (tsk->thread.xstate->fxsave)
157 : "cdaSDb" (&tsk->thread.xstate->fxsave));
161 static inline void __save_init_fpu(struct task_struct *tsk)
163 if (task_thread_info(tsk)->status & TS_XSAVE)
168 clear_fpu_state(tsk);
169 task_thread_info(tsk)->status &= ~TS_USEDFPU;
172 #else /* CONFIG_X86_32 */
174 extern void finit(void);
176 static inline void tolerant_fwait(void)
178 asm volatile("fnclex ; fwait");
181 static inline void restore_fpu(struct task_struct *tsk)
183 if (task_thread_info(tsk)->status & TS_XSAVE) {
184 xrstor_checking(&tsk->thread.xstate->xsave);
188 * The "nop" is needed to make the instructions the same
195 "m" (tsk->thread.xstate->fxsave));
198 /* We need a safe address that is cheap to find and that is already
199 in L1 during context switch. The best choices are unfortunately
200 different for UP and SMP */
202 #define safe_address (__per_cpu_offset[0])
204 #define safe_address (kstat_cpu(0).cpustat.user)
208 * These must be called with preempt disabled
210 static inline void __save_init_fpu(struct task_struct *tsk)
212 if (task_thread_info(tsk)->status & TS_XSAVE) {
213 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
214 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
219 * xsave header may indicate the init state of the FP.
221 if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
224 if (unlikely(fx->swd & X87_FSW_ES))
225 asm volatile("fnclex");
228 * we can do a simple return here or be paranoid :)
233 /* Use more nops than strictly needed in case the compiler
236 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
238 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
240 [fx] "m" (tsk->thread.xstate->fxsave),
241 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
243 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
244 is pending. Clear the x87 state here by setting it to fixed
245 values. safe_address is a random variable that should be in L1 */
247 GENERIC_NOP8 GENERIC_NOP2,
248 "emms\n\t" /* clear stack tags */
249 "fildl %[addr]", /* set F?P to defined value */
250 X86_FEATURE_FXSAVE_LEAK,
251 [addr] "m" (safe_address));
253 task_thread_info(tsk)->status &= ~TS_USEDFPU;
256 #endif /* CONFIG_X86_64 */
259 * Signal frame handlers...
261 extern int save_i387_xstate(void __user *buf);
262 extern int restore_i387_xstate(void __user *buf);
264 static inline void __unlazy_fpu(struct task_struct *tsk)
266 if (task_thread_info(tsk)->status & TS_USEDFPU) {
267 __save_init_fpu(tsk);
270 tsk->fpu_counter = 0;
273 static inline void __clear_fpu(struct task_struct *tsk)
275 if (task_thread_info(tsk)->status & TS_USEDFPU) {
277 task_thread_info(tsk)->status &= ~TS_USEDFPU;
282 static inline void kernel_fpu_begin(void)
284 struct thread_info *me = current_thread_info();
286 if (me->status & TS_USEDFPU)
287 __save_init_fpu(me->task);
292 static inline void kernel_fpu_end(void)
299 * Some instructions like VIA's padlock instructions generate a spurious
300 * DNA fault but don't modify SSE registers. And these instructions
301 * get used from interrupt context aswell. To prevent these kernel instructions
302 * in interrupt context interact wrongly with other user/kernel fpu usage, we
303 * should use them only in the context of irq_ts_save/restore()
305 static inline int irq_ts_save(void)
308 * If we are in process context, we are ok to take a spurious DNA fault.
309 * Otherwise, doing clts() in process context require pre-emption to
310 * be disabled or some heavy lifting like kernel_fpu_begin()
315 if (read_cr0() & X86_CR0_TS) {
323 static inline void irq_ts_restore(int TS_state)
331 static inline void save_init_fpu(struct task_struct *tsk)
333 __save_init_fpu(tsk);
337 #define unlazy_fpu __unlazy_fpu
338 #define clear_fpu __clear_fpu
340 #else /* CONFIG_X86_32 */
343 * These disable preemption on their own and are safe
345 static inline void save_init_fpu(struct task_struct *tsk)
348 __save_init_fpu(tsk);
353 static inline void unlazy_fpu(struct task_struct *tsk)
360 static inline void clear_fpu(struct task_struct *tsk)
367 #endif /* CONFIG_X86_64 */
370 * i387 state interaction
372 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
375 return tsk->thread.xstate->fxsave.cwd;
377 return (unsigned short)tsk->thread.xstate->fsave.cwd;
381 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
384 return tsk->thread.xstate->fxsave.swd;
386 return (unsigned short)tsk->thread.xstate->fsave.swd;
390 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
393 return tsk->thread.xstate->fxsave.mxcsr;
395 return MXCSR_DEFAULT;
399 #endif /* ASM_X86__I387_H */