2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef ASM_X86__I387_H
11 #define ASM_X86__I387_H
13 #include <linux/sched.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/regset.h>
17 #include <asm/processor.h>
18 #include <asm/sigcontext.h>
20 #include <asm/uaccess.h>
22 extern void fpu_init(void);
23 extern void mxcsr_feature_mask_init(void);
24 extern int init_fpu(struct task_struct *child);
25 extern asmlinkage void math_state_restore(void);
26 extern void init_thread_xstate(void);
28 extern user_regset_active_fn fpregs_active, xfpregs_active;
29 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
30 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
32 #ifdef CONFIG_IA32_EMULATION
34 extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
35 extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
40 /* Ignore delayed exceptions from user space */
41 static inline void tolerant_fwait(void)
43 asm volatile("1: fwait\n"
45 _ASM_EXTABLE(1b, 2b));
48 static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
52 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
54 ".section .fixup,\"ax\"\n"
55 "3: movl $-1,%[err]\n"
60 #if 0 /* See comment in __save_init_fpu() below. */
61 : [fx] "r" (fx), "m" (*fx), "0" (0));
63 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
68 #define X87_FSW_ES (1 << 7) /* Exception Summary */
70 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
71 is pending. Clear the x87 state here by setting it to fixed
72 values. The kernel data segment can be sometimes 0 and sometimes
73 new user value. Both should be ok.
74 Use the PDA as safe address because it should be already in L1. */
75 static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
77 if (unlikely(fx->swd & X87_FSW_ES))
78 asm volatile("fnclex");
79 alternative_input(ASM_NOP8 ASM_NOP2,
80 " emms\n" /* clear stack tags */
81 " fildl %%gs:0", /* load to clear state */
82 X86_FEATURE_FXSAVE_LEAK);
85 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
89 asm volatile("1: rex64/fxsave (%[fx])\n\t"
91 ".section .fixup,\"ax\"\n"
92 "3: movl $-1,%[err]\n"
96 : [err] "=r" (err), "=m" (*fx)
97 #if 0 /* See comment in __fxsave_clear() below. */
98 : [fx] "r" (fx), "0" (0));
100 : [fx] "cdaSDb" (fx), "0" (0));
103 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
105 /* No need to clear here because the caller clears USED_MATH */
109 static inline void __save_init_fpu(struct task_struct *tsk)
111 /* Using "rex64; fxsave %0" is broken because, if the memory operand
112 uses any extended registers for addressing, a second REX prefix
113 will be generated (to the assembler, rex64 followed by semicolon
114 is a separate instruction), and hence the 64-bitness is lost. */
116 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
117 starting with gas 2.16. */
118 __asm__ __volatile__("fxsaveq %0"
119 : "=m" (tsk->thread.xstate->fxsave));
121 /* Using, as a workaround, the properly prefixed form below isn't
122 accepted by any binutils version so far released, complaining that
123 the same type of prefix is used twice if an extended register is
124 needed for addressing (fix submitted to mainline 2005-11-21). */
125 __asm__ __volatile__("rex64/fxsave %0"
126 : "=m" (tsk->thread.xstate->fxsave));
128 /* This, however, we can work around by forcing the compiler to select
129 an addressing mode that doesn't require extended registers. */
130 __asm__ __volatile__("rex64/fxsave (%1)"
131 : "=m" (tsk->thread.xstate->fxsave)
132 : "cdaSDb" (&tsk->thread.xstate->fxsave));
134 clear_fpu_state(&tsk->thread.xstate->fxsave);
135 task_thread_info(tsk)->status &= ~TS_USEDFPU;
138 #else /* CONFIG_X86_32 */
140 extern void finit(void);
142 static inline void tolerant_fwait(void)
144 asm volatile("fnclex ; fwait");
147 static inline void restore_fpu(struct task_struct *tsk)
150 * The "nop" is needed to make the instructions the same
157 "m" (tsk->thread.xstate->fxsave));
160 /* We need a safe address that is cheap to find and that is already
161 in L1 during context switch. The best choices are unfortunately
162 different for UP and SMP */
164 #define safe_address (__per_cpu_offset[0])
166 #define safe_address (kstat_cpu(0).cpustat.user)
170 * These must be called with preempt disabled
172 static inline void __save_init_fpu(struct task_struct *tsk)
174 /* Use more nops than strictly needed in case the compiler
177 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
179 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
181 [fx] "m" (tsk->thread.xstate->fxsave),
182 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
183 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
184 is pending. Clear the x87 state here by setting it to fixed
185 values. safe_address is a random variable that should be in L1 */
187 GENERIC_NOP8 GENERIC_NOP2,
188 "emms\n\t" /* clear stack tags */
189 "fildl %[addr]", /* set F?P to defined value */
190 X86_FEATURE_FXSAVE_LEAK,
191 [addr] "m" (safe_address));
192 task_thread_info(tsk)->status &= ~TS_USEDFPU;
196 * Signal frame handlers...
198 extern int save_i387(struct _fpstate __user *buf);
199 extern int restore_i387(struct _fpstate __user *buf);
201 #endif /* CONFIG_X86_64 */
203 static inline void __unlazy_fpu(struct task_struct *tsk)
205 if (task_thread_info(tsk)->status & TS_USEDFPU) {
206 __save_init_fpu(tsk);
209 tsk->fpu_counter = 0;
212 static inline void __clear_fpu(struct task_struct *tsk)
214 if (task_thread_info(tsk)->status & TS_USEDFPU) {
216 task_thread_info(tsk)->status &= ~TS_USEDFPU;
221 static inline void kernel_fpu_begin(void)
223 struct thread_info *me = current_thread_info();
225 if (me->status & TS_USEDFPU)
226 __save_init_fpu(me->task);
231 static inline void kernel_fpu_end(void)
239 static inline void save_init_fpu(struct task_struct *tsk)
241 __save_init_fpu(tsk);
245 #define unlazy_fpu __unlazy_fpu
246 #define clear_fpu __clear_fpu
248 #else /* CONFIG_X86_32 */
251 * These disable preemption on their own and are safe
253 static inline void save_init_fpu(struct task_struct *tsk)
256 __save_init_fpu(tsk);
261 static inline void unlazy_fpu(struct task_struct *tsk)
268 static inline void clear_fpu(struct task_struct *tsk)
275 #endif /* CONFIG_X86_64 */
278 * i387 state interaction
280 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
283 return tsk->thread.xstate->fxsave.cwd;
285 return (unsigned short)tsk->thread.xstate->fsave.cwd;
289 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
292 return tsk->thread.xstate->fxsave.swd;
294 return (unsigned short)tsk->thread.xstate->fsave.swd;
298 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
301 return tsk->thread.xstate->fxsave.mxcsr;
303 return MXCSR_DEFAULT;
307 #endif /* ASM_X86__I387_H */