2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef ASM_X86__I387_H
11 #define ASM_X86__I387_H
13 #include <linux/sched.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/regset.h>
17 #include <asm/processor.h>
18 #include <asm/sigcontext.h>
20 #include <asm/uaccess.h>
21 #include <asm/xsave.h>
23 extern void fpu_init(void);
24 extern void mxcsr_feature_mask_init(void);
25 extern int init_fpu(struct task_struct *child);
26 extern asmlinkage void math_state_restore(void);
27 extern void init_thread_xstate(void);
29 extern user_regset_active_fn fpregs_active, xfpregs_active;
30 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
31 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
33 #ifdef CONFIG_IA32_EMULATION
35 extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
36 extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
41 /* Ignore delayed exceptions from user space */
42 static inline void tolerant_fwait(void)
44 asm volatile("1: fwait\n"
46 _ASM_EXTABLE(1b, 2b));
49 static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
53 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
55 ".section .fixup,\"ax\"\n"
56 "3: movl $-1,%[err]\n"
61 #if 0 /* See comment in __save_init_fpu() below. */
62 : [fx] "r" (fx), "m" (*fx), "0" (0));
64 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
69 #define X87_FSW_ES (1 << 7) /* Exception Summary */
71 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
72 is pending. Clear the x87 state here by setting it to fixed
73 values. The kernel data segment can be sometimes 0 and sometimes
74 new user value. Both should be ok.
75 Use the PDA as safe address because it should be already in L1. */
76 static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
78 if (unlikely(fx->swd & X87_FSW_ES))
79 asm volatile("fnclex");
80 alternative_input(ASM_NOP8 ASM_NOP2,
81 " emms\n" /* clear stack tags */
82 " fildl %%gs:0", /* load to clear state */
83 X86_FEATURE_FXSAVE_LEAK);
86 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
90 asm volatile("1: rex64/fxsave (%[fx])\n\t"
92 ".section .fixup,\"ax\"\n"
93 "3: movl $-1,%[err]\n"
97 : [err] "=r" (err), "=m" (*fx)
98 #if 0 /* See comment in __fxsave_clear() below. */
99 : [fx] "r" (fx), "0" (0));
101 : [fx] "cdaSDb" (fx), "0" (0));
104 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
106 /* No need to clear here because the caller clears USED_MATH */
110 static inline void __save_init_fpu(struct task_struct *tsk)
112 /* Using "rex64; fxsave %0" is broken because, if the memory operand
113 uses any extended registers for addressing, a second REX prefix
114 will be generated (to the assembler, rex64 followed by semicolon
115 is a separate instruction), and hence the 64-bitness is lost. */
117 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
118 starting with gas 2.16. */
119 __asm__ __volatile__("fxsaveq %0"
120 : "=m" (tsk->thread.xstate->fxsave));
122 /* Using, as a workaround, the properly prefixed form below isn't
123 accepted by any binutils version so far released, complaining that
124 the same type of prefix is used twice if an extended register is
125 needed for addressing (fix submitted to mainline 2005-11-21). */
126 __asm__ __volatile__("rex64/fxsave %0"
127 : "=m" (tsk->thread.xstate->fxsave));
129 /* This, however, we can work around by forcing the compiler to select
130 an addressing mode that doesn't require extended registers. */
131 __asm__ __volatile__("rex64/fxsave (%1)"
132 : "=m" (tsk->thread.xstate->fxsave)
133 : "cdaSDb" (&tsk->thread.xstate->fxsave));
135 clear_fpu_state(&tsk->thread.xstate->fxsave);
136 task_thread_info(tsk)->status &= ~TS_USEDFPU;
139 #else /* CONFIG_X86_32 */
141 extern void finit(void);
143 static inline void tolerant_fwait(void)
145 asm volatile("fnclex ; fwait");
148 static inline void restore_fpu(struct task_struct *tsk)
151 * The "nop" is needed to make the instructions the same
158 "m" (tsk->thread.xstate->fxsave));
161 /* We need a safe address that is cheap to find and that is already
162 in L1 during context switch. The best choices are unfortunately
163 different for UP and SMP */
165 #define safe_address (__per_cpu_offset[0])
167 #define safe_address (kstat_cpu(0).cpustat.user)
171 * These must be called with preempt disabled
173 static inline void __save_init_fpu(struct task_struct *tsk)
175 /* Use more nops than strictly needed in case the compiler
178 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
180 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
182 [fx] "m" (tsk->thread.xstate->fxsave),
183 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
184 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
185 is pending. Clear the x87 state here by setting it to fixed
186 values. safe_address is a random variable that should be in L1 */
188 GENERIC_NOP8 GENERIC_NOP2,
189 "emms\n\t" /* clear stack tags */
190 "fildl %[addr]", /* set F?P to defined value */
191 X86_FEATURE_FXSAVE_LEAK,
192 [addr] "m" (safe_address));
193 task_thread_info(tsk)->status &= ~TS_USEDFPU;
197 * Signal frame handlers...
199 extern int save_i387(struct _fpstate __user *buf);
200 extern int restore_i387(struct _fpstate __user *buf);
202 #endif /* CONFIG_X86_64 */
204 static inline void __unlazy_fpu(struct task_struct *tsk)
206 if (task_thread_info(tsk)->status & TS_USEDFPU) {
207 __save_init_fpu(tsk);
210 tsk->fpu_counter = 0;
213 static inline void __clear_fpu(struct task_struct *tsk)
215 if (task_thread_info(tsk)->status & TS_USEDFPU) {
217 task_thread_info(tsk)->status &= ~TS_USEDFPU;
222 static inline void kernel_fpu_begin(void)
224 struct thread_info *me = current_thread_info();
226 if (me->status & TS_USEDFPU)
227 __save_init_fpu(me->task);
232 static inline void kernel_fpu_end(void)
240 static inline void save_init_fpu(struct task_struct *tsk)
242 __save_init_fpu(tsk);
246 #define unlazy_fpu __unlazy_fpu
247 #define clear_fpu __clear_fpu
249 #else /* CONFIG_X86_32 */
252 * These disable preemption on their own and are safe
254 static inline void save_init_fpu(struct task_struct *tsk)
257 __save_init_fpu(tsk);
262 static inline void unlazy_fpu(struct task_struct *tsk)
269 static inline void clear_fpu(struct task_struct *tsk)
276 #endif /* CONFIG_X86_64 */
279 * i387 state interaction
281 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
284 return tsk->thread.xstate->fxsave.cwd;
286 return (unsigned short)tsk->thread.xstate->fsave.cwd;
290 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
293 return tsk->thread.xstate->fxsave.swd;
295 return (unsigned short)tsk->thread.xstate->fsave.swd;
299 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
302 return tsk->thread.xstate->fxsave.mxcsr;
304 return MXCSR_DEFAULT;
308 #endif /* ASM_X86__I387_H */