2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef ASM_X86__I387_H
11 #define ASM_X86__I387_H
13 #include <linux/sched.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/regset.h>
17 #include <asm/processor.h>
18 #include <asm/sigcontext.h>
20 #include <asm/uaccess.h>
21 #include <asm/xsave.h>
23 extern unsigned int sig_xstate_size;
24 extern void fpu_init(void);
25 extern void mxcsr_feature_mask_init(void);
26 extern int init_fpu(struct task_struct *child);
27 extern asmlinkage void math_state_restore(void);
28 extern void init_thread_xstate(void);
30 extern user_regset_active_fn fpregs_active, xfpregs_active;
31 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
32 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
34 #ifdef CONFIG_IA32_EMULATION
35 extern unsigned int sig_xstate_ia32_size;
37 extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
38 extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
41 #define X87_FSW_ES (1 << 7) /* Exception Summary */
45 /* Ignore delayed exceptions from user space */
46 static inline void tolerant_fwait(void)
48 asm volatile("1: fwait\n"
50 _ASM_EXTABLE(1b, 2b));
53 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
57 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
59 ".section .fixup,\"ax\"\n"
60 "3: movl $-1,%[err]\n"
65 #if 0 /* See comment in __save_init_fpu() below. */
66 : [fx] "r" (fx), "m" (*fx), "0" (0));
68 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
73 static inline int restore_fpu_checking(struct task_struct *tsk)
75 if (task_thread_info(tsk)->status & TS_XSAVE)
76 return xrstor_checking(&tsk->thread.xstate->xsave);
78 return fxrstor_checking(&tsk->thread.xstate->fxsave);
81 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
82 is pending. Clear the x87 state here by setting it to fixed
83 values. The kernel data segment can be sometimes 0 and sometimes
84 new user value. Both should be ok.
85 Use the PDA as safe address because it should be already in L1. */
86 static inline void clear_fpu_state(struct task_struct *tsk)
88 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
89 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
92 * xsave header may indicate the init state of the FP.
94 if ((task_thread_info(tsk)->status & TS_XSAVE) &&
95 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
98 if (unlikely(fx->swd & X87_FSW_ES))
99 asm volatile("fnclex");
100 alternative_input(ASM_NOP8 ASM_NOP2,
101 " emms\n" /* clear stack tags */
102 " fildl %%gs:0", /* load to clear state */
103 X86_FEATURE_FXSAVE_LEAK);
106 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
110 asm volatile("1: rex64/fxsave (%[fx])\n\t"
112 ".section .fixup,\"ax\"\n"
113 "3: movl $-1,%[err]\n"
117 : [err] "=r" (err), "=m" (*fx)
118 #if 0 /* See comment in __fxsave_clear() below. */
119 : [fx] "r" (fx), "0" (0));
121 : [fx] "cdaSDb" (fx), "0" (0));
124 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
126 /* No need to clear here because the caller clears USED_MATH */
130 static inline void fxsave(struct task_struct *tsk)
132 /* Using "rex64; fxsave %0" is broken because, if the memory operand
133 uses any extended registers for addressing, a second REX prefix
134 will be generated (to the assembler, rex64 followed by semicolon
135 is a separate instruction), and hence the 64-bitness is lost. */
137 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
138 starting with gas 2.16. */
139 __asm__ __volatile__("fxsaveq %0"
140 : "=m" (tsk->thread.xstate->fxsave));
142 /* Using, as a workaround, the properly prefixed form below isn't
143 accepted by any binutils version so far released, complaining that
144 the same type of prefix is used twice if an extended register is
145 needed for addressing (fix submitted to mainline 2005-11-21). */
146 __asm__ __volatile__("rex64/fxsave %0"
147 : "=m" (tsk->thread.xstate->fxsave));
149 /* This, however, we can work around by forcing the compiler to select
150 an addressing mode that doesn't require extended registers. */
151 __asm__ __volatile__("rex64/fxsave (%1)"
152 : "=m" (tsk->thread.xstate->fxsave)
153 : "cdaSDb" (&tsk->thread.xstate->fxsave));
157 static inline void __save_init_fpu(struct task_struct *tsk)
159 if (task_thread_info(tsk)->status & TS_XSAVE)
164 clear_fpu_state(tsk);
165 task_thread_info(tsk)->status &= ~TS_USEDFPU;
168 #else /* CONFIG_X86_32 */
170 extern void finit(void);
172 static inline void tolerant_fwait(void)
174 asm volatile("fnclex ; fwait");
177 static inline void restore_fpu(struct task_struct *tsk)
179 if (task_thread_info(tsk)->status & TS_XSAVE) {
180 xrstor_checking(&tsk->thread.xstate->xsave);
184 * The "nop" is needed to make the instructions the same
191 "m" (tsk->thread.xstate->fxsave));
194 /* We need a safe address that is cheap to find and that is already
195 in L1 during context switch. The best choices are unfortunately
196 different for UP and SMP */
198 #define safe_address (__per_cpu_offset[0])
200 #define safe_address (kstat_cpu(0).cpustat.user)
204 * These must be called with preempt disabled
206 static inline void __save_init_fpu(struct task_struct *tsk)
208 if (task_thread_info(tsk)->status & TS_XSAVE) {
209 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
210 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
215 * xsave header may indicate the init state of the FP.
217 if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
220 if (unlikely(fx->swd & X87_FSW_ES))
221 asm volatile("fnclex");
224 * we can do a simple return here or be paranoid :)
229 /* Use more nops than strictly needed in case the compiler
232 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
234 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
236 [fx] "m" (tsk->thread.xstate->fxsave),
237 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
239 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
240 is pending. Clear the x87 state here by setting it to fixed
241 values. safe_address is a random variable that should be in L1 */
243 GENERIC_NOP8 GENERIC_NOP2,
244 "emms\n\t" /* clear stack tags */
245 "fildl %[addr]", /* set F?P to defined value */
246 X86_FEATURE_FXSAVE_LEAK,
247 [addr] "m" (safe_address));
249 task_thread_info(tsk)->status &= ~TS_USEDFPU;
253 * Signal frame handlers...
255 extern int save_i387(struct _fpstate __user *buf);
256 extern int restore_i387(struct _fpstate __user *buf);
258 #endif /* CONFIG_X86_64 */
260 static inline void __unlazy_fpu(struct task_struct *tsk)
262 if (task_thread_info(tsk)->status & TS_USEDFPU) {
263 __save_init_fpu(tsk);
266 tsk->fpu_counter = 0;
269 static inline void __clear_fpu(struct task_struct *tsk)
271 if (task_thread_info(tsk)->status & TS_USEDFPU) {
273 task_thread_info(tsk)->status &= ~TS_USEDFPU;
278 static inline void kernel_fpu_begin(void)
280 struct thread_info *me = current_thread_info();
282 if (me->status & TS_USEDFPU)
283 __save_init_fpu(me->task);
288 static inline void kernel_fpu_end(void)
296 static inline void save_init_fpu(struct task_struct *tsk)
298 __save_init_fpu(tsk);
302 #define unlazy_fpu __unlazy_fpu
303 #define clear_fpu __clear_fpu
305 #else /* CONFIG_X86_32 */
308 * These disable preemption on their own and are safe
310 static inline void save_init_fpu(struct task_struct *tsk)
313 __save_init_fpu(tsk);
318 static inline void unlazy_fpu(struct task_struct *tsk)
325 static inline void clear_fpu(struct task_struct *tsk)
332 #endif /* CONFIG_X86_64 */
335 * i387 state interaction
337 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
340 return tsk->thread.xstate->fxsave.cwd;
342 return (unsigned short)tsk->thread.xstate->fsave.cwd;
346 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
349 return tsk->thread.xstate->fxsave.swd;
351 return (unsigned short)tsk->thread.xstate->fsave.swd;
355 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
358 return tsk->thread.xstate->fxsave.mxcsr;
360 return MXCSR_DEFAULT;
364 #endif /* ASM_X86__I387_H */